base.S 4.2 KB

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  1. /*
  2. * arch/s390/kernel/base.S
  3. *
  4. * Copyright IBM Corp. 2006, 2007
  5. * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
  6. * Michael Holzheu <holzheu@de.ibm.com>
  7. */
  8. #include <linux/linkage.h>
  9. #include <asm/asm-offsets.h>
  10. #include <asm/ptrace.h>
  11. #include <asm/sigp.h>
  12. #ifdef CONFIG_64BIT
  13. ENTRY(s390_base_mcck_handler)
  14. basr %r13,0
  15. 0: lg %r15,__LC_PANIC_STACK # load panic stack
  16. aghi %r15,-STACK_FRAME_OVERHEAD
  17. larl %r1,s390_base_mcck_handler_fn
  18. lg %r1,0(%r1)
  19. ltgr %r1,%r1
  20. jz 1f
  21. basr %r14,%r1
  22. 1: la %r1,4095
  23. lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
  24. lpswe __LC_MCK_OLD_PSW
  25. .section .bss
  26. .align 8
  27. .globl s390_base_mcck_handler_fn
  28. s390_base_mcck_handler_fn:
  29. .quad 0
  30. .previous
  31. ENTRY(s390_base_ext_handler)
  32. stmg %r0,%r15,__LC_SAVE_AREA_ASYNC
  33. basr %r13,0
  34. 0: aghi %r15,-STACK_FRAME_OVERHEAD
  35. larl %r1,s390_base_ext_handler_fn
  36. lg %r1,0(%r1)
  37. ltgr %r1,%r1
  38. jz 1f
  39. basr %r14,%r1
  40. 1: lmg %r0,%r15,__LC_SAVE_AREA_ASYNC
  41. ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
  42. lpswe __LC_EXT_OLD_PSW
  43. .section .bss
  44. .align 8
  45. .globl s390_base_ext_handler_fn
  46. s390_base_ext_handler_fn:
  47. .quad 0
  48. .previous
  49. ENTRY(s390_base_pgm_handler)
  50. stmg %r0,%r15,__LC_SAVE_AREA_SYNC
  51. basr %r13,0
  52. 0: aghi %r15,-STACK_FRAME_OVERHEAD
  53. larl %r1,s390_base_pgm_handler_fn
  54. lg %r1,0(%r1)
  55. ltgr %r1,%r1
  56. jz 1f
  57. basr %r14,%r1
  58. lmg %r0,%r15,__LC_SAVE_AREA_SYNC
  59. lpswe __LC_PGM_OLD_PSW
  60. 1: lpswe disabled_wait_psw-0b(%r13)
  61. .align 8
  62. disabled_wait_psw:
  63. .quad 0x0002000180000000,0x0000000000000000 + s390_base_pgm_handler
  64. .section .bss
  65. .align 8
  66. .globl s390_base_pgm_handler_fn
  67. s390_base_pgm_handler_fn:
  68. .quad 0
  69. .previous
  70. #
  71. # Calls diag 308 subcode 1 and continues execution
  72. #
  73. # The following conditions must be ensured before calling this function:
  74. # * Prefix register = 0
  75. # * Lowcore protection is disabled
  76. #
  77. ENTRY(diag308_reset)
  78. larl %r4,.Lctlregs # Save control registers
  79. stctg %c0,%c15,0(%r4)
  80. larl %r4,.Lfpctl # Floating point control register
  81. stfpc 0(%r4)
  82. larl %r4,.Lcontinue_psw # Save PSW flags
  83. epsw %r2,%r3
  84. stm %r2,%r3,0(%r4)
  85. larl %r4,.Lrestart_psw # Setup restart PSW at absolute 0
  86. lghi %r3,0
  87. lg %r4,0(%r4) # Save PSW
  88. sturg %r4,%r3 # Use sturg, because of large pages
  89. lghi %r1,1
  90. diag %r1,%r1,0x308
  91. .Lrestart_part2:
  92. lhi %r0,0 # Load r0 with zero
  93. lhi %r1,2 # Use mode 2 = ESAME (dump)
  94. sigp %r1,%r0,SIGP_SET_ARCHITECTURE # Switch to ESAME mode
  95. sam64 # Switch to 64 bit addressing mode
  96. larl %r4,.Lctlregs # Restore control registers
  97. lctlg %c0,%c15,0(%r4)
  98. larl %r4,.Lfpctl # Restore floating point ctl register
  99. lfpc 0(%r4)
  100. larl %r4,.Lcontinue_psw # Restore PSW flags
  101. lpswe 0(%r4)
  102. .Lcontinue:
  103. br %r14
  104. .align 16
  105. .Lrestart_psw:
  106. .long 0x00080000,0x80000000 + .Lrestart_part2
  107. .section .data..nosave,"aw",@progbits
  108. .align 8
  109. .Lcontinue_psw:
  110. .quad 0,.Lcontinue
  111. .previous
  112. .section .bss
  113. .align 8
  114. .Lctlregs:
  115. .rept 16
  116. .quad 0
  117. .endr
  118. .Lfpctl:
  119. .long 0
  120. .previous
  121. #else /* CONFIG_64BIT */
  122. ENTRY(s390_base_mcck_handler)
  123. basr %r13,0
  124. 0: l %r15,__LC_PANIC_STACK # load panic stack
  125. ahi %r15,-STACK_FRAME_OVERHEAD
  126. l %r1,2f-0b(%r13)
  127. l %r1,0(%r1)
  128. ltr %r1,%r1
  129. jz 1f
  130. basr %r14,%r1
  131. 1: lm %r0,%r15,__LC_GPREGS_SAVE_AREA
  132. lpsw __LC_MCK_OLD_PSW
  133. 2: .long s390_base_mcck_handler_fn
  134. .section .bss
  135. .align 4
  136. .globl s390_base_mcck_handler_fn
  137. s390_base_mcck_handler_fn:
  138. .long 0
  139. .previous
  140. ENTRY(s390_base_ext_handler)
  141. stm %r0,%r15,__LC_SAVE_AREA_ASYNC
  142. basr %r13,0
  143. 0: ahi %r15,-STACK_FRAME_OVERHEAD
  144. l %r1,2f-0b(%r13)
  145. l %r1,0(%r1)
  146. ltr %r1,%r1
  147. jz 1f
  148. basr %r14,%r1
  149. 1: lm %r0,%r15,__LC_SAVE_AREA_ASYNC
  150. ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
  151. lpsw __LC_EXT_OLD_PSW
  152. 2: .long s390_base_ext_handler_fn
  153. .section .bss
  154. .align 4
  155. .globl s390_base_ext_handler_fn
  156. s390_base_ext_handler_fn:
  157. .long 0
  158. .previous
  159. ENTRY(s390_base_pgm_handler)
  160. stm %r0,%r15,__LC_SAVE_AREA_SYNC
  161. basr %r13,0
  162. 0: ahi %r15,-STACK_FRAME_OVERHEAD
  163. l %r1,2f-0b(%r13)
  164. l %r1,0(%r1)
  165. ltr %r1,%r1
  166. jz 1f
  167. basr %r14,%r1
  168. lm %r0,%r15,__LC_SAVE_AREA_SYNC
  169. lpsw __LC_PGM_OLD_PSW
  170. 1: lpsw disabled_wait_psw-0b(%r13)
  171. 2: .long s390_base_pgm_handler_fn
  172. disabled_wait_psw:
  173. .align 8
  174. .long 0x000a0000,0x00000000 + s390_base_pgm_handler
  175. .section .bss
  176. .align 4
  177. .globl s390_base_pgm_handler_fn
  178. s390_base_pgm_handler_fn:
  179. .long 0
  180. .previous
  181. #endif /* CONFIG_64BIT */