emulate.c 12 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright IBM Corp. 2007
  16. * Copyright 2011 Freescale Semiconductor, Inc.
  17. *
  18. * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  19. */
  20. #include <linux/jiffies.h>
  21. #include <linux/hrtimer.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/kvm_host.h>
  25. #include <linux/clockchips.h>
  26. #include <asm/reg.h>
  27. #include <asm/time.h>
  28. #include <asm/byteorder.h>
  29. #include <asm/kvm_ppc.h>
  30. #include <asm/disassemble.h>
  31. #include "timing.h"
  32. #include "trace.h"
  33. #define OP_TRAP 3
  34. #define OP_TRAP_64 2
  35. #define OP_31_XOP_TRAP 4
  36. #define OP_31_XOP_LWZX 23
  37. #define OP_31_XOP_TRAP_64 68
  38. #define OP_31_XOP_LBZX 87
  39. #define OP_31_XOP_STWX 151
  40. #define OP_31_XOP_STBX 215
  41. #define OP_31_XOP_LBZUX 119
  42. #define OP_31_XOP_STBUX 247
  43. #define OP_31_XOP_LHZX 279
  44. #define OP_31_XOP_LHZUX 311
  45. #define OP_31_XOP_MFSPR 339
  46. #define OP_31_XOP_LHAX 343
  47. #define OP_31_XOP_STHX 407
  48. #define OP_31_XOP_STHUX 439
  49. #define OP_31_XOP_MTSPR 467
  50. #define OP_31_XOP_DCBI 470
  51. #define OP_31_XOP_LWBRX 534
  52. #define OP_31_XOP_TLBSYNC 566
  53. #define OP_31_XOP_STWBRX 662
  54. #define OP_31_XOP_LHBRX 790
  55. #define OP_31_XOP_STHBRX 918
  56. #define OP_LWZ 32
  57. #define OP_LD 58
  58. #define OP_LWZU 33
  59. #define OP_LBZ 34
  60. #define OP_LBZU 35
  61. #define OP_STW 36
  62. #define OP_STWU 37
  63. #define OP_STD 62
  64. #define OP_STB 38
  65. #define OP_STBU 39
  66. #define OP_LHZ 40
  67. #define OP_LHZU 41
  68. #define OP_LHA 42
  69. #define OP_LHAU 43
  70. #define OP_STH 44
  71. #define OP_STHU 45
  72. void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
  73. {
  74. unsigned long dec_nsec;
  75. unsigned long long dec_time;
  76. pr_debug("mtDEC: %x\n", vcpu->arch.dec);
  77. hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
  78. #ifdef CONFIG_PPC_BOOK3S
  79. /* mtdec lowers the interrupt line when positive. */
  80. kvmppc_core_dequeue_dec(vcpu);
  81. /* POWER4+ triggers a dec interrupt if the value is < 0 */
  82. if (vcpu->arch.dec & 0x80000000) {
  83. kvmppc_core_queue_dec(vcpu);
  84. return;
  85. }
  86. #endif
  87. #ifdef CONFIG_BOOKE
  88. /* On BOOKE, DEC = 0 is as good as decrementer not enabled */
  89. if (vcpu->arch.dec == 0)
  90. return;
  91. #endif
  92. /*
  93. * The decrementer ticks at the same rate as the timebase, so
  94. * that's how we convert the guest DEC value to the number of
  95. * host ticks.
  96. */
  97. dec_time = vcpu->arch.dec;
  98. /*
  99. * Guest timebase ticks at the same frequency as host decrementer.
  100. * So use the host decrementer calculations for decrementer emulation.
  101. */
  102. dec_time = dec_time << decrementer_clockevent.shift;
  103. do_div(dec_time, decrementer_clockevent.mult);
  104. dec_nsec = do_div(dec_time, NSEC_PER_SEC);
  105. hrtimer_start(&vcpu->arch.dec_timer,
  106. ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
  107. vcpu->arch.dec_jiffies = get_tb();
  108. }
  109. u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
  110. {
  111. u64 jd = tb - vcpu->arch.dec_jiffies;
  112. #ifdef CONFIG_BOOKE
  113. if (vcpu->arch.dec < jd)
  114. return 0;
  115. #endif
  116. return vcpu->arch.dec - jd;
  117. }
  118. /* XXX to do:
  119. * lhax
  120. * lhaux
  121. * lswx
  122. * lswi
  123. * stswx
  124. * stswi
  125. * lha
  126. * lhau
  127. * lmw
  128. * stmw
  129. *
  130. * XXX is_bigendian should depend on MMU mapping or MSR[LE]
  131. */
  132. /* XXX Should probably auto-generate instruction decoding for a particular core
  133. * from opcode tables in the future. */
  134. int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
  135. {
  136. u32 inst = kvmppc_get_last_inst(vcpu);
  137. int ra = get_ra(inst);
  138. int rs = get_rs(inst);
  139. int rt = get_rt(inst);
  140. int sprn = get_sprn(inst);
  141. enum emulation_result emulated = EMULATE_DONE;
  142. int advance = 1;
  143. ulong spr_val = 0;
  144. /* this default type might be overwritten by subcategories */
  145. kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
  146. pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
  147. switch (get_op(inst)) {
  148. case OP_TRAP:
  149. #ifdef CONFIG_PPC_BOOK3S
  150. case OP_TRAP_64:
  151. kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
  152. #else
  153. kvmppc_core_queue_program(vcpu,
  154. vcpu->arch.shared->esr | ESR_PTR);
  155. #endif
  156. advance = 0;
  157. break;
  158. case 31:
  159. switch (get_xop(inst)) {
  160. case OP_31_XOP_TRAP:
  161. #ifdef CONFIG_64BIT
  162. case OP_31_XOP_TRAP_64:
  163. #endif
  164. #ifdef CONFIG_PPC_BOOK3S
  165. kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
  166. #else
  167. kvmppc_core_queue_program(vcpu,
  168. vcpu->arch.shared->esr | ESR_PTR);
  169. #endif
  170. advance = 0;
  171. break;
  172. case OP_31_XOP_LWZX:
  173. emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
  174. break;
  175. case OP_31_XOP_LBZX:
  176. emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
  177. break;
  178. case OP_31_XOP_LBZUX:
  179. emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
  180. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  181. break;
  182. case OP_31_XOP_STWX:
  183. emulated = kvmppc_handle_store(run, vcpu,
  184. kvmppc_get_gpr(vcpu, rs),
  185. 4, 1);
  186. break;
  187. case OP_31_XOP_STBX:
  188. emulated = kvmppc_handle_store(run, vcpu,
  189. kvmppc_get_gpr(vcpu, rs),
  190. 1, 1);
  191. break;
  192. case OP_31_XOP_STBUX:
  193. emulated = kvmppc_handle_store(run, vcpu,
  194. kvmppc_get_gpr(vcpu, rs),
  195. 1, 1);
  196. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  197. break;
  198. case OP_31_XOP_LHAX:
  199. emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
  200. break;
  201. case OP_31_XOP_LHZX:
  202. emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
  203. break;
  204. case OP_31_XOP_LHZUX:
  205. emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
  206. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  207. break;
  208. case OP_31_XOP_MFSPR:
  209. switch (sprn) {
  210. case SPRN_SRR0:
  211. spr_val = vcpu->arch.shared->srr0;
  212. break;
  213. case SPRN_SRR1:
  214. spr_val = vcpu->arch.shared->srr1;
  215. break;
  216. case SPRN_PVR:
  217. spr_val = vcpu->arch.pvr;
  218. break;
  219. case SPRN_PIR:
  220. spr_val = vcpu->vcpu_id;
  221. break;
  222. case SPRN_MSSSR0:
  223. spr_val = 0;
  224. break;
  225. /* Note: mftb and TBRL/TBWL are user-accessible, so
  226. * the guest can always access the real TB anyways.
  227. * In fact, we probably will never see these traps. */
  228. case SPRN_TBWL:
  229. spr_val = get_tb() >> 32;
  230. break;
  231. case SPRN_TBWU:
  232. spr_val = get_tb();
  233. break;
  234. case SPRN_SPRG0:
  235. spr_val = vcpu->arch.shared->sprg0;
  236. break;
  237. case SPRN_SPRG1:
  238. spr_val = vcpu->arch.shared->sprg1;
  239. break;
  240. case SPRN_SPRG2:
  241. spr_val = vcpu->arch.shared->sprg2;
  242. break;
  243. case SPRN_SPRG3:
  244. spr_val = vcpu->arch.shared->sprg3;
  245. break;
  246. /* Note: SPRG4-7 are user-readable, so we don't get
  247. * a trap. */
  248. case SPRN_DEC:
  249. spr_val = kvmppc_get_dec(vcpu, get_tb());
  250. break;
  251. default:
  252. emulated = kvmppc_core_emulate_mfspr(vcpu, sprn,
  253. &spr_val);
  254. if (unlikely(emulated == EMULATE_FAIL)) {
  255. printk(KERN_INFO "mfspr: unknown spr "
  256. "0x%x\n", sprn);
  257. }
  258. break;
  259. }
  260. kvmppc_set_gpr(vcpu, rt, spr_val);
  261. kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
  262. break;
  263. case OP_31_XOP_STHX:
  264. emulated = kvmppc_handle_store(run, vcpu,
  265. kvmppc_get_gpr(vcpu, rs),
  266. 2, 1);
  267. break;
  268. case OP_31_XOP_STHUX:
  269. emulated = kvmppc_handle_store(run, vcpu,
  270. kvmppc_get_gpr(vcpu, rs),
  271. 2, 1);
  272. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  273. break;
  274. case OP_31_XOP_MTSPR:
  275. spr_val = kvmppc_get_gpr(vcpu, rs);
  276. switch (sprn) {
  277. case SPRN_SRR0:
  278. vcpu->arch.shared->srr0 = spr_val;
  279. break;
  280. case SPRN_SRR1:
  281. vcpu->arch.shared->srr1 = spr_val;
  282. break;
  283. /* XXX We need to context-switch the timebase for
  284. * watchdog and FIT. */
  285. case SPRN_TBWL: break;
  286. case SPRN_TBWU: break;
  287. case SPRN_MSSSR0: break;
  288. case SPRN_DEC:
  289. vcpu->arch.dec = spr_val;
  290. kvmppc_emulate_dec(vcpu);
  291. break;
  292. case SPRN_SPRG0:
  293. vcpu->arch.shared->sprg0 = spr_val;
  294. break;
  295. case SPRN_SPRG1:
  296. vcpu->arch.shared->sprg1 = spr_val;
  297. break;
  298. case SPRN_SPRG2:
  299. vcpu->arch.shared->sprg2 = spr_val;
  300. break;
  301. case SPRN_SPRG3:
  302. vcpu->arch.shared->sprg3 = spr_val;
  303. break;
  304. default:
  305. emulated = kvmppc_core_emulate_mtspr(vcpu, sprn,
  306. spr_val);
  307. if (emulated == EMULATE_FAIL)
  308. printk(KERN_INFO "mtspr: unknown spr "
  309. "0x%x\n", sprn);
  310. break;
  311. }
  312. kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
  313. break;
  314. case OP_31_XOP_DCBI:
  315. /* Do nothing. The guest is performing dcbi because
  316. * hardware DMA is not snooped by the dcache, but
  317. * emulated DMA either goes through the dcache as
  318. * normal writes, or the host kernel has handled dcache
  319. * coherence. */
  320. break;
  321. case OP_31_XOP_LWBRX:
  322. emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);
  323. break;
  324. case OP_31_XOP_TLBSYNC:
  325. break;
  326. case OP_31_XOP_STWBRX:
  327. emulated = kvmppc_handle_store(run, vcpu,
  328. kvmppc_get_gpr(vcpu, rs),
  329. 4, 0);
  330. break;
  331. case OP_31_XOP_LHBRX:
  332. emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
  333. break;
  334. case OP_31_XOP_STHBRX:
  335. emulated = kvmppc_handle_store(run, vcpu,
  336. kvmppc_get_gpr(vcpu, rs),
  337. 2, 0);
  338. break;
  339. default:
  340. /* Attempt core-specific emulation below. */
  341. emulated = EMULATE_FAIL;
  342. }
  343. break;
  344. case OP_LWZ:
  345. emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
  346. break;
  347. /* TBD: Add support for other 64 bit load variants like ldu, ldux, ldx etc. */
  348. case OP_LD:
  349. rt = get_rt(inst);
  350. emulated = kvmppc_handle_load(run, vcpu, rt, 8, 1);
  351. break;
  352. case OP_LWZU:
  353. emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
  354. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  355. break;
  356. case OP_LBZ:
  357. emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
  358. break;
  359. case OP_LBZU:
  360. emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
  361. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  362. break;
  363. case OP_STW:
  364. emulated = kvmppc_handle_store(run, vcpu,
  365. kvmppc_get_gpr(vcpu, rs),
  366. 4, 1);
  367. break;
  368. /* TBD: Add support for other 64 bit store variants like stdu, stdux, stdx etc. */
  369. case OP_STD:
  370. rs = get_rs(inst);
  371. emulated = kvmppc_handle_store(run, vcpu,
  372. kvmppc_get_gpr(vcpu, rs),
  373. 8, 1);
  374. break;
  375. case OP_STWU:
  376. emulated = kvmppc_handle_store(run, vcpu,
  377. kvmppc_get_gpr(vcpu, rs),
  378. 4, 1);
  379. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  380. break;
  381. case OP_STB:
  382. emulated = kvmppc_handle_store(run, vcpu,
  383. kvmppc_get_gpr(vcpu, rs),
  384. 1, 1);
  385. break;
  386. case OP_STBU:
  387. emulated = kvmppc_handle_store(run, vcpu,
  388. kvmppc_get_gpr(vcpu, rs),
  389. 1, 1);
  390. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  391. break;
  392. case OP_LHZ:
  393. emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
  394. break;
  395. case OP_LHZU:
  396. emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
  397. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  398. break;
  399. case OP_LHA:
  400. emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
  401. break;
  402. case OP_LHAU:
  403. emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
  404. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  405. break;
  406. case OP_STH:
  407. emulated = kvmppc_handle_store(run, vcpu,
  408. kvmppc_get_gpr(vcpu, rs),
  409. 2, 1);
  410. break;
  411. case OP_STHU:
  412. emulated = kvmppc_handle_store(run, vcpu,
  413. kvmppc_get_gpr(vcpu, rs),
  414. 2, 1);
  415. kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
  416. break;
  417. default:
  418. emulated = EMULATE_FAIL;
  419. }
  420. if (emulated == EMULATE_FAIL) {
  421. emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance);
  422. if (emulated == EMULATE_AGAIN) {
  423. advance = 0;
  424. } else if (emulated == EMULATE_FAIL) {
  425. advance = 0;
  426. printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
  427. "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
  428. kvmppc_core_queue_program(vcpu, 0);
  429. }
  430. }
  431. trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
  432. /* Advance past emulated instruction. */
  433. if (advance)
  434. kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
  435. return emulated;
  436. }