process.c 32 KB

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  1. /*
  2. * Derived from "arch/i386/kernel/process.c"
  3. * Copyright (C) 1995 Linus Torvalds
  4. *
  5. * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
  6. * Paul Mackerras (paulus@cs.anu.edu.au)
  7. *
  8. * PowerPC version
  9. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/sched.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/smp.h>
  21. #include <linux/stddef.h>
  22. #include <linux/unistd.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/elf.h>
  27. #include <linux/init.h>
  28. #include <linux/prctl.h>
  29. #include <linux/init_task.h>
  30. #include <linux/export.h>
  31. #include <linux/kallsyms.h>
  32. #include <linux/mqueue.h>
  33. #include <linux/hardirq.h>
  34. #include <linux/utsname.h>
  35. #include <linux/ftrace.h>
  36. #include <linux/kernel_stat.h>
  37. #include <linux/personality.h>
  38. #include <linux/random.h>
  39. #include <linux/hw_breakpoint.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/uaccess.h>
  42. #include <asm/io.h>
  43. #include <asm/processor.h>
  44. #include <asm/mmu.h>
  45. #include <asm/prom.h>
  46. #include <asm/machdep.h>
  47. #include <asm/time.h>
  48. #include <asm/runlatch.h>
  49. #include <asm/syscalls.h>
  50. #include <asm/switch_to.h>
  51. #include <asm/debug.h>
  52. #ifdef CONFIG_PPC64
  53. #include <asm/firmware.h>
  54. #endif
  55. #include <linux/kprobes.h>
  56. #include <linux/kdebug.h>
  57. extern unsigned long _get_SP(void);
  58. #ifndef CONFIG_SMP
  59. struct task_struct *last_task_used_math = NULL;
  60. struct task_struct *last_task_used_altivec = NULL;
  61. struct task_struct *last_task_used_vsx = NULL;
  62. struct task_struct *last_task_used_spe = NULL;
  63. #endif
  64. /*
  65. * Make sure the floating-point register state in the
  66. * the thread_struct is up to date for task tsk.
  67. */
  68. void flush_fp_to_thread(struct task_struct *tsk)
  69. {
  70. if (tsk->thread.regs) {
  71. /*
  72. * We need to disable preemption here because if we didn't,
  73. * another process could get scheduled after the regs->msr
  74. * test but before we have finished saving the FP registers
  75. * to the thread_struct. That process could take over the
  76. * FPU, and then when we get scheduled again we would store
  77. * bogus values for the remaining FP registers.
  78. */
  79. preempt_disable();
  80. if (tsk->thread.regs->msr & MSR_FP) {
  81. #ifdef CONFIG_SMP
  82. /*
  83. * This should only ever be called for current or
  84. * for a stopped child process. Since we save away
  85. * the FP register state on context switch on SMP,
  86. * there is something wrong if a stopped child appears
  87. * to still have its FP state in the CPU registers.
  88. */
  89. BUG_ON(tsk != current);
  90. #endif
  91. giveup_fpu(tsk);
  92. }
  93. preempt_enable();
  94. }
  95. }
  96. EXPORT_SYMBOL_GPL(flush_fp_to_thread);
  97. void enable_kernel_fp(void)
  98. {
  99. WARN_ON(preemptible());
  100. #ifdef CONFIG_SMP
  101. if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
  102. giveup_fpu(current);
  103. else
  104. giveup_fpu(NULL); /* just enables FP for kernel */
  105. #else
  106. giveup_fpu(last_task_used_math);
  107. #endif /* CONFIG_SMP */
  108. }
  109. EXPORT_SYMBOL(enable_kernel_fp);
  110. #ifdef CONFIG_ALTIVEC
  111. void enable_kernel_altivec(void)
  112. {
  113. WARN_ON(preemptible());
  114. #ifdef CONFIG_SMP
  115. if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
  116. giveup_altivec(current);
  117. else
  118. giveup_altivec_notask();
  119. #else
  120. giveup_altivec(last_task_used_altivec);
  121. #endif /* CONFIG_SMP */
  122. }
  123. EXPORT_SYMBOL(enable_kernel_altivec);
  124. /*
  125. * Make sure the VMX/Altivec register state in the
  126. * the thread_struct is up to date for task tsk.
  127. */
  128. void flush_altivec_to_thread(struct task_struct *tsk)
  129. {
  130. if (tsk->thread.regs) {
  131. preempt_disable();
  132. if (tsk->thread.regs->msr & MSR_VEC) {
  133. #ifdef CONFIG_SMP
  134. BUG_ON(tsk != current);
  135. #endif
  136. giveup_altivec(tsk);
  137. }
  138. preempt_enable();
  139. }
  140. }
  141. EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
  142. #endif /* CONFIG_ALTIVEC */
  143. #ifdef CONFIG_VSX
  144. #if 0
  145. /* not currently used, but some crazy RAID module might want to later */
  146. void enable_kernel_vsx(void)
  147. {
  148. WARN_ON(preemptible());
  149. #ifdef CONFIG_SMP
  150. if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
  151. giveup_vsx(current);
  152. else
  153. giveup_vsx(NULL); /* just enable vsx for kernel - force */
  154. #else
  155. giveup_vsx(last_task_used_vsx);
  156. #endif /* CONFIG_SMP */
  157. }
  158. EXPORT_SYMBOL(enable_kernel_vsx);
  159. #endif
  160. void giveup_vsx(struct task_struct *tsk)
  161. {
  162. giveup_fpu(tsk);
  163. giveup_altivec(tsk);
  164. __giveup_vsx(tsk);
  165. }
  166. void flush_vsx_to_thread(struct task_struct *tsk)
  167. {
  168. if (tsk->thread.regs) {
  169. preempt_disable();
  170. if (tsk->thread.regs->msr & MSR_VSX) {
  171. #ifdef CONFIG_SMP
  172. BUG_ON(tsk != current);
  173. #endif
  174. giveup_vsx(tsk);
  175. }
  176. preempt_enable();
  177. }
  178. }
  179. EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
  180. #endif /* CONFIG_VSX */
  181. #ifdef CONFIG_SPE
  182. void enable_kernel_spe(void)
  183. {
  184. WARN_ON(preemptible());
  185. #ifdef CONFIG_SMP
  186. if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
  187. giveup_spe(current);
  188. else
  189. giveup_spe(NULL); /* just enable SPE for kernel - force */
  190. #else
  191. giveup_spe(last_task_used_spe);
  192. #endif /* __SMP __ */
  193. }
  194. EXPORT_SYMBOL(enable_kernel_spe);
  195. void flush_spe_to_thread(struct task_struct *tsk)
  196. {
  197. if (tsk->thread.regs) {
  198. preempt_disable();
  199. if (tsk->thread.regs->msr & MSR_SPE) {
  200. #ifdef CONFIG_SMP
  201. BUG_ON(tsk != current);
  202. #endif
  203. tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
  204. giveup_spe(tsk);
  205. }
  206. preempt_enable();
  207. }
  208. }
  209. #endif /* CONFIG_SPE */
  210. #ifndef CONFIG_SMP
  211. /*
  212. * If we are doing lazy switching of CPU state (FP, altivec or SPE),
  213. * and the current task has some state, discard it.
  214. */
  215. void discard_lazy_cpu_state(void)
  216. {
  217. preempt_disable();
  218. if (last_task_used_math == current)
  219. last_task_used_math = NULL;
  220. #ifdef CONFIG_ALTIVEC
  221. if (last_task_used_altivec == current)
  222. last_task_used_altivec = NULL;
  223. #endif /* CONFIG_ALTIVEC */
  224. #ifdef CONFIG_VSX
  225. if (last_task_used_vsx == current)
  226. last_task_used_vsx = NULL;
  227. #endif /* CONFIG_VSX */
  228. #ifdef CONFIG_SPE
  229. if (last_task_used_spe == current)
  230. last_task_used_spe = NULL;
  231. #endif
  232. preempt_enable();
  233. }
  234. #endif /* CONFIG_SMP */
  235. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  236. void do_send_trap(struct pt_regs *regs, unsigned long address,
  237. unsigned long error_code, int signal_code, int breakpt)
  238. {
  239. siginfo_t info;
  240. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  241. 11, SIGSEGV) == NOTIFY_STOP)
  242. return;
  243. /* Deliver the signal to userspace */
  244. info.si_signo = SIGTRAP;
  245. info.si_errno = breakpt; /* breakpoint or watchpoint id */
  246. info.si_code = signal_code;
  247. info.si_addr = (void __user *)address;
  248. force_sig_info(SIGTRAP, &info, current);
  249. }
  250. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  251. void do_dabr(struct pt_regs *regs, unsigned long address,
  252. unsigned long error_code)
  253. {
  254. siginfo_t info;
  255. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  256. 11, SIGSEGV) == NOTIFY_STOP)
  257. return;
  258. if (debugger_dabr_match(regs))
  259. return;
  260. /* Clear the DABR */
  261. set_dabr(0);
  262. /* Deliver the signal to userspace */
  263. info.si_signo = SIGTRAP;
  264. info.si_errno = 0;
  265. info.si_code = TRAP_HWBKPT;
  266. info.si_addr = (void __user *)address;
  267. force_sig_info(SIGTRAP, &info, current);
  268. }
  269. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  270. static DEFINE_PER_CPU(unsigned long, current_dabr);
  271. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  272. /*
  273. * Set the debug registers back to their default "safe" values.
  274. */
  275. static void set_debug_reg_defaults(struct thread_struct *thread)
  276. {
  277. thread->iac1 = thread->iac2 = 0;
  278. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  279. thread->iac3 = thread->iac4 = 0;
  280. #endif
  281. thread->dac1 = thread->dac2 = 0;
  282. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  283. thread->dvc1 = thread->dvc2 = 0;
  284. #endif
  285. thread->dbcr0 = 0;
  286. #ifdef CONFIG_BOOKE
  287. /*
  288. * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
  289. */
  290. thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
  291. DBCR1_IAC3US | DBCR1_IAC4US;
  292. /*
  293. * Force Data Address Compare User/Supervisor bits to be User-only
  294. * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
  295. */
  296. thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
  297. #else
  298. thread->dbcr1 = 0;
  299. #endif
  300. }
  301. static void prime_debug_regs(struct thread_struct *thread)
  302. {
  303. mtspr(SPRN_IAC1, thread->iac1);
  304. mtspr(SPRN_IAC2, thread->iac2);
  305. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  306. mtspr(SPRN_IAC3, thread->iac3);
  307. mtspr(SPRN_IAC4, thread->iac4);
  308. #endif
  309. mtspr(SPRN_DAC1, thread->dac1);
  310. mtspr(SPRN_DAC2, thread->dac2);
  311. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  312. mtspr(SPRN_DVC1, thread->dvc1);
  313. mtspr(SPRN_DVC2, thread->dvc2);
  314. #endif
  315. mtspr(SPRN_DBCR0, thread->dbcr0);
  316. mtspr(SPRN_DBCR1, thread->dbcr1);
  317. #ifdef CONFIG_BOOKE
  318. mtspr(SPRN_DBCR2, thread->dbcr2);
  319. #endif
  320. }
  321. /*
  322. * Unless neither the old or new thread are making use of the
  323. * debug registers, set the debug registers from the values
  324. * stored in the new thread.
  325. */
  326. static void switch_booke_debug_regs(struct thread_struct *new_thread)
  327. {
  328. if ((current->thread.dbcr0 & DBCR0_IDM)
  329. || (new_thread->dbcr0 & DBCR0_IDM))
  330. prime_debug_regs(new_thread);
  331. }
  332. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  333. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  334. static void set_debug_reg_defaults(struct thread_struct *thread)
  335. {
  336. if (thread->dabr) {
  337. thread->dabr = 0;
  338. set_dabr(0);
  339. }
  340. }
  341. #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
  342. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  343. int set_dabr(unsigned long dabr)
  344. {
  345. __get_cpu_var(current_dabr) = dabr;
  346. if (ppc_md.set_dabr)
  347. return ppc_md.set_dabr(dabr);
  348. /* XXX should we have a CPU_FTR_HAS_DABR ? */
  349. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  350. mtspr(SPRN_DAC1, dabr);
  351. #ifdef CONFIG_PPC_47x
  352. isync();
  353. #endif
  354. #elif defined(CONFIG_PPC_BOOK3S)
  355. mtspr(SPRN_DABR, dabr);
  356. #endif
  357. return 0;
  358. }
  359. #ifdef CONFIG_PPC64
  360. DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
  361. #endif
  362. struct task_struct *__switch_to(struct task_struct *prev,
  363. struct task_struct *new)
  364. {
  365. struct thread_struct *new_thread, *old_thread;
  366. unsigned long flags;
  367. struct task_struct *last;
  368. #ifdef CONFIG_PPC_BOOK3S_64
  369. struct ppc64_tlb_batch *batch;
  370. #endif
  371. #ifdef CONFIG_SMP
  372. /* avoid complexity of lazy save/restore of fpu
  373. * by just saving it every time we switch out if
  374. * this task used the fpu during the last quantum.
  375. *
  376. * If it tries to use the fpu again, it'll trap and
  377. * reload its fp regs. So we don't have to do a restore
  378. * every switch, just a save.
  379. * -- Cort
  380. */
  381. if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
  382. giveup_fpu(prev);
  383. #ifdef CONFIG_ALTIVEC
  384. /*
  385. * If the previous thread used altivec in the last quantum
  386. * (thus changing altivec regs) then save them.
  387. * We used to check the VRSAVE register but not all apps
  388. * set it, so we don't rely on it now (and in fact we need
  389. * to save & restore VSCR even if VRSAVE == 0). -- paulus
  390. *
  391. * On SMP we always save/restore altivec regs just to avoid the
  392. * complexity of changing processors.
  393. * -- Cort
  394. */
  395. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
  396. giveup_altivec(prev);
  397. #endif /* CONFIG_ALTIVEC */
  398. #ifdef CONFIG_VSX
  399. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
  400. /* VMX and FPU registers are already save here */
  401. __giveup_vsx(prev);
  402. #endif /* CONFIG_VSX */
  403. #ifdef CONFIG_SPE
  404. /*
  405. * If the previous thread used spe in the last quantum
  406. * (thus changing spe regs) then save them.
  407. *
  408. * On SMP we always save/restore spe regs just to avoid the
  409. * complexity of changing processors.
  410. */
  411. if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
  412. giveup_spe(prev);
  413. #endif /* CONFIG_SPE */
  414. #else /* CONFIG_SMP */
  415. #ifdef CONFIG_ALTIVEC
  416. /* Avoid the trap. On smp this this never happens since
  417. * we don't set last_task_used_altivec -- Cort
  418. */
  419. if (new->thread.regs && last_task_used_altivec == new)
  420. new->thread.regs->msr |= MSR_VEC;
  421. #endif /* CONFIG_ALTIVEC */
  422. #ifdef CONFIG_VSX
  423. if (new->thread.regs && last_task_used_vsx == new)
  424. new->thread.regs->msr |= MSR_VSX;
  425. #endif /* CONFIG_VSX */
  426. #ifdef CONFIG_SPE
  427. /* Avoid the trap. On smp this this never happens since
  428. * we don't set last_task_used_spe
  429. */
  430. if (new->thread.regs && last_task_used_spe == new)
  431. new->thread.regs->msr |= MSR_SPE;
  432. #endif /* CONFIG_SPE */
  433. #endif /* CONFIG_SMP */
  434. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  435. switch_booke_debug_regs(&new->thread);
  436. #else
  437. /*
  438. * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
  439. * schedule DABR
  440. */
  441. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  442. if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
  443. set_dabr(new->thread.dabr);
  444. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  445. #endif
  446. new_thread = &new->thread;
  447. old_thread = &current->thread;
  448. #ifdef CONFIG_PPC64
  449. /*
  450. * Collect processor utilization data per process
  451. */
  452. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  453. struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
  454. long unsigned start_tb, current_tb;
  455. start_tb = old_thread->start_tb;
  456. cu->current_tb = current_tb = mfspr(SPRN_PURR);
  457. old_thread->accum_tb += (current_tb - start_tb);
  458. new_thread->start_tb = current_tb;
  459. }
  460. #endif /* CONFIG_PPC64 */
  461. #ifdef CONFIG_PPC_BOOK3S_64
  462. batch = &__get_cpu_var(ppc64_tlb_batch);
  463. if (batch->active) {
  464. current_thread_info()->local_flags |= _TLF_LAZY_MMU;
  465. if (batch->index)
  466. __flush_tlb_pending(batch);
  467. batch->active = 0;
  468. }
  469. #endif /* CONFIG_PPC_BOOK3S_64 */
  470. local_irq_save(flags);
  471. account_system_vtime(current);
  472. account_process_vtime(current);
  473. /*
  474. * We can't take a PMU exception inside _switch() since there is a
  475. * window where the kernel stack SLB and the kernel stack are out
  476. * of sync. Hard disable here.
  477. */
  478. hard_irq_disable();
  479. last = _switch(old_thread, new_thread);
  480. #ifdef CONFIG_PPC_BOOK3S_64
  481. if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
  482. current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
  483. batch = &__get_cpu_var(ppc64_tlb_batch);
  484. batch->active = 1;
  485. }
  486. #endif /* CONFIG_PPC_BOOK3S_64 */
  487. local_irq_restore(flags);
  488. return last;
  489. }
  490. static int instructions_to_print = 16;
  491. static void show_instructions(struct pt_regs *regs)
  492. {
  493. int i;
  494. unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
  495. sizeof(int));
  496. printk("Instruction dump:");
  497. for (i = 0; i < instructions_to_print; i++) {
  498. int instr;
  499. if (!(i % 8))
  500. printk("\n");
  501. #if !defined(CONFIG_BOOKE)
  502. /* If executing with the IMMU off, adjust pc rather
  503. * than print XXXXXXXX.
  504. */
  505. if (!(regs->msr & MSR_IR))
  506. pc = (unsigned long)phys_to_virt(pc);
  507. #endif
  508. /* We use __get_user here *only* to avoid an OOPS on a
  509. * bad address because the pc *should* only be a
  510. * kernel address.
  511. */
  512. if (!__kernel_text_address(pc) ||
  513. __get_user(instr, (unsigned int __user *)pc)) {
  514. printk(KERN_CONT "XXXXXXXX ");
  515. } else {
  516. if (regs->nip == pc)
  517. printk(KERN_CONT "<%08x> ", instr);
  518. else
  519. printk(KERN_CONT "%08x ", instr);
  520. }
  521. pc += sizeof(int);
  522. }
  523. printk("\n");
  524. }
  525. static struct regbit {
  526. unsigned long bit;
  527. const char *name;
  528. } msr_bits[] = {
  529. #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
  530. {MSR_SF, "SF"},
  531. {MSR_HV, "HV"},
  532. #endif
  533. {MSR_VEC, "VEC"},
  534. {MSR_VSX, "VSX"},
  535. #ifdef CONFIG_BOOKE
  536. {MSR_CE, "CE"},
  537. #endif
  538. {MSR_EE, "EE"},
  539. {MSR_PR, "PR"},
  540. {MSR_FP, "FP"},
  541. {MSR_ME, "ME"},
  542. #ifdef CONFIG_BOOKE
  543. {MSR_DE, "DE"},
  544. #else
  545. {MSR_SE, "SE"},
  546. {MSR_BE, "BE"},
  547. #endif
  548. {MSR_IR, "IR"},
  549. {MSR_DR, "DR"},
  550. {MSR_PMM, "PMM"},
  551. #ifndef CONFIG_BOOKE
  552. {MSR_RI, "RI"},
  553. {MSR_LE, "LE"},
  554. #endif
  555. {0, NULL}
  556. };
  557. static void printbits(unsigned long val, struct regbit *bits)
  558. {
  559. const char *sep = "";
  560. printk("<");
  561. for (; bits->bit; ++bits)
  562. if (val & bits->bit) {
  563. printk("%s%s", sep, bits->name);
  564. sep = ",";
  565. }
  566. printk(">");
  567. }
  568. #ifdef CONFIG_PPC64
  569. #define REG "%016lx"
  570. #define REGS_PER_LINE 4
  571. #define LAST_VOLATILE 13
  572. #else
  573. #define REG "%08lx"
  574. #define REGS_PER_LINE 8
  575. #define LAST_VOLATILE 12
  576. #endif
  577. void show_regs(struct pt_regs * regs)
  578. {
  579. int i, trap;
  580. printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
  581. regs->nip, regs->link, regs->ctr);
  582. printk("REGS: %p TRAP: %04lx %s (%s)\n",
  583. regs, regs->trap, print_tainted(), init_utsname()->release);
  584. printk("MSR: "REG" ", regs->msr);
  585. printbits(regs->msr, msr_bits);
  586. printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
  587. #ifdef CONFIG_PPC64
  588. printk("SOFTE: %ld\n", regs->softe);
  589. #endif
  590. trap = TRAP(regs);
  591. if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
  592. printk("CFAR: "REG"\n", regs->orig_gpr3);
  593. if (trap == 0x300 || trap == 0x600)
  594. #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
  595. printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
  596. #else
  597. printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
  598. #endif
  599. printk("TASK = %p[%d] '%s' THREAD: %p",
  600. current, task_pid_nr(current), current->comm, task_thread_info(current));
  601. #ifdef CONFIG_SMP
  602. printk(" CPU: %d", raw_smp_processor_id());
  603. #endif /* CONFIG_SMP */
  604. for (i = 0; i < 32; i++) {
  605. if ((i % REGS_PER_LINE) == 0)
  606. printk("\nGPR%02d: ", i);
  607. printk(REG " ", regs->gpr[i]);
  608. if (i == LAST_VOLATILE && !FULL_REGS(regs))
  609. break;
  610. }
  611. printk("\n");
  612. #ifdef CONFIG_KALLSYMS
  613. /*
  614. * Lookup NIP late so we have the best change of getting the
  615. * above info out without failing
  616. */
  617. printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
  618. printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
  619. #endif
  620. show_stack(current, (unsigned long *) regs->gpr[1]);
  621. if (!user_mode(regs))
  622. show_instructions(regs);
  623. }
  624. void exit_thread(void)
  625. {
  626. discard_lazy_cpu_state();
  627. }
  628. void flush_thread(void)
  629. {
  630. discard_lazy_cpu_state();
  631. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  632. flush_ptrace_hw_breakpoint(current);
  633. #else /* CONFIG_HAVE_HW_BREAKPOINT */
  634. set_debug_reg_defaults(&current->thread);
  635. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  636. }
  637. void
  638. release_thread(struct task_struct *t)
  639. {
  640. }
  641. /*
  642. * this gets called so that we can store coprocessor state into memory and
  643. * copy the current task into the new thread.
  644. */
  645. int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  646. {
  647. flush_fp_to_thread(src);
  648. flush_altivec_to_thread(src);
  649. flush_vsx_to_thread(src);
  650. flush_spe_to_thread(src);
  651. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  652. flush_ptrace_hw_breakpoint(src);
  653. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  654. *dst = *src;
  655. return 0;
  656. }
  657. /*
  658. * Copy a thread..
  659. */
  660. extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
  661. int copy_thread(unsigned long clone_flags, unsigned long usp,
  662. unsigned long unused, struct task_struct *p,
  663. struct pt_regs *regs)
  664. {
  665. struct pt_regs *childregs, *kregs;
  666. extern void ret_from_fork(void);
  667. unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
  668. CHECK_FULL_REGS(regs);
  669. /* Copy registers */
  670. sp -= sizeof(struct pt_regs);
  671. childregs = (struct pt_regs *) sp;
  672. *childregs = *regs;
  673. if ((childregs->msr & MSR_PR) == 0) {
  674. /* for kernel thread, set `current' and stackptr in new task */
  675. childregs->gpr[1] = sp + sizeof(struct pt_regs);
  676. #ifdef CONFIG_PPC32
  677. childregs->gpr[2] = (unsigned long) p;
  678. #else
  679. clear_tsk_thread_flag(p, TIF_32BIT);
  680. #endif
  681. p->thread.regs = NULL; /* no user register state */
  682. } else {
  683. childregs->gpr[1] = usp;
  684. p->thread.regs = childregs;
  685. if (clone_flags & CLONE_SETTLS) {
  686. #ifdef CONFIG_PPC64
  687. if (!is_32bit_task())
  688. childregs->gpr[13] = childregs->gpr[6];
  689. else
  690. #endif
  691. childregs->gpr[2] = childregs->gpr[6];
  692. }
  693. }
  694. childregs->gpr[3] = 0; /* Result from fork() */
  695. sp -= STACK_FRAME_OVERHEAD;
  696. /*
  697. * The way this works is that at some point in the future
  698. * some task will call _switch to switch to the new task.
  699. * That will pop off the stack frame created below and start
  700. * the new task running at ret_from_fork. The new task will
  701. * do some house keeping and then return from the fork or clone
  702. * system call, using the stack frame created above.
  703. */
  704. sp -= sizeof(struct pt_regs);
  705. kregs = (struct pt_regs *) sp;
  706. sp -= STACK_FRAME_OVERHEAD;
  707. p->thread.ksp = sp;
  708. p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
  709. _ALIGN_UP(sizeof(struct thread_info), 16);
  710. #ifdef CONFIG_PPC_STD_MMU_64
  711. if (mmu_has_feature(MMU_FTR_SLB)) {
  712. unsigned long sp_vsid;
  713. unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
  714. if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
  715. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
  716. << SLB_VSID_SHIFT_1T;
  717. else
  718. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
  719. << SLB_VSID_SHIFT;
  720. sp_vsid |= SLB_VSID_KERNEL | llp;
  721. p->thread.ksp_vsid = sp_vsid;
  722. }
  723. #endif /* CONFIG_PPC_STD_MMU_64 */
  724. #ifdef CONFIG_PPC64
  725. if (cpu_has_feature(CPU_FTR_DSCR)) {
  726. if (current->thread.dscr_inherit) {
  727. p->thread.dscr_inherit = 1;
  728. p->thread.dscr = current->thread.dscr;
  729. } else if (0 != dscr_default) {
  730. p->thread.dscr_inherit = 1;
  731. p->thread.dscr = dscr_default;
  732. } else {
  733. p->thread.dscr_inherit = 0;
  734. p->thread.dscr = 0;
  735. }
  736. }
  737. #endif
  738. /*
  739. * The PPC64 ABI makes use of a TOC to contain function
  740. * pointers. The function (ret_from_except) is actually a pointer
  741. * to the TOC entry. The first entry is a pointer to the actual
  742. * function.
  743. */
  744. #ifdef CONFIG_PPC64
  745. kregs->nip = *((unsigned long *)ret_from_fork);
  746. #else
  747. kregs->nip = (unsigned long)ret_from_fork;
  748. #endif
  749. return 0;
  750. }
  751. /*
  752. * Set up a thread for executing a new program
  753. */
  754. void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
  755. {
  756. #ifdef CONFIG_PPC64
  757. unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
  758. #endif
  759. /*
  760. * If we exec out of a kernel thread then thread.regs will not be
  761. * set. Do it now.
  762. */
  763. if (!current->thread.regs) {
  764. struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
  765. current->thread.regs = regs - 1;
  766. }
  767. memset(regs->gpr, 0, sizeof(regs->gpr));
  768. regs->ctr = 0;
  769. regs->link = 0;
  770. regs->xer = 0;
  771. regs->ccr = 0;
  772. regs->gpr[1] = sp;
  773. /*
  774. * We have just cleared all the nonvolatile GPRs, so make
  775. * FULL_REGS(regs) return true. This is necessary to allow
  776. * ptrace to examine the thread immediately after exec.
  777. */
  778. regs->trap &= ~1UL;
  779. #ifdef CONFIG_PPC32
  780. regs->mq = 0;
  781. regs->nip = start;
  782. regs->msr = MSR_USER;
  783. #else
  784. if (!is_32bit_task()) {
  785. unsigned long entry, toc;
  786. /* start is a relocated pointer to the function descriptor for
  787. * the elf _start routine. The first entry in the function
  788. * descriptor is the entry address of _start and the second
  789. * entry is the TOC value we need to use.
  790. */
  791. __get_user(entry, (unsigned long __user *)start);
  792. __get_user(toc, (unsigned long __user *)start+1);
  793. /* Check whether the e_entry function descriptor entries
  794. * need to be relocated before we can use them.
  795. */
  796. if (load_addr != 0) {
  797. entry += load_addr;
  798. toc += load_addr;
  799. }
  800. regs->nip = entry;
  801. regs->gpr[2] = toc;
  802. regs->msr = MSR_USER64;
  803. } else {
  804. regs->nip = start;
  805. regs->gpr[2] = 0;
  806. regs->msr = MSR_USER32;
  807. }
  808. #endif
  809. discard_lazy_cpu_state();
  810. #ifdef CONFIG_VSX
  811. current->thread.used_vsr = 0;
  812. #endif
  813. memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
  814. current->thread.fpscr.val = 0;
  815. #ifdef CONFIG_ALTIVEC
  816. memset(current->thread.vr, 0, sizeof(current->thread.vr));
  817. memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
  818. current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
  819. current->thread.vrsave = 0;
  820. current->thread.used_vr = 0;
  821. #endif /* CONFIG_ALTIVEC */
  822. #ifdef CONFIG_SPE
  823. memset(current->thread.evr, 0, sizeof(current->thread.evr));
  824. current->thread.acc = 0;
  825. current->thread.spefscr = 0;
  826. current->thread.used_spe = 0;
  827. #endif /* CONFIG_SPE */
  828. }
  829. #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
  830. | PR_FP_EXC_RES | PR_FP_EXC_INV)
  831. int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
  832. {
  833. struct pt_regs *regs = tsk->thread.regs;
  834. /* This is a bit hairy. If we are an SPE enabled processor
  835. * (have embedded fp) we store the IEEE exception enable flags in
  836. * fpexc_mode. fpexc_mode is also used for setting FP exception
  837. * mode (asyn, precise, disabled) for 'Classic' FP. */
  838. if (val & PR_FP_EXC_SW_ENABLE) {
  839. #ifdef CONFIG_SPE
  840. if (cpu_has_feature(CPU_FTR_SPE)) {
  841. tsk->thread.fpexc_mode = val &
  842. (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
  843. return 0;
  844. } else {
  845. return -EINVAL;
  846. }
  847. #else
  848. return -EINVAL;
  849. #endif
  850. }
  851. /* on a CONFIG_SPE this does not hurt us. The bits that
  852. * __pack_fe01 use do not overlap with bits used for
  853. * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
  854. * on CONFIG_SPE implementations are reserved so writing to
  855. * them does not change anything */
  856. if (val > PR_FP_EXC_PRECISE)
  857. return -EINVAL;
  858. tsk->thread.fpexc_mode = __pack_fe01(val);
  859. if (regs != NULL && (regs->msr & MSR_FP) != 0)
  860. regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
  861. | tsk->thread.fpexc_mode;
  862. return 0;
  863. }
  864. int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
  865. {
  866. unsigned int val;
  867. if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
  868. #ifdef CONFIG_SPE
  869. if (cpu_has_feature(CPU_FTR_SPE))
  870. val = tsk->thread.fpexc_mode;
  871. else
  872. return -EINVAL;
  873. #else
  874. return -EINVAL;
  875. #endif
  876. else
  877. val = __unpack_fe01(tsk->thread.fpexc_mode);
  878. return put_user(val, (unsigned int __user *) adr);
  879. }
  880. int set_endian(struct task_struct *tsk, unsigned int val)
  881. {
  882. struct pt_regs *regs = tsk->thread.regs;
  883. if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
  884. (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
  885. return -EINVAL;
  886. if (regs == NULL)
  887. return -EINVAL;
  888. if (val == PR_ENDIAN_BIG)
  889. regs->msr &= ~MSR_LE;
  890. else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
  891. regs->msr |= MSR_LE;
  892. else
  893. return -EINVAL;
  894. return 0;
  895. }
  896. int get_endian(struct task_struct *tsk, unsigned long adr)
  897. {
  898. struct pt_regs *regs = tsk->thread.regs;
  899. unsigned int val;
  900. if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
  901. !cpu_has_feature(CPU_FTR_REAL_LE))
  902. return -EINVAL;
  903. if (regs == NULL)
  904. return -EINVAL;
  905. if (regs->msr & MSR_LE) {
  906. if (cpu_has_feature(CPU_FTR_REAL_LE))
  907. val = PR_ENDIAN_LITTLE;
  908. else
  909. val = PR_ENDIAN_PPC_LITTLE;
  910. } else
  911. val = PR_ENDIAN_BIG;
  912. return put_user(val, (unsigned int __user *)adr);
  913. }
  914. int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
  915. {
  916. tsk->thread.align_ctl = val;
  917. return 0;
  918. }
  919. int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
  920. {
  921. return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
  922. }
  923. #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
  924. int sys_clone(unsigned long clone_flags, unsigned long usp,
  925. int __user *parent_tidp, void __user *child_threadptr,
  926. int __user *child_tidp, int p6,
  927. struct pt_regs *regs)
  928. {
  929. CHECK_FULL_REGS(regs);
  930. if (usp == 0)
  931. usp = regs->gpr[1]; /* stack pointer for child */
  932. #ifdef CONFIG_PPC64
  933. if (is_32bit_task()) {
  934. parent_tidp = TRUNC_PTR(parent_tidp);
  935. child_tidp = TRUNC_PTR(child_tidp);
  936. }
  937. #endif
  938. return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
  939. }
  940. int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
  941. unsigned long p4, unsigned long p5, unsigned long p6,
  942. struct pt_regs *regs)
  943. {
  944. CHECK_FULL_REGS(regs);
  945. return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
  946. }
  947. int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
  948. unsigned long p4, unsigned long p5, unsigned long p6,
  949. struct pt_regs *regs)
  950. {
  951. CHECK_FULL_REGS(regs);
  952. return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
  953. regs, 0, NULL, NULL);
  954. }
  955. int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
  956. unsigned long a3, unsigned long a4, unsigned long a5,
  957. struct pt_regs *regs)
  958. {
  959. int error;
  960. char *filename;
  961. filename = getname((const char __user *) a0);
  962. error = PTR_ERR(filename);
  963. if (IS_ERR(filename))
  964. goto out;
  965. flush_fp_to_thread(current);
  966. flush_altivec_to_thread(current);
  967. flush_spe_to_thread(current);
  968. error = do_execve(filename,
  969. (const char __user *const __user *) a1,
  970. (const char __user *const __user *) a2, regs);
  971. putname(filename);
  972. out:
  973. return error;
  974. }
  975. static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
  976. unsigned long nbytes)
  977. {
  978. unsigned long stack_page;
  979. unsigned long cpu = task_cpu(p);
  980. /*
  981. * Avoid crashing if the stack has overflowed and corrupted
  982. * task_cpu(p), which is in the thread_info struct.
  983. */
  984. if (cpu < NR_CPUS && cpu_possible(cpu)) {
  985. stack_page = (unsigned long) hardirq_ctx[cpu];
  986. if (sp >= stack_page + sizeof(struct thread_struct)
  987. && sp <= stack_page + THREAD_SIZE - nbytes)
  988. return 1;
  989. stack_page = (unsigned long) softirq_ctx[cpu];
  990. if (sp >= stack_page + sizeof(struct thread_struct)
  991. && sp <= stack_page + THREAD_SIZE - nbytes)
  992. return 1;
  993. }
  994. return 0;
  995. }
  996. int validate_sp(unsigned long sp, struct task_struct *p,
  997. unsigned long nbytes)
  998. {
  999. unsigned long stack_page = (unsigned long)task_stack_page(p);
  1000. if (sp >= stack_page + sizeof(struct thread_struct)
  1001. && sp <= stack_page + THREAD_SIZE - nbytes)
  1002. return 1;
  1003. return valid_irq_stack(sp, p, nbytes);
  1004. }
  1005. EXPORT_SYMBOL(validate_sp);
  1006. unsigned long get_wchan(struct task_struct *p)
  1007. {
  1008. unsigned long ip, sp;
  1009. int count = 0;
  1010. if (!p || p == current || p->state == TASK_RUNNING)
  1011. return 0;
  1012. sp = p->thread.ksp;
  1013. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  1014. return 0;
  1015. do {
  1016. sp = *(unsigned long *)sp;
  1017. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  1018. return 0;
  1019. if (count > 0) {
  1020. ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
  1021. if (!in_sched_functions(ip))
  1022. return ip;
  1023. }
  1024. } while (count++ < 16);
  1025. return 0;
  1026. }
  1027. static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
  1028. void show_stack(struct task_struct *tsk, unsigned long *stack)
  1029. {
  1030. unsigned long sp, ip, lr, newsp;
  1031. int count = 0;
  1032. int firstframe = 1;
  1033. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1034. int curr_frame = current->curr_ret_stack;
  1035. extern void return_to_handler(void);
  1036. unsigned long rth = (unsigned long)return_to_handler;
  1037. unsigned long mrth = -1;
  1038. #ifdef CONFIG_PPC64
  1039. extern void mod_return_to_handler(void);
  1040. rth = *(unsigned long *)rth;
  1041. mrth = (unsigned long)mod_return_to_handler;
  1042. mrth = *(unsigned long *)mrth;
  1043. #endif
  1044. #endif
  1045. sp = (unsigned long) stack;
  1046. if (tsk == NULL)
  1047. tsk = current;
  1048. if (sp == 0) {
  1049. if (tsk == current)
  1050. asm("mr %0,1" : "=r" (sp));
  1051. else
  1052. sp = tsk->thread.ksp;
  1053. }
  1054. lr = 0;
  1055. printk("Call Trace:\n");
  1056. do {
  1057. if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
  1058. return;
  1059. stack = (unsigned long *) sp;
  1060. newsp = stack[0];
  1061. ip = stack[STACK_FRAME_LR_SAVE];
  1062. if (!firstframe || ip != lr) {
  1063. printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
  1064. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1065. if ((ip == rth || ip == mrth) && curr_frame >= 0) {
  1066. printk(" (%pS)",
  1067. (void *)current->ret_stack[curr_frame].ret);
  1068. curr_frame--;
  1069. }
  1070. #endif
  1071. if (firstframe)
  1072. printk(" (unreliable)");
  1073. printk("\n");
  1074. }
  1075. firstframe = 0;
  1076. /*
  1077. * See if this is an exception frame.
  1078. * We look for the "regshere" marker in the current frame.
  1079. */
  1080. if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
  1081. && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
  1082. struct pt_regs *regs = (struct pt_regs *)
  1083. (sp + STACK_FRAME_OVERHEAD);
  1084. lr = regs->link;
  1085. printk("--- Exception: %lx at %pS\n LR = %pS\n",
  1086. regs->trap, (void *)regs->nip, (void *)lr);
  1087. firstframe = 1;
  1088. }
  1089. sp = newsp;
  1090. } while (count++ < kstack_depth_to_print);
  1091. }
  1092. void dump_stack(void)
  1093. {
  1094. show_stack(current, NULL);
  1095. }
  1096. EXPORT_SYMBOL(dump_stack);
  1097. #ifdef CONFIG_PPC64
  1098. /* Called with hard IRQs off */
  1099. void __ppc64_runlatch_on(void)
  1100. {
  1101. struct thread_info *ti = current_thread_info();
  1102. unsigned long ctrl;
  1103. ctrl = mfspr(SPRN_CTRLF);
  1104. ctrl |= CTRL_RUNLATCH;
  1105. mtspr(SPRN_CTRLT, ctrl);
  1106. ti->local_flags |= _TLF_RUNLATCH;
  1107. }
  1108. /* Called with hard IRQs off */
  1109. void __ppc64_runlatch_off(void)
  1110. {
  1111. struct thread_info *ti = current_thread_info();
  1112. unsigned long ctrl;
  1113. ti->local_flags &= ~_TLF_RUNLATCH;
  1114. ctrl = mfspr(SPRN_CTRLF);
  1115. ctrl &= ~CTRL_RUNLATCH;
  1116. mtspr(SPRN_CTRLT, ctrl);
  1117. }
  1118. #endif /* CONFIG_PPC64 */
  1119. unsigned long arch_align_stack(unsigned long sp)
  1120. {
  1121. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  1122. sp -= get_random_int() & ~PAGE_MASK;
  1123. return sp & ~0xf;
  1124. }
  1125. static inline unsigned long brk_rnd(void)
  1126. {
  1127. unsigned long rnd = 0;
  1128. /* 8MB for 32bit, 1GB for 64bit */
  1129. if (is_32bit_task())
  1130. rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
  1131. else
  1132. rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
  1133. return rnd << PAGE_SHIFT;
  1134. }
  1135. unsigned long arch_randomize_brk(struct mm_struct *mm)
  1136. {
  1137. unsigned long base = mm->brk;
  1138. unsigned long ret;
  1139. #ifdef CONFIG_PPC_STD_MMU_64
  1140. /*
  1141. * If we are using 1TB segments and we are allowed to randomise
  1142. * the heap, we can put it above 1TB so it is backed by a 1TB
  1143. * segment. Otherwise the heap will be in the bottom 1TB
  1144. * which always uses 256MB segments and this may result in a
  1145. * performance penalty.
  1146. */
  1147. if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
  1148. base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
  1149. #endif
  1150. ret = PAGE_ALIGN(base + brk_rnd());
  1151. if (ret < mm->brk)
  1152. return mm->brk;
  1153. return ret;
  1154. }
  1155. unsigned long randomize_et_dyn(unsigned long base)
  1156. {
  1157. unsigned long ret = PAGE_ALIGN(base + brk_rnd());
  1158. if (ret < base)
  1159. return base;
  1160. return ret;
  1161. }