db1300.h 1.3 KB

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  1. /*
  2. * NetLogic DB1300 board constants
  3. */
  4. #ifndef _DB1300_H_
  5. #define _DB1300_H_
  6. /* FPGA (external mux) interrupt sources */
  7. #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
  8. #define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
  9. #define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
  10. #define DB1300_CF_INT (DB1300_FIRST_INT + 2)
  11. #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
  12. #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
  13. #define DB1300_DC_INT (DB1300_FIRST_INT + 6)
  14. #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
  15. #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
  16. #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
  17. #define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
  18. #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
  19. #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
  20. #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
  21. #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
  22. #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
  23. #define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
  24. /* SMSC9210 CS */
  25. #define DB1300_ETH_PHYS_ADDR 0x19000000
  26. #define DB1300_ETH_PHYS_END 0x197fffff
  27. /* ATA CS */
  28. #define DB1300_IDE_PHYS_ADDR 0x18800000
  29. #define DB1300_IDE_REG_SHIFT 5
  30. #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
  31. /* NAND CS */
  32. #define DB1300_NAND_PHYS_ADDR 0x20000000
  33. #define DB1300_NAND_PHYS_END 0x20000fff
  34. #endif /* _DB1300_H_ */