m5272.c 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110
  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/5272/config.c
  4. *
  5. * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
  6. * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
  7. */
  8. /***************************************************************************/
  9. #include <linux/kernel.h>
  10. #include <linux/param.h>
  11. #include <linux/init.h>
  12. #include <linux/io.h>
  13. #include <linux/phy.h>
  14. #include <linux/phy_fixed.h>
  15. #include <asm/machdep.h>
  16. #include <asm/coldfire.h>
  17. #include <asm/mcfsim.h>
  18. #include <asm/mcfuart.h>
  19. /***************************************************************************/
  20. /*
  21. * Some platforms need software versions of the GPIO data registers.
  22. */
  23. unsigned short ppdata;
  24. unsigned char ledbank = 0xff;
  25. /***************************************************************************/
  26. static void __init m5272_uarts_init(void)
  27. {
  28. u32 v;
  29. /* Enable the output lines for the serial ports */
  30. v = readl(MCF_MBAR + MCFSIM_PBCNT);
  31. v = (v & ~0x000000ff) | 0x00000055;
  32. writel(v, MCF_MBAR + MCFSIM_PBCNT);
  33. v = readl(MCF_MBAR + MCFSIM_PDCNT);
  34. v = (v & ~0x000003fc) | 0x000002a8;
  35. writel(v, MCF_MBAR + MCFSIM_PDCNT);
  36. }
  37. /***************************************************************************/
  38. static void m5272_cpu_reset(void)
  39. {
  40. local_irq_disable();
  41. /* Set watchdog to reset, and enabled */
  42. __raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
  43. __raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
  44. __raw_writew(0, MCF_MBAR + MCFSIM_WCR);
  45. for (;;)
  46. /* wait for watchdog to timeout */;
  47. }
  48. /***************************************************************************/
  49. void __init config_BSP(char *commandp, int size)
  50. {
  51. #if defined (CONFIG_MOD5272)
  52. volatile unsigned char *pivrp;
  53. /* Set base of device vectors to be 64 */
  54. pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
  55. *pivrp = 0x40;
  56. #endif
  57. #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
  58. /* Copy command line from FLASH to local buffer... */
  59. memcpy(commandp, (char *) 0xf0004000, size);
  60. commandp[size-1] = 0;
  61. #elif defined(CONFIG_CANCam)
  62. /* Copy command line from FLASH to local buffer... */
  63. memcpy(commandp, (char *) 0xf0010000, size);
  64. commandp[size-1] = 0;
  65. #endif
  66. mach_reset = m5272_cpu_reset;
  67. mach_sched_init = hw_timer_init;
  68. }
  69. /***************************************************************************/
  70. /*
  71. * Some 5272 based boards have the FEC ethernet diectly connected to
  72. * an ethernet switch. In this case we need to use the fixed phy type,
  73. * and we need to declare it early in boot.
  74. */
  75. static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
  76. .link = 1,
  77. .speed = 100,
  78. .duplex = 0,
  79. };
  80. /***************************************************************************/
  81. static int __init init_BSP(void)
  82. {
  83. m5272_uarts_init();
  84. fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
  85. return 0;
  86. }
  87. arch_initcall(init_BSP);
  88. /***************************************************************************/