traps.c 30 KB

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  1. /*
  2. * linux/arch/m68k/kernel/traps.c
  3. *
  4. * Copyright (C) 1993, 1994 by Hamish Macdonald
  5. *
  6. * 68040 fixes by Michael Rausch
  7. * 68040 fixes by Martin Apel
  8. * 68040 fixes and writeback by Richard Zidlicky
  9. * 68060 fixes by Roman Hodek
  10. * 68060 fixes by Jesper Skov
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file COPYING in the main directory of this archive
  14. * for more details.
  15. */
  16. /*
  17. * Sets up all exception vectors
  18. */
  19. #include <linux/sched.h>
  20. #include <linux/signal.h>
  21. #include <linux/kernel.h>
  22. #include <linux/mm.h>
  23. #include <linux/module.h>
  24. #include <linux/user.h>
  25. #include <linux/string.h>
  26. #include <linux/linkage.h>
  27. #include <linux/init.h>
  28. #include <linux/ptrace.h>
  29. #include <linux/kallsyms.h>
  30. #include <asm/setup.h>
  31. #include <asm/fpu.h>
  32. #include <asm/uaccess.h>
  33. #include <asm/traps.h>
  34. #include <asm/pgalloc.h>
  35. #include <asm/machdep.h>
  36. #include <asm/siginfo.h>
  37. static const char *vec_names[] = {
  38. [VEC_RESETSP] = "RESET SP",
  39. [VEC_RESETPC] = "RESET PC",
  40. [VEC_BUSERR] = "BUS ERROR",
  41. [VEC_ADDRERR] = "ADDRESS ERROR",
  42. [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
  43. [VEC_ZERODIV] = "ZERO DIVIDE",
  44. [VEC_CHK] = "CHK",
  45. [VEC_TRAP] = "TRAPcc",
  46. [VEC_PRIV] = "PRIVILEGE VIOLATION",
  47. [VEC_TRACE] = "TRACE",
  48. [VEC_LINE10] = "LINE 1010",
  49. [VEC_LINE11] = "LINE 1111",
  50. [VEC_RESV12] = "UNASSIGNED RESERVED 12",
  51. [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
  52. [VEC_FORMAT] = "FORMAT ERROR",
  53. [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
  54. [VEC_RESV16] = "UNASSIGNED RESERVED 16",
  55. [VEC_RESV17] = "UNASSIGNED RESERVED 17",
  56. [VEC_RESV18] = "UNASSIGNED RESERVED 18",
  57. [VEC_RESV19] = "UNASSIGNED RESERVED 19",
  58. [VEC_RESV20] = "UNASSIGNED RESERVED 20",
  59. [VEC_RESV21] = "UNASSIGNED RESERVED 21",
  60. [VEC_RESV22] = "UNASSIGNED RESERVED 22",
  61. [VEC_RESV23] = "UNASSIGNED RESERVED 23",
  62. [VEC_SPUR] = "SPURIOUS INTERRUPT",
  63. [VEC_INT1] = "LEVEL 1 INT",
  64. [VEC_INT2] = "LEVEL 2 INT",
  65. [VEC_INT3] = "LEVEL 3 INT",
  66. [VEC_INT4] = "LEVEL 4 INT",
  67. [VEC_INT5] = "LEVEL 5 INT",
  68. [VEC_INT6] = "LEVEL 6 INT",
  69. [VEC_INT7] = "LEVEL 7 INT",
  70. [VEC_SYS] = "SYSCALL",
  71. [VEC_TRAP1] = "TRAP #1",
  72. [VEC_TRAP2] = "TRAP #2",
  73. [VEC_TRAP3] = "TRAP #3",
  74. [VEC_TRAP4] = "TRAP #4",
  75. [VEC_TRAP5] = "TRAP #5",
  76. [VEC_TRAP6] = "TRAP #6",
  77. [VEC_TRAP7] = "TRAP #7",
  78. [VEC_TRAP8] = "TRAP #8",
  79. [VEC_TRAP9] = "TRAP #9",
  80. [VEC_TRAP10] = "TRAP #10",
  81. [VEC_TRAP11] = "TRAP #11",
  82. [VEC_TRAP12] = "TRAP #12",
  83. [VEC_TRAP13] = "TRAP #13",
  84. [VEC_TRAP14] = "TRAP #14",
  85. [VEC_TRAP15] = "TRAP #15",
  86. [VEC_FPBRUC] = "FPCP BSUN",
  87. [VEC_FPIR] = "FPCP INEXACT",
  88. [VEC_FPDIVZ] = "FPCP DIV BY 0",
  89. [VEC_FPUNDER] = "FPCP UNDERFLOW",
  90. [VEC_FPOE] = "FPCP OPERAND ERROR",
  91. [VEC_FPOVER] = "FPCP OVERFLOW",
  92. [VEC_FPNAN] = "FPCP SNAN",
  93. [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
  94. [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
  95. [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
  96. [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
  97. [VEC_RESV59] = "UNASSIGNED RESERVED 59",
  98. [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
  99. [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
  100. [VEC_RESV62] = "UNASSIGNED RESERVED 62",
  101. [VEC_RESV63] = "UNASSIGNED RESERVED 63",
  102. };
  103. static const char *space_names[] = {
  104. [0] = "Space 0",
  105. [USER_DATA] = "User Data",
  106. [USER_PROGRAM] = "User Program",
  107. #ifndef CONFIG_SUN3
  108. [3] = "Space 3",
  109. #else
  110. [FC_CONTROL] = "Control",
  111. #endif
  112. [4] = "Space 4",
  113. [SUPER_DATA] = "Super Data",
  114. [SUPER_PROGRAM] = "Super Program",
  115. [CPU_SPACE] = "CPU"
  116. };
  117. void die_if_kernel(char *,struct pt_regs *,int);
  118. asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
  119. unsigned long error_code);
  120. int send_fault_sig(struct pt_regs *regs);
  121. asmlinkage void trap_c(struct frame *fp);
  122. #if defined (CONFIG_M68060)
  123. static inline void access_error060 (struct frame *fp)
  124. {
  125. unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
  126. #ifdef DEBUG
  127. printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
  128. #endif
  129. if (fslw & MMU060_BPE) {
  130. /* branch prediction error -> clear branch cache */
  131. __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
  132. "orl #0x00400000,%/d0\n\t"
  133. "movec %/d0,%/cacr"
  134. : : : "d0" );
  135. /* return if there's no other error */
  136. if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
  137. return;
  138. }
  139. if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
  140. unsigned long errorcode;
  141. unsigned long addr = fp->un.fmt4.effaddr;
  142. if (fslw & MMU060_MA)
  143. addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
  144. errorcode = 1;
  145. if (fslw & MMU060_DESC_ERR) {
  146. __flush_tlb040_one(addr);
  147. errorcode = 0;
  148. }
  149. if (fslw & MMU060_W)
  150. errorcode |= 2;
  151. #ifdef DEBUG
  152. printk("errorcode = %d\n", errorcode );
  153. #endif
  154. do_page_fault(&fp->ptregs, addr, errorcode);
  155. } else if (fslw & (MMU060_SEE)){
  156. /* Software Emulation Error.
  157. * fault during mem_read/mem_write in ifpsp060/os.S
  158. */
  159. send_fault_sig(&fp->ptregs);
  160. } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
  161. send_fault_sig(&fp->ptregs) > 0) {
  162. printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
  163. printk( "68060 access error, fslw=%lx\n", fslw );
  164. trap_c( fp );
  165. }
  166. }
  167. #endif /* CONFIG_M68060 */
  168. #if defined (CONFIG_M68040)
  169. static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
  170. {
  171. unsigned long mmusr;
  172. mm_segment_t old_fs = get_fs();
  173. set_fs(MAKE_MM_SEG(wbs));
  174. if (iswrite)
  175. asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
  176. else
  177. asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
  178. asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
  179. set_fs(old_fs);
  180. return mmusr;
  181. }
  182. static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
  183. unsigned long wbd)
  184. {
  185. int res = 0;
  186. mm_segment_t old_fs = get_fs();
  187. /* set_fs can not be moved, otherwise put_user() may oops */
  188. set_fs(MAKE_MM_SEG(wbs));
  189. switch (wbs & WBSIZ_040) {
  190. case BA_SIZE_BYTE:
  191. res = put_user(wbd & 0xff, (char __user *)wba);
  192. break;
  193. case BA_SIZE_WORD:
  194. res = put_user(wbd & 0xffff, (short __user *)wba);
  195. break;
  196. case BA_SIZE_LONG:
  197. res = put_user(wbd, (int __user *)wba);
  198. break;
  199. }
  200. /* set_fs can not be moved, otherwise put_user() may oops */
  201. set_fs(old_fs);
  202. #ifdef DEBUG
  203. printk("do_040writeback1, res=%d\n",res);
  204. #endif
  205. return res;
  206. }
  207. /* after an exception in a writeback the stack frame corresponding
  208. * to that exception is discarded, set a few bits in the old frame
  209. * to simulate what it should look like
  210. */
  211. static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
  212. {
  213. fp->un.fmt7.faddr = wba;
  214. fp->un.fmt7.ssw = wbs & 0xff;
  215. if (wba != current->thread.faddr)
  216. fp->un.fmt7.ssw |= MA_040;
  217. }
  218. static inline void do_040writebacks(struct frame *fp)
  219. {
  220. int res = 0;
  221. #if 0
  222. if (fp->un.fmt7.wb1s & WBV_040)
  223. printk("access_error040: cannot handle 1st writeback. oops.\n");
  224. #endif
  225. if ((fp->un.fmt7.wb2s & WBV_040) &&
  226. !(fp->un.fmt7.wb2s & WBTT_040)) {
  227. res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
  228. fp->un.fmt7.wb2d);
  229. if (res)
  230. fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
  231. else
  232. fp->un.fmt7.wb2s = 0;
  233. }
  234. /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
  235. if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
  236. res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
  237. fp->un.fmt7.wb3d);
  238. if (res)
  239. {
  240. fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
  241. fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
  242. fp->un.fmt7.wb3s &= (~WBV_040);
  243. fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
  244. fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
  245. }
  246. else
  247. fp->un.fmt7.wb3s = 0;
  248. }
  249. if (res)
  250. send_fault_sig(&fp->ptregs);
  251. }
  252. /*
  253. * called from sigreturn(), must ensure userspace code didn't
  254. * manipulate exception frame to circumvent protection, then complete
  255. * pending writebacks
  256. * we just clear TM2 to turn it into a userspace access
  257. */
  258. asmlinkage void berr_040cleanup(struct frame *fp)
  259. {
  260. fp->un.fmt7.wb2s &= ~4;
  261. fp->un.fmt7.wb3s &= ~4;
  262. do_040writebacks(fp);
  263. }
  264. static inline void access_error040(struct frame *fp)
  265. {
  266. unsigned short ssw = fp->un.fmt7.ssw;
  267. unsigned long mmusr;
  268. #ifdef DEBUG
  269. printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
  270. printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
  271. fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
  272. printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
  273. fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
  274. fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
  275. #endif
  276. if (ssw & ATC_040) {
  277. unsigned long addr = fp->un.fmt7.faddr;
  278. unsigned long errorcode;
  279. /*
  280. * The MMU status has to be determined AFTER the address
  281. * has been corrected if there was a misaligned access (MA).
  282. */
  283. if (ssw & MA_040)
  284. addr = (addr + 7) & -8;
  285. /* MMU error, get the MMUSR info for this access */
  286. mmusr = probe040(!(ssw & RW_040), addr, ssw);
  287. #ifdef DEBUG
  288. printk("mmusr = %lx\n", mmusr);
  289. #endif
  290. errorcode = 1;
  291. if (!(mmusr & MMU_R_040)) {
  292. /* clear the invalid atc entry */
  293. __flush_tlb040_one(addr);
  294. errorcode = 0;
  295. }
  296. /* despite what documentation seems to say, RMW
  297. * accesses have always both the LK and RW bits set */
  298. if (!(ssw & RW_040) || (ssw & LK_040))
  299. errorcode |= 2;
  300. if (do_page_fault(&fp->ptregs, addr, errorcode)) {
  301. #ifdef DEBUG
  302. printk("do_page_fault() !=0\n");
  303. #endif
  304. if (user_mode(&fp->ptregs)){
  305. /* delay writebacks after signal delivery */
  306. #ifdef DEBUG
  307. printk(".. was usermode - return\n");
  308. #endif
  309. return;
  310. }
  311. /* disable writeback into user space from kernel
  312. * (if do_page_fault didn't fix the mapping,
  313. * the writeback won't do good)
  314. */
  315. disable_wb:
  316. #ifdef DEBUG
  317. printk(".. disabling wb2\n");
  318. #endif
  319. if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
  320. fp->un.fmt7.wb2s &= ~WBV_040;
  321. if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
  322. fp->un.fmt7.wb3s &= ~WBV_040;
  323. }
  324. } else {
  325. /* In case of a bus error we either kill the process or expect
  326. * the kernel to catch the fault, which then is also responsible
  327. * for cleaning up the mess.
  328. */
  329. current->thread.signo = SIGBUS;
  330. current->thread.faddr = fp->un.fmt7.faddr;
  331. if (send_fault_sig(&fp->ptregs) >= 0)
  332. printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
  333. fp->un.fmt7.faddr);
  334. goto disable_wb;
  335. }
  336. do_040writebacks(fp);
  337. }
  338. #endif /* CONFIG_M68040 */
  339. #if defined(CONFIG_SUN3)
  340. #include <asm/sun3mmu.h>
  341. extern int mmu_emu_handle_fault (unsigned long, int, int);
  342. /* sun3 version of bus_error030 */
  343. static inline void bus_error030 (struct frame *fp)
  344. {
  345. unsigned char buserr_type = sun3_get_buserr ();
  346. unsigned long addr, errorcode;
  347. unsigned short ssw = fp->un.fmtb.ssw;
  348. extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
  349. #ifdef DEBUG
  350. if (ssw & (FC | FB))
  351. printk ("Instruction fault at %#010lx\n",
  352. ssw & FC ?
  353. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  354. :
  355. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  356. if (ssw & DF)
  357. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  358. ssw & RW ? "read" : "write",
  359. fp->un.fmtb.daddr,
  360. space_names[ssw & DFC], fp->ptregs.pc);
  361. #endif
  362. /*
  363. * Check if this page should be demand-mapped. This needs to go before
  364. * the testing for a bad kernel-space access (demand-mapping applies
  365. * to kernel accesses too).
  366. */
  367. if ((ssw & DF)
  368. && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
  369. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
  370. return;
  371. }
  372. /* Check for kernel-space pagefault (BAD). */
  373. if (fp->ptregs.sr & PS_S) {
  374. /* kernel fault must be a data fault to user space */
  375. if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
  376. // try checking the kernel mappings before surrender
  377. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
  378. return;
  379. /* instruction fault or kernel data fault! */
  380. if (ssw & (FC | FB))
  381. printk ("Instruction fault at %#010lx\n",
  382. fp->ptregs.pc);
  383. if (ssw & DF) {
  384. /* was this fault incurred testing bus mappings? */
  385. if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
  386. (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
  387. send_fault_sig(&fp->ptregs);
  388. return;
  389. }
  390. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  391. ssw & RW ? "read" : "write",
  392. fp->un.fmtb.daddr,
  393. space_names[ssw & DFC], fp->ptregs.pc);
  394. }
  395. printk ("BAD KERNEL BUSERR\n");
  396. die_if_kernel("Oops", &fp->ptregs,0);
  397. force_sig(SIGKILL, current);
  398. return;
  399. }
  400. } else {
  401. /* user fault */
  402. if (!(ssw & (FC | FB)) && !(ssw & DF))
  403. /* not an instruction fault or data fault! BAD */
  404. panic ("USER BUSERR w/o instruction or data fault");
  405. }
  406. /* First handle the data fault, if any. */
  407. if (ssw & DF) {
  408. addr = fp->un.fmtb.daddr;
  409. // errorcode bit 0: 0 -> no page 1 -> protection fault
  410. // errorcode bit 1: 0 -> read fault 1 -> write fault
  411. // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
  412. // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
  413. if (buserr_type & SUN3_BUSERR_PROTERR)
  414. errorcode = 0x01;
  415. else if (buserr_type & SUN3_BUSERR_INVALID)
  416. errorcode = 0x00;
  417. else {
  418. #ifdef DEBUG
  419. printk ("*** unexpected busfault type=%#04x\n", buserr_type);
  420. printk ("invalid %s access at %#lx from pc %#lx\n",
  421. !(ssw & RW) ? "write" : "read", addr,
  422. fp->ptregs.pc);
  423. #endif
  424. die_if_kernel ("Oops", &fp->ptregs, buserr_type);
  425. force_sig (SIGBUS, current);
  426. return;
  427. }
  428. //todo: wtf is RM bit? --m
  429. if (!(ssw & RW) || ssw & RM)
  430. errorcode |= 0x02;
  431. /* Handle page fault. */
  432. do_page_fault (&fp->ptregs, addr, errorcode);
  433. /* Retry the data fault now. */
  434. return;
  435. }
  436. /* Now handle the instruction fault. */
  437. /* Get the fault address. */
  438. if (fp->ptregs.format == 0xA)
  439. addr = fp->ptregs.pc + 4;
  440. else
  441. addr = fp->un.fmtb.baddr;
  442. if (ssw & FC)
  443. addr -= 2;
  444. if (buserr_type & SUN3_BUSERR_INVALID) {
  445. if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
  446. do_page_fault (&fp->ptregs, addr, 0);
  447. } else {
  448. #ifdef DEBUG
  449. printk ("protection fault on insn access (segv).\n");
  450. #endif
  451. force_sig (SIGSEGV, current);
  452. }
  453. }
  454. #else
  455. #if defined(CPU_M68020_OR_M68030)
  456. static inline void bus_error030 (struct frame *fp)
  457. {
  458. volatile unsigned short temp;
  459. unsigned short mmusr;
  460. unsigned long addr, errorcode;
  461. unsigned short ssw = fp->un.fmtb.ssw;
  462. #ifdef DEBUG
  463. unsigned long desc;
  464. printk ("pid = %x ", current->pid);
  465. printk ("SSW=%#06x ", ssw);
  466. if (ssw & (FC | FB))
  467. printk ("Instruction fault at %#010lx\n",
  468. ssw & FC ?
  469. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  470. :
  471. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  472. if (ssw & DF)
  473. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  474. ssw & RW ? "read" : "write",
  475. fp->un.fmtb.daddr,
  476. space_names[ssw & DFC], fp->ptregs.pc);
  477. #endif
  478. /* ++andreas: If a data fault and an instruction fault happen
  479. at the same time map in both pages. */
  480. /* First handle the data fault, if any. */
  481. if (ssw & DF) {
  482. addr = fp->un.fmtb.daddr;
  483. #ifdef DEBUG
  484. asm volatile ("ptestr %3,%2@,#7,%0\n\t"
  485. "pmove %%psr,%1"
  486. : "=a&" (desc), "=m" (temp)
  487. : "a" (addr), "d" (ssw));
  488. #else
  489. asm volatile ("ptestr %2,%1@,#7\n\t"
  490. "pmove %%psr,%0"
  491. : "=m" (temp) : "a" (addr), "d" (ssw));
  492. #endif
  493. mmusr = temp;
  494. #ifdef DEBUG
  495. printk("mmusr is %#x for addr %#lx in task %p\n",
  496. mmusr, addr, current);
  497. printk("descriptor address is %#lx, contents %#lx\n",
  498. __va(desc), *(unsigned long *)__va(desc));
  499. #endif
  500. errorcode = (mmusr & MMU_I) ? 0 : 1;
  501. if (!(ssw & RW) || (ssw & RM))
  502. errorcode |= 2;
  503. if (mmusr & (MMU_I | MMU_WP)) {
  504. if (ssw & 4) {
  505. printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  506. ssw & RW ? "read" : "write",
  507. fp->un.fmtb.daddr,
  508. space_names[ssw & DFC], fp->ptregs.pc);
  509. goto buserr;
  510. }
  511. /* Don't try to do anything further if an exception was
  512. handled. */
  513. if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
  514. return;
  515. } else if (!(mmusr & MMU_I)) {
  516. /* probably a 020 cas fault */
  517. if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
  518. printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
  519. } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  520. printk("invalid %s access at %#lx from pc %#lx\n",
  521. !(ssw & RW) ? "write" : "read", addr,
  522. fp->ptregs.pc);
  523. die_if_kernel("Oops",&fp->ptregs,mmusr);
  524. force_sig(SIGSEGV, current);
  525. return;
  526. } else {
  527. #if 0
  528. static volatile long tlong;
  529. #endif
  530. printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
  531. !(ssw & RW) ? "write" : "read", addr,
  532. fp->ptregs.pc, ssw);
  533. asm volatile ("ptestr #1,%1@,#0\n\t"
  534. "pmove %%psr,%0"
  535. : "=m" (temp)
  536. : "a" (addr));
  537. mmusr = temp;
  538. printk ("level 0 mmusr is %#x\n", mmusr);
  539. #if 0
  540. asm volatile ("pmove %%tt0,%0"
  541. : "=m" (tlong));
  542. printk("tt0 is %#lx, ", tlong);
  543. asm volatile ("pmove %%tt1,%0"
  544. : "=m" (tlong));
  545. printk("tt1 is %#lx\n", tlong);
  546. #endif
  547. #ifdef DEBUG
  548. printk("Unknown SIGSEGV - 1\n");
  549. #endif
  550. die_if_kernel("Oops",&fp->ptregs,mmusr);
  551. force_sig(SIGSEGV, current);
  552. return;
  553. }
  554. /* setup an ATC entry for the access about to be retried */
  555. if (!(ssw & RW) || (ssw & RM))
  556. asm volatile ("ploadw %1,%0@" : /* no outputs */
  557. : "a" (addr), "d" (ssw));
  558. else
  559. asm volatile ("ploadr %1,%0@" : /* no outputs */
  560. : "a" (addr), "d" (ssw));
  561. }
  562. /* Now handle the instruction fault. */
  563. if (!(ssw & (FC|FB)))
  564. return;
  565. if (fp->ptregs.sr & PS_S) {
  566. printk("Instruction fault at %#010lx\n",
  567. fp->ptregs.pc);
  568. buserr:
  569. printk ("BAD KERNEL BUSERR\n");
  570. die_if_kernel("Oops",&fp->ptregs,0);
  571. force_sig(SIGKILL, current);
  572. return;
  573. }
  574. /* get the fault address */
  575. if (fp->ptregs.format == 10)
  576. addr = fp->ptregs.pc + 4;
  577. else
  578. addr = fp->un.fmtb.baddr;
  579. if (ssw & FC)
  580. addr -= 2;
  581. if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
  582. /* Insn fault on same page as data fault. But we
  583. should still create the ATC entry. */
  584. goto create_atc_entry;
  585. #ifdef DEBUG
  586. asm volatile ("ptestr #1,%2@,#7,%0\n\t"
  587. "pmove %%psr,%1"
  588. : "=a&" (desc), "=m" (temp)
  589. : "a" (addr));
  590. #else
  591. asm volatile ("ptestr #1,%1@,#7\n\t"
  592. "pmove %%psr,%0"
  593. : "=m" (temp) : "a" (addr));
  594. #endif
  595. mmusr = temp;
  596. #ifdef DEBUG
  597. printk ("mmusr is %#x for addr %#lx in task %p\n",
  598. mmusr, addr, current);
  599. printk ("descriptor address is %#lx, contents %#lx\n",
  600. __va(desc), *(unsigned long *)__va(desc));
  601. #endif
  602. if (mmusr & MMU_I)
  603. do_page_fault (&fp->ptregs, addr, 0);
  604. else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  605. printk ("invalid insn access at %#lx from pc %#lx\n",
  606. addr, fp->ptregs.pc);
  607. #ifdef DEBUG
  608. printk("Unknown SIGSEGV - 2\n");
  609. #endif
  610. die_if_kernel("Oops",&fp->ptregs,mmusr);
  611. force_sig(SIGSEGV, current);
  612. return;
  613. }
  614. create_atc_entry:
  615. /* setup an ATC entry for the access about to be retried */
  616. asm volatile ("ploadr #2,%0@" : /* no outputs */
  617. : "a" (addr));
  618. }
  619. #endif /* CPU_M68020_OR_M68030 */
  620. #endif /* !CONFIG_SUN3 */
  621. #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
  622. #include <asm/mcfmmu.h>
  623. /*
  624. * The following table converts the FS encoding of a ColdFire
  625. * exception stack frame into the error_code value needed by
  626. * do_fault.
  627. */
  628. static const unsigned char fs_err_code[] = {
  629. 0, /* 0000 */
  630. 0, /* 0001 */
  631. 0, /* 0010 */
  632. 0, /* 0011 */
  633. 1, /* 0100 */
  634. 0, /* 0101 */
  635. 0, /* 0110 */
  636. 0, /* 0111 */
  637. 2, /* 1000 */
  638. 3, /* 1001 */
  639. 2, /* 1010 */
  640. 0, /* 1011 */
  641. 1, /* 1100 */
  642. 1, /* 1101 */
  643. 0, /* 1110 */
  644. 0 /* 1111 */
  645. };
  646. static inline void access_errorcf(unsigned int fs, struct frame *fp)
  647. {
  648. unsigned long mmusr, addr;
  649. unsigned int err_code;
  650. int need_page_fault;
  651. mmusr = mmu_read(MMUSR);
  652. addr = mmu_read(MMUAR);
  653. /*
  654. * error_code:
  655. * bit 0 == 0 means no page found, 1 means protection fault
  656. * bit 1 == 0 means read, 1 means write
  657. */
  658. switch (fs) {
  659. case 5: /* 0101 TLB opword X miss */
  660. need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
  661. addr = fp->ptregs.pc;
  662. break;
  663. case 6: /* 0110 TLB extension word X miss */
  664. need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
  665. addr = fp->ptregs.pc + sizeof(long);
  666. break;
  667. case 10: /* 1010 TLB W miss */
  668. need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
  669. break;
  670. case 14: /* 1110 TLB R miss */
  671. need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
  672. break;
  673. default:
  674. /* 0000 Normal */
  675. /* 0001 Reserved */
  676. /* 0010 Interrupt during debug service routine */
  677. /* 0011 Reserved */
  678. /* 0100 X Protection */
  679. /* 0111 IFP in emulator mode */
  680. /* 1000 W Protection*/
  681. /* 1001 Write error*/
  682. /* 1011 Reserved*/
  683. /* 1100 R Protection*/
  684. /* 1101 R Protection*/
  685. /* 1111 OEP in emulator mode*/
  686. need_page_fault = 1;
  687. break;
  688. }
  689. if (need_page_fault) {
  690. err_code = fs_err_code[fs];
  691. if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
  692. err_code |= 2; /* bit1 - write, bit0 - protection */
  693. do_page_fault(&fp->ptregs, addr, err_code);
  694. }
  695. }
  696. #endif /* CONFIG_COLDFIRE CONFIG_MMU */
  697. asmlinkage void buserr_c(struct frame *fp)
  698. {
  699. /* Only set esp0 if coming from user mode */
  700. if (user_mode(&fp->ptregs))
  701. current->thread.esp0 = (unsigned long) fp;
  702. #ifdef DEBUG
  703. printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
  704. #endif
  705. #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
  706. if (CPU_IS_COLDFIRE) {
  707. unsigned int fs;
  708. fs = (fp->ptregs.vector & 0x3) |
  709. ((fp->ptregs.vector & 0xc00) >> 8);
  710. switch (fs) {
  711. case 0x5:
  712. case 0x6:
  713. case 0x7:
  714. case 0x9:
  715. case 0xa:
  716. case 0xd:
  717. case 0xe:
  718. case 0xf:
  719. access_errorcf(fs, fp);
  720. return;
  721. default:
  722. break;
  723. }
  724. }
  725. #endif /* CONFIG_COLDFIRE && CONFIG_MMU */
  726. switch (fp->ptregs.format) {
  727. #if defined (CONFIG_M68060)
  728. case 4: /* 68060 access error */
  729. access_error060 (fp);
  730. break;
  731. #endif
  732. #if defined (CONFIG_M68040)
  733. case 0x7: /* 68040 access error */
  734. access_error040 (fp);
  735. break;
  736. #endif
  737. #if defined (CPU_M68020_OR_M68030)
  738. case 0xa:
  739. case 0xb:
  740. bus_error030 (fp);
  741. break;
  742. #endif
  743. default:
  744. die_if_kernel("bad frame format",&fp->ptregs,0);
  745. #ifdef DEBUG
  746. printk("Unknown SIGSEGV - 4\n");
  747. #endif
  748. force_sig(SIGSEGV, current);
  749. }
  750. }
  751. static int kstack_depth_to_print = 48;
  752. void show_trace(unsigned long *stack)
  753. {
  754. unsigned long *endstack;
  755. unsigned long addr;
  756. int i;
  757. printk("Call Trace:");
  758. addr = (unsigned long)stack + THREAD_SIZE - 1;
  759. endstack = (unsigned long *)(addr & -THREAD_SIZE);
  760. i = 0;
  761. while (stack + 1 <= endstack) {
  762. addr = *stack++;
  763. /*
  764. * If the address is either in the text segment of the
  765. * kernel, or in the region which contains vmalloc'ed
  766. * memory, it *may* be the address of a calling
  767. * routine; if so, print it so that someone tracing
  768. * down the cause of the crash will be able to figure
  769. * out the call path that was taken.
  770. */
  771. if (__kernel_text_address(addr)) {
  772. #ifndef CONFIG_KALLSYMS
  773. if (i % 5 == 0)
  774. printk("\n ");
  775. #endif
  776. printk(" [<%08lx>] %pS\n", addr, (void *)addr);
  777. i++;
  778. }
  779. }
  780. printk("\n");
  781. }
  782. void show_registers(struct pt_regs *regs)
  783. {
  784. struct frame *fp = (struct frame *)regs;
  785. mm_segment_t old_fs = get_fs();
  786. u16 c, *cp;
  787. unsigned long addr;
  788. int i;
  789. print_modules();
  790. printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
  791. printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
  792. printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
  793. regs->d0, regs->d1, regs->d2, regs->d3);
  794. printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
  795. regs->d4, regs->d5, regs->a0, regs->a1);
  796. printk("Process %s (pid: %d, task=%p)\n",
  797. current->comm, task_pid_nr(current), current);
  798. addr = (unsigned long)&fp->un;
  799. printk("Frame format=%X ", regs->format);
  800. switch (regs->format) {
  801. case 0x2:
  802. printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
  803. addr += sizeof(fp->un.fmt2);
  804. break;
  805. case 0x3:
  806. printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
  807. addr += sizeof(fp->un.fmt3);
  808. break;
  809. case 0x4:
  810. printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
  811. : "eff addr=%08lx pc=%08lx\n"),
  812. fp->un.fmt4.effaddr, fp->un.fmt4.pc);
  813. addr += sizeof(fp->un.fmt4);
  814. break;
  815. case 0x7:
  816. printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
  817. fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
  818. printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
  819. fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
  820. printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
  821. fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
  822. printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
  823. fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
  824. printk("push data: %08lx %08lx %08lx %08lx\n",
  825. fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
  826. fp->un.fmt7.pd3);
  827. addr += sizeof(fp->un.fmt7);
  828. break;
  829. case 0x9:
  830. printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
  831. addr += sizeof(fp->un.fmt9);
  832. break;
  833. case 0xa:
  834. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  835. fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
  836. fp->un.fmta.daddr, fp->un.fmta.dobuf);
  837. addr += sizeof(fp->un.fmta);
  838. break;
  839. case 0xb:
  840. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  841. fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
  842. fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
  843. printk("baddr=%08lx dibuf=%08lx ver=%x\n",
  844. fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
  845. addr += sizeof(fp->un.fmtb);
  846. break;
  847. default:
  848. printk("\n");
  849. }
  850. show_stack(NULL, (unsigned long *)addr);
  851. printk("Code:");
  852. set_fs(KERNEL_DS);
  853. cp = (u16 *)regs->pc;
  854. for (i = -8; i < 16; i++) {
  855. if (get_user(c, cp + i) && i >= 0) {
  856. printk(" Bad PC value.");
  857. break;
  858. }
  859. printk(i ? " %04x" : " <%04x>", c);
  860. }
  861. set_fs(old_fs);
  862. printk ("\n");
  863. }
  864. void show_stack(struct task_struct *task, unsigned long *stack)
  865. {
  866. unsigned long *p;
  867. unsigned long *endstack;
  868. int i;
  869. if (!stack) {
  870. if (task)
  871. stack = (unsigned long *)task->thread.esp0;
  872. else
  873. stack = (unsigned long *)&stack;
  874. }
  875. endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
  876. printk("Stack from %08lx:", (unsigned long)stack);
  877. p = stack;
  878. for (i = 0; i < kstack_depth_to_print; i++) {
  879. if (p + 1 > endstack)
  880. break;
  881. if (i % 8 == 0)
  882. printk("\n ");
  883. printk(" %08lx", *p++);
  884. }
  885. printk("\n");
  886. show_trace(stack);
  887. }
  888. /*
  889. * The architecture-independent backtrace generator
  890. */
  891. void dump_stack(void)
  892. {
  893. unsigned long stack;
  894. show_trace(&stack);
  895. }
  896. EXPORT_SYMBOL(dump_stack);
  897. /*
  898. * The vector number returned in the frame pointer may also contain
  899. * the "fs" (Fault Status) bits on ColdFire. These are in the bottom
  900. * 2 bits, and upper 2 bits. So we need to mask out the real vector
  901. * number before using it in comparisons. You don't need to do this on
  902. * real 68k parts, but it won't hurt either.
  903. */
  904. void bad_super_trap (struct frame *fp)
  905. {
  906. int vector = (fp->ptregs.vector >> 2) & 0xff;
  907. console_verbose();
  908. if (vector < ARRAY_SIZE(vec_names))
  909. printk ("*** %s *** FORMAT=%X\n",
  910. vec_names[vector],
  911. fp->ptregs.format);
  912. else
  913. printk ("*** Exception %d *** FORMAT=%X\n",
  914. vector, fp->ptregs.format);
  915. if (vector == VEC_ADDRERR && CPU_IS_020_OR_030) {
  916. unsigned short ssw = fp->un.fmtb.ssw;
  917. printk ("SSW=%#06x ", ssw);
  918. if (ssw & RC)
  919. printk ("Pipe stage C instruction fault at %#010lx\n",
  920. (fp->ptregs.format) == 0xA ?
  921. fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
  922. if (ssw & RB)
  923. printk ("Pipe stage B instruction fault at %#010lx\n",
  924. (fp->ptregs.format) == 0xA ?
  925. fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  926. if (ssw & DF)
  927. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  928. ssw & RW ? "read" : "write",
  929. fp->un.fmtb.daddr, space_names[ssw & DFC],
  930. fp->ptregs.pc);
  931. }
  932. printk ("Current process id is %d\n", task_pid_nr(current));
  933. die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
  934. }
  935. asmlinkage void trap_c(struct frame *fp)
  936. {
  937. int sig;
  938. int vector = (fp->ptregs.vector >> 2) & 0xff;
  939. siginfo_t info;
  940. if (fp->ptregs.sr & PS_S) {
  941. if (vector == VEC_TRACE) {
  942. /* traced a trapping instruction on a 68020/30,
  943. * real exception will be executed afterwards.
  944. */
  945. } else if (!handle_kernel_fault(&fp->ptregs))
  946. bad_super_trap(fp);
  947. return;
  948. }
  949. /* send the appropriate signal to the user program */
  950. switch (vector) {
  951. case VEC_ADDRERR:
  952. info.si_code = BUS_ADRALN;
  953. sig = SIGBUS;
  954. break;
  955. case VEC_ILLEGAL:
  956. case VEC_LINE10:
  957. case VEC_LINE11:
  958. info.si_code = ILL_ILLOPC;
  959. sig = SIGILL;
  960. break;
  961. case VEC_PRIV:
  962. info.si_code = ILL_PRVOPC;
  963. sig = SIGILL;
  964. break;
  965. case VEC_COPROC:
  966. info.si_code = ILL_COPROC;
  967. sig = SIGILL;
  968. break;
  969. case VEC_TRAP1:
  970. case VEC_TRAP2:
  971. case VEC_TRAP3:
  972. case VEC_TRAP4:
  973. case VEC_TRAP5:
  974. case VEC_TRAP6:
  975. case VEC_TRAP7:
  976. case VEC_TRAP8:
  977. case VEC_TRAP9:
  978. case VEC_TRAP10:
  979. case VEC_TRAP11:
  980. case VEC_TRAP12:
  981. case VEC_TRAP13:
  982. case VEC_TRAP14:
  983. info.si_code = ILL_ILLTRP;
  984. sig = SIGILL;
  985. break;
  986. case VEC_FPBRUC:
  987. case VEC_FPOE:
  988. case VEC_FPNAN:
  989. info.si_code = FPE_FLTINV;
  990. sig = SIGFPE;
  991. break;
  992. case VEC_FPIR:
  993. info.si_code = FPE_FLTRES;
  994. sig = SIGFPE;
  995. break;
  996. case VEC_FPDIVZ:
  997. info.si_code = FPE_FLTDIV;
  998. sig = SIGFPE;
  999. break;
  1000. case VEC_FPUNDER:
  1001. info.si_code = FPE_FLTUND;
  1002. sig = SIGFPE;
  1003. break;
  1004. case VEC_FPOVER:
  1005. info.si_code = FPE_FLTOVF;
  1006. sig = SIGFPE;
  1007. break;
  1008. case VEC_ZERODIV:
  1009. info.si_code = FPE_INTDIV;
  1010. sig = SIGFPE;
  1011. break;
  1012. case VEC_CHK:
  1013. case VEC_TRAP:
  1014. info.si_code = FPE_INTOVF;
  1015. sig = SIGFPE;
  1016. break;
  1017. case VEC_TRACE: /* ptrace single step */
  1018. info.si_code = TRAP_TRACE;
  1019. sig = SIGTRAP;
  1020. break;
  1021. case VEC_TRAP15: /* breakpoint */
  1022. info.si_code = TRAP_BRKPT;
  1023. sig = SIGTRAP;
  1024. break;
  1025. default:
  1026. info.si_code = ILL_ILLOPC;
  1027. sig = SIGILL;
  1028. break;
  1029. }
  1030. info.si_signo = sig;
  1031. info.si_errno = 0;
  1032. switch (fp->ptregs.format) {
  1033. default:
  1034. info.si_addr = (void *) fp->ptregs.pc;
  1035. break;
  1036. case 2:
  1037. info.si_addr = (void *) fp->un.fmt2.iaddr;
  1038. break;
  1039. case 7:
  1040. info.si_addr = (void *) fp->un.fmt7.effaddr;
  1041. break;
  1042. case 9:
  1043. info.si_addr = (void *) fp->un.fmt9.iaddr;
  1044. break;
  1045. case 10:
  1046. info.si_addr = (void *) fp->un.fmta.daddr;
  1047. break;
  1048. case 11:
  1049. info.si_addr = (void *) fp->un.fmtb.daddr;
  1050. break;
  1051. }
  1052. force_sig_info (sig, &info, current);
  1053. }
  1054. void die_if_kernel (char *str, struct pt_regs *fp, int nr)
  1055. {
  1056. if (!(fp->sr & PS_S))
  1057. return;
  1058. console_verbose();
  1059. printk("%s: %08x\n",str,nr);
  1060. show_registers(fp);
  1061. add_taint(TAINT_DIE);
  1062. do_exit(SIGSEGV);
  1063. }
  1064. asmlinkage void set_esp0(unsigned long ssp)
  1065. {
  1066. current->thread.esp0 = ssp;
  1067. }
  1068. /*
  1069. * This function is called if an error occur while accessing
  1070. * user-space from the fpsp040 code.
  1071. */
  1072. asmlinkage void fpsp040_die(void)
  1073. {
  1074. do_exit(SIGSEGV);
  1075. }
  1076. #ifdef CONFIG_M68KFPU_EMU
  1077. asmlinkage void fpemu_signal(int signal, int code, void *addr)
  1078. {
  1079. siginfo_t info;
  1080. info.si_signo = signal;
  1081. info.si_errno = 0;
  1082. info.si_code = code;
  1083. info.si_addr = addr;
  1084. force_sig_info(signal, &info, current);
  1085. }
  1086. #endif