neponset.c 10 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/neponset.c
  3. */
  4. #include <linux/err.h>
  5. #include <linux/init.h>
  6. #include <linux/ioport.h>
  7. #include <linux/irq.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/pm.h>
  12. #include <linux/serial_core.h>
  13. #include <linux/slab.h>
  14. #include <asm/mach-types.h>
  15. #include <asm/mach/map.h>
  16. #include <asm/mach/serial_sa1100.h>
  17. #include <asm/hardware/sa1111.h>
  18. #include <asm/sizes.h>
  19. #include <mach/hardware.h>
  20. #include <mach/assabet.h>
  21. #include <mach/neponset.h>
  22. #include <mach/irqs.h>
  23. #define NEP_IRQ_SMC91X 0
  24. #define NEP_IRQ_USAR 1
  25. #define NEP_IRQ_SA1111 2
  26. #define NEP_IRQ_NR 3
  27. #define WHOAMI 0x00
  28. #define LEDS 0x10
  29. #define SWPK 0x20
  30. #define IRR 0x24
  31. #define KP_Y_IN 0x80
  32. #define KP_X_OUT 0x90
  33. #define NCR_0 0xa0
  34. #define MDM_CTL_0 0xb0
  35. #define MDM_CTL_1 0xb4
  36. #define AUD_CTL 0xc0
  37. #define IRR_ETHERNET (1 << 0)
  38. #define IRR_USAR (1 << 1)
  39. #define IRR_SA1111 (1 << 2)
  40. #define MDM_CTL0_RTS1 (1 << 0)
  41. #define MDM_CTL0_DTR1 (1 << 1)
  42. #define MDM_CTL0_RTS2 (1 << 2)
  43. #define MDM_CTL0_DTR2 (1 << 3)
  44. #define MDM_CTL1_CTS1 (1 << 0)
  45. #define MDM_CTL1_DSR1 (1 << 1)
  46. #define MDM_CTL1_DCD1 (1 << 2)
  47. #define MDM_CTL1_CTS2 (1 << 3)
  48. #define MDM_CTL1_DSR2 (1 << 4)
  49. #define MDM_CTL1_DCD2 (1 << 5)
  50. #define AUD_SEL_1341 (1 << 0)
  51. #define AUD_MUTE_1341 (1 << 1)
  52. extern void sa1110_mb_disable(void);
  53. struct neponset_drvdata {
  54. void __iomem *base;
  55. struct platform_device *sa1111;
  56. struct platform_device *smc91x;
  57. unsigned irq_base;
  58. #ifdef CONFIG_PM_SLEEP
  59. u32 ncr0;
  60. u32 mdm_ctl_0;
  61. #endif
  62. };
  63. static void __iomem *nep_base;
  64. void neponset_ncr_frob(unsigned int mask, unsigned int val)
  65. {
  66. void __iomem *base = nep_base;
  67. if (base) {
  68. unsigned long flags;
  69. unsigned v;
  70. local_irq_save(flags);
  71. v = readb_relaxed(base + NCR_0);
  72. writeb_relaxed((v & ~mask) | val, base + NCR_0);
  73. local_irq_restore(flags);
  74. } else {
  75. WARN(1, "nep_base unset\n");
  76. }
  77. }
  78. EXPORT_SYMBOL(neponset_ncr_frob);
  79. static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
  80. {
  81. void __iomem *base = nep_base;
  82. u_int mdm_ctl0;
  83. if (!base)
  84. return;
  85. mdm_ctl0 = readb_relaxed(base + MDM_CTL_0);
  86. if (port->mapbase == _Ser1UTCR0) {
  87. if (mctrl & TIOCM_RTS)
  88. mdm_ctl0 &= ~MDM_CTL0_RTS2;
  89. else
  90. mdm_ctl0 |= MDM_CTL0_RTS2;
  91. if (mctrl & TIOCM_DTR)
  92. mdm_ctl0 &= ~MDM_CTL0_DTR2;
  93. else
  94. mdm_ctl0 |= MDM_CTL0_DTR2;
  95. } else if (port->mapbase == _Ser3UTCR0) {
  96. if (mctrl & TIOCM_RTS)
  97. mdm_ctl0 &= ~MDM_CTL0_RTS1;
  98. else
  99. mdm_ctl0 |= MDM_CTL0_RTS1;
  100. if (mctrl & TIOCM_DTR)
  101. mdm_ctl0 &= ~MDM_CTL0_DTR1;
  102. else
  103. mdm_ctl0 |= MDM_CTL0_DTR1;
  104. }
  105. writeb_relaxed(mdm_ctl0, base + MDM_CTL_0);
  106. }
  107. static u_int neponset_get_mctrl(struct uart_port *port)
  108. {
  109. void __iomem *base = nep_base;
  110. u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  111. u_int mdm_ctl1;
  112. if (!base)
  113. return ret;
  114. mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
  115. if (port->mapbase == _Ser1UTCR0) {
  116. if (mdm_ctl1 & MDM_CTL1_DCD2)
  117. ret &= ~TIOCM_CD;
  118. if (mdm_ctl1 & MDM_CTL1_CTS2)
  119. ret &= ~TIOCM_CTS;
  120. if (mdm_ctl1 & MDM_CTL1_DSR2)
  121. ret &= ~TIOCM_DSR;
  122. } else if (port->mapbase == _Ser3UTCR0) {
  123. if (mdm_ctl1 & MDM_CTL1_DCD1)
  124. ret &= ~TIOCM_CD;
  125. if (mdm_ctl1 & MDM_CTL1_CTS1)
  126. ret &= ~TIOCM_CTS;
  127. if (mdm_ctl1 & MDM_CTL1_DSR1)
  128. ret &= ~TIOCM_DSR;
  129. }
  130. return ret;
  131. }
  132. static struct sa1100_port_fns neponset_port_fns __devinitdata = {
  133. .set_mctrl = neponset_set_mctrl,
  134. .get_mctrl = neponset_get_mctrl,
  135. };
  136. /*
  137. * Install handler for Neponset IRQ. Note that we have to loop here
  138. * since the ETHERNET and USAR IRQs are level based, and we need to
  139. * ensure that the IRQ signal is deasserted before returning. This
  140. * is rather unfortunate.
  141. */
  142. static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
  143. {
  144. struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
  145. unsigned int irr;
  146. while (1) {
  147. /*
  148. * Acknowledge the parent IRQ.
  149. */
  150. desc->irq_data.chip->irq_ack(&desc->irq_data);
  151. /*
  152. * Read the interrupt reason register. Let's have all
  153. * active IRQ bits high. Note: there is a typo in the
  154. * Neponset user's guide for the SA1111 IRR level.
  155. */
  156. irr = readb_relaxed(d->base + IRR);
  157. irr ^= IRR_ETHERNET | IRR_USAR;
  158. if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
  159. break;
  160. /*
  161. * Since there is no individual mask, we have to
  162. * mask the parent IRQ. This is safe, since we'll
  163. * recheck the register for any pending IRQs.
  164. */
  165. if (irr & (IRR_ETHERNET | IRR_USAR)) {
  166. desc->irq_data.chip->irq_mask(&desc->irq_data);
  167. /*
  168. * Ack the interrupt now to prevent re-entering
  169. * this neponset handler. Again, this is safe
  170. * since we'll check the IRR register prior to
  171. * leaving.
  172. */
  173. desc->irq_data.chip->irq_ack(&desc->irq_data);
  174. if (irr & IRR_ETHERNET)
  175. generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);
  176. if (irr & IRR_USAR)
  177. generic_handle_irq(d->irq_base + NEP_IRQ_USAR);
  178. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  179. }
  180. if (irr & IRR_SA1111)
  181. generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
  182. }
  183. }
  184. /* Yes, we really do not have any kind of masking or unmasking */
  185. static void nochip_noop(struct irq_data *irq)
  186. {
  187. }
  188. static struct irq_chip nochip = {
  189. .name = "neponset",
  190. .irq_ack = nochip_noop,
  191. .irq_mask = nochip_noop,
  192. .irq_unmask = nochip_noop,
  193. };
  194. static struct sa1111_platform_data sa1111_info = {
  195. .disable_devs = SA1111_DEVID_PS2_MSE,
  196. };
  197. static int __devinit neponset_probe(struct platform_device *dev)
  198. {
  199. struct neponset_drvdata *d;
  200. struct resource *nep_res, *sa1111_res, *smc91x_res;
  201. struct resource sa1111_resources[] = {
  202. DEFINE_RES_MEM(0x40000000, SZ_8K),
  203. { .flags = IORESOURCE_IRQ },
  204. };
  205. struct platform_device_info sa1111_devinfo = {
  206. .parent = &dev->dev,
  207. .name = "sa1111",
  208. .id = 0,
  209. .res = sa1111_resources,
  210. .num_res = ARRAY_SIZE(sa1111_resources),
  211. .data = &sa1111_info,
  212. .size_data = sizeof(sa1111_info),
  213. .dma_mask = 0xffffffffUL,
  214. };
  215. struct resource smc91x_resources[] = {
  216. DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
  217. 0x02000000, "smc91x-regs"),
  218. DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
  219. 0x02000000, "smc91x-attrib"),
  220. { .flags = IORESOURCE_IRQ },
  221. };
  222. struct platform_device_info smc91x_devinfo = {
  223. .parent = &dev->dev,
  224. .name = "smc91x",
  225. .id = 0,
  226. .res = smc91x_resources,
  227. .num_res = ARRAY_SIZE(smc91x_resources),
  228. };
  229. int ret, irq;
  230. if (nep_base)
  231. return -EBUSY;
  232. irq = ret = platform_get_irq(dev, 0);
  233. if (ret < 0)
  234. goto err_alloc;
  235. nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  236. smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
  237. sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
  238. if (!nep_res || !smc91x_res || !sa1111_res) {
  239. ret = -ENXIO;
  240. goto err_alloc;
  241. }
  242. d = kzalloc(sizeof(*d), GFP_KERNEL);
  243. if (!d) {
  244. ret = -ENOMEM;
  245. goto err_alloc;
  246. }
  247. d->base = ioremap(nep_res->start, SZ_4K);
  248. if (!d->base) {
  249. ret = -ENOMEM;
  250. goto err_ioremap;
  251. }
  252. if (readb_relaxed(d->base + WHOAMI) != 0x11) {
  253. dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
  254. readb_relaxed(d->base + WHOAMI));
  255. ret = -ENODEV;
  256. goto err_id;
  257. }
  258. ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
  259. if (ret <= 0) {
  260. dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
  261. NEP_IRQ_NR, ret);
  262. if (ret == 0)
  263. ret = -ENOMEM;
  264. goto err_irq_alloc;
  265. }
  266. d->irq_base = ret;
  267. irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
  268. handle_simple_irq);
  269. set_irq_flags(d->irq_base + NEP_IRQ_SMC91X, IRQF_VALID | IRQF_PROBE);
  270. irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
  271. handle_simple_irq);
  272. set_irq_flags(d->irq_base + NEP_IRQ_USAR, IRQF_VALID | IRQF_PROBE);
  273. irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
  274. irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
  275. irq_set_handler_data(irq, d);
  276. irq_set_chained_handler(irq, neponset_irq_handler);
  277. /*
  278. * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
  279. * something on the Neponset activates this IRQ on sleep (eth?)
  280. */
  281. #if 0
  282. enable_irq_wake(irq);
  283. #endif
  284. dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
  285. d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
  286. nep_base = d->base;
  287. sa1100_register_uart_fns(&neponset_port_fns);
  288. /* Ensure that the memory bus request/grant signals are setup */
  289. sa1110_mb_disable();
  290. /* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
  291. writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);
  292. sa1111_resources[0].parent = sa1111_res;
  293. sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
  294. sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
  295. d->sa1111 = platform_device_register_full(&sa1111_devinfo);
  296. smc91x_resources[0].parent = smc91x_res;
  297. smc91x_resources[1].parent = smc91x_res;
  298. smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
  299. smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
  300. d->smc91x = platform_device_register_full(&smc91x_devinfo);
  301. platform_set_drvdata(dev, d);
  302. return 0;
  303. err_irq_alloc:
  304. err_id:
  305. iounmap(d->base);
  306. err_ioremap:
  307. kfree(d);
  308. err_alloc:
  309. return ret;
  310. }
  311. static int __devexit neponset_remove(struct platform_device *dev)
  312. {
  313. struct neponset_drvdata *d = platform_get_drvdata(dev);
  314. int irq = platform_get_irq(dev, 0);
  315. if (!IS_ERR(d->sa1111))
  316. platform_device_unregister(d->sa1111);
  317. if (!IS_ERR(d->smc91x))
  318. platform_device_unregister(d->smc91x);
  319. irq_set_chained_handler(irq, NULL);
  320. irq_free_descs(d->irq_base, NEP_IRQ_NR);
  321. nep_base = NULL;
  322. iounmap(d->base);
  323. kfree(d);
  324. return 0;
  325. }
  326. #ifdef CONFIG_PM_SLEEP
  327. static int neponset_suspend(struct device *dev)
  328. {
  329. struct neponset_drvdata *d = dev_get_drvdata(dev);
  330. d->ncr0 = readb_relaxed(d->base + NCR_0);
  331. d->mdm_ctl_0 = readb_relaxed(d->base + MDM_CTL_0);
  332. return 0;
  333. }
  334. static int neponset_resume(struct device *dev)
  335. {
  336. struct neponset_drvdata *d = dev_get_drvdata(dev);
  337. writeb_relaxed(d->ncr0, d->base + NCR_0);
  338. writeb_relaxed(d->mdm_ctl_0, d->base + MDM_CTL_0);
  339. return 0;
  340. }
  341. static const struct dev_pm_ops neponset_pm_ops = {
  342. .suspend_noirq = neponset_suspend,
  343. .resume_noirq = neponset_resume,
  344. .freeze_noirq = neponset_suspend,
  345. .restore_noirq = neponset_resume,
  346. };
  347. #define PM_OPS &neponset_pm_ops
  348. #else
  349. #define PM_OPS NULL
  350. #endif
  351. static struct platform_driver neponset_device_driver = {
  352. .probe = neponset_probe,
  353. .remove = __devexit_p(neponset_remove),
  354. .driver = {
  355. .name = "neponset",
  356. .owner = THIS_MODULE,
  357. .pm = PM_OPS,
  358. },
  359. };
  360. static int __init neponset_init(void)
  361. {
  362. return platform_driver_register(&neponset_device_driver);
  363. }
  364. subsys_initcall(neponset_init);