mach-vr1000.c 8.5 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
  2. *
  3. * Copyright (c) 2003-2008 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Machine support for Thorcom VR1000 board. Designed for Thorcom by
  7. * Simtec Electronics, http://www.simtec.co.uk/
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/timer.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/dm9000.h>
  22. #include <linux/i2c.h>
  23. #include <linux/serial.h>
  24. #include <linux/tty.h>
  25. #include <linux/serial_8250.h>
  26. #include <linux/serial_reg.h>
  27. #include <linux/io.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/mach/irq.h>
  31. #include <mach/bast-map.h>
  32. #include <mach/vr1000-map.h>
  33. #include <mach/vr1000-irq.h>
  34. #include <mach/vr1000-cpld.h>
  35. #include <mach/hardware.h>
  36. #include <asm/irq.h>
  37. #include <asm/mach-types.h>
  38. #include <plat/regs-serial.h>
  39. #include <mach/regs-gpio.h>
  40. #include <mach/leds-gpio.h>
  41. #include <plat/clock.h>
  42. #include <plat/devs.h>
  43. #include <plat/cpu.h>
  44. #include <plat/iic.h>
  45. #include <plat/audio-simtec.h>
  46. #include "simtec.h"
  47. #include "common.h"
  48. /* macros for virtual address mods for the io space entries */
  49. #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  50. #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  51. #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  52. #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  53. /* macros to modify the physical addresses for io space */
  54. #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  55. #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  56. #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  57. #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  58. static struct map_desc vr1000_iodesc[] __initdata = {
  59. /* ISA IO areas */
  60. {
  61. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  62. .pfn = PA_CS2(BAST_PA_ISAIO),
  63. .length = SZ_16M,
  64. .type = MT_DEVICE,
  65. }, {
  66. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  67. .pfn = PA_CS3(BAST_PA_ISAIO),
  68. .length = SZ_16M,
  69. .type = MT_DEVICE,
  70. },
  71. /* CPLD control registers, and external interrupt controls */
  72. {
  73. .virtual = (u32)VR1000_VA_CTRL1,
  74. .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
  75. .length = SZ_1M,
  76. .type = MT_DEVICE,
  77. }, {
  78. .virtual = (u32)VR1000_VA_CTRL2,
  79. .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
  80. .length = SZ_1M,
  81. .type = MT_DEVICE,
  82. }, {
  83. .virtual = (u32)VR1000_VA_CTRL3,
  84. .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
  85. .length = SZ_1M,
  86. .type = MT_DEVICE,
  87. }, {
  88. .virtual = (u32)VR1000_VA_CTRL4,
  89. .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
  90. .length = SZ_1M,
  91. .type = MT_DEVICE,
  92. },
  93. };
  94. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  95. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  96. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  97. static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
  98. [0] = {
  99. .hwport = 0,
  100. .flags = 0,
  101. .ucon = UCON,
  102. .ulcon = ULCON,
  103. .ufcon = UFCON,
  104. },
  105. [1] = {
  106. .hwport = 1,
  107. .flags = 0,
  108. .ucon = UCON,
  109. .ulcon = ULCON,
  110. .ufcon = UFCON,
  111. },
  112. /* port 2 is not actually used */
  113. [2] = {
  114. .hwport = 2,
  115. .flags = 0,
  116. .ucon = UCON,
  117. .ulcon = ULCON,
  118. .ufcon = UFCON,
  119. }
  120. };
  121. /* definitions for the vr1000 extra 16550 serial ports */
  122. #define VR1000_BAUDBASE (3692307)
  123. #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
  124. static struct plat_serial8250_port serial_platform_data[] = {
  125. [0] = {
  126. .mapbase = VR1000_SERIAL_MAPBASE(0),
  127. .irq = IRQ_VR1000_SERIAL + 0,
  128. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  129. .iotype = UPIO_MEM,
  130. .regshift = 0,
  131. .uartclk = VR1000_BAUDBASE,
  132. },
  133. [1] = {
  134. .mapbase = VR1000_SERIAL_MAPBASE(1),
  135. .irq = IRQ_VR1000_SERIAL + 1,
  136. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  137. .iotype = UPIO_MEM,
  138. .regshift = 0,
  139. .uartclk = VR1000_BAUDBASE,
  140. },
  141. [2] = {
  142. .mapbase = VR1000_SERIAL_MAPBASE(2),
  143. .irq = IRQ_VR1000_SERIAL + 2,
  144. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  145. .iotype = UPIO_MEM,
  146. .regshift = 0,
  147. .uartclk = VR1000_BAUDBASE,
  148. },
  149. [3] = {
  150. .mapbase = VR1000_SERIAL_MAPBASE(3),
  151. .irq = IRQ_VR1000_SERIAL + 3,
  152. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  153. .iotype = UPIO_MEM,
  154. .regshift = 0,
  155. .uartclk = VR1000_BAUDBASE,
  156. },
  157. { },
  158. };
  159. static struct platform_device serial_device = {
  160. .name = "serial8250",
  161. .id = PLAT8250_DEV_PLATFORM,
  162. .dev = {
  163. .platform_data = serial_platform_data,
  164. },
  165. };
  166. /* DM9000 ethernet devices */
  167. static struct resource vr1000_dm9k0_resource[] = {
  168. [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
  169. [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
  170. [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \
  171. | IORESOURCE_IRQ_HIGHLEVEL),
  172. };
  173. static struct resource vr1000_dm9k1_resource[] = {
  174. [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
  175. [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
  176. [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \
  177. | IORESOURCE_IRQ_HIGHLEVEL),
  178. };
  179. /* for the moment we limit ourselves to 16bit IO until some
  180. * better IO routines can be written and tested
  181. */
  182. static struct dm9000_plat_data vr1000_dm9k_platdata = {
  183. .flags = DM9000_PLATF_16BITONLY,
  184. };
  185. static struct platform_device vr1000_dm9k0 = {
  186. .name = "dm9000",
  187. .id = 0,
  188. .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
  189. .resource = vr1000_dm9k0_resource,
  190. .dev = {
  191. .platform_data = &vr1000_dm9k_platdata,
  192. }
  193. };
  194. static struct platform_device vr1000_dm9k1 = {
  195. .name = "dm9000",
  196. .id = 1,
  197. .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
  198. .resource = vr1000_dm9k1_resource,
  199. .dev = {
  200. .platform_data = &vr1000_dm9k_platdata,
  201. }
  202. };
  203. /* LEDS */
  204. static struct s3c24xx_led_platdata vr1000_led1_pdata = {
  205. .name = "led1",
  206. .gpio = S3C2410_GPB(0),
  207. .def_trigger = "",
  208. };
  209. static struct s3c24xx_led_platdata vr1000_led2_pdata = {
  210. .name = "led2",
  211. .gpio = S3C2410_GPB(1),
  212. .def_trigger = "",
  213. };
  214. static struct s3c24xx_led_platdata vr1000_led3_pdata = {
  215. .name = "led3",
  216. .gpio = S3C2410_GPB(2),
  217. .def_trigger = "",
  218. };
  219. static struct platform_device vr1000_led1 = {
  220. .name = "s3c24xx_led",
  221. .id = 1,
  222. .dev = {
  223. .platform_data = &vr1000_led1_pdata,
  224. },
  225. };
  226. static struct platform_device vr1000_led2 = {
  227. .name = "s3c24xx_led",
  228. .id = 2,
  229. .dev = {
  230. .platform_data = &vr1000_led2_pdata,
  231. },
  232. };
  233. static struct platform_device vr1000_led3 = {
  234. .name = "s3c24xx_led",
  235. .id = 3,
  236. .dev = {
  237. .platform_data = &vr1000_led3_pdata,
  238. },
  239. };
  240. /* I2C devices. */
  241. static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
  242. {
  243. I2C_BOARD_INFO("tlv320aic23", 0x1a),
  244. }, {
  245. I2C_BOARD_INFO("tmp101", 0x48),
  246. }, {
  247. I2C_BOARD_INFO("m41st87", 0x68),
  248. },
  249. };
  250. /* devices for this board */
  251. static struct platform_device *vr1000_devices[] __initdata = {
  252. &s3c_device_ohci,
  253. &s3c_device_lcd,
  254. &s3c_device_wdt,
  255. &s3c_device_i2c0,
  256. &s3c_device_adc,
  257. &serial_device,
  258. &vr1000_dm9k0,
  259. &vr1000_dm9k1,
  260. &vr1000_led1,
  261. &vr1000_led2,
  262. &vr1000_led3,
  263. };
  264. static struct clk *vr1000_clocks[] __initdata = {
  265. &s3c24xx_dclk0,
  266. &s3c24xx_dclk1,
  267. &s3c24xx_clkout0,
  268. &s3c24xx_clkout1,
  269. &s3c24xx_uclk,
  270. };
  271. static void vr1000_power_off(void)
  272. {
  273. gpio_direction_output(S3C2410_GPB(9), 1);
  274. }
  275. static void __init vr1000_map_io(void)
  276. {
  277. /* initialise clock sources */
  278. s3c24xx_dclk0.parent = &clk_upll;
  279. s3c24xx_dclk0.rate = 12*1000*1000;
  280. s3c24xx_dclk1.parent = NULL;
  281. s3c24xx_dclk1.rate = 3692307;
  282. s3c24xx_clkout0.parent = &s3c24xx_dclk0;
  283. s3c24xx_clkout1.parent = &s3c24xx_dclk1;
  284. s3c24xx_uclk.parent = &s3c24xx_clkout1;
  285. s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
  286. pm_power_off = vr1000_power_off;
  287. s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
  288. s3c24xx_init_clocks(0);
  289. s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
  290. }
  291. static void __init vr1000_init(void)
  292. {
  293. s3c_i2c0_set_platdata(NULL);
  294. platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
  295. i2c_register_board_info(0, vr1000_i2c_devs,
  296. ARRAY_SIZE(vr1000_i2c_devs));
  297. nor_simtec_init();
  298. simtec_audio_add(NULL, true, NULL);
  299. WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
  300. }
  301. MACHINE_START(VR1000, "Thorcom-VR1000")
  302. /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
  303. .atag_offset = 0x100,
  304. .map_io = vr1000_map_io,
  305. .init_machine = vr1000_init,
  306. .init_irq = s3c24xx_init_irq,
  307. .timer = &s3c24xx_timer,
  308. .restart = s3c2410_restart,
  309. MACHINE_END