gpio-nrs.h 3.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697
  1. /* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
  2. *
  3. * Copyright (c) 2008 Simtec Electronics
  4. * http://armlinux.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * S3C2410 - GPIO bank numbering
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #ifndef __MACH_GPIONRS_H
  14. #define __MACH_GPIONRS_H
  15. #define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
  16. #define S3C2410_GPIO_BANKG (32*6)
  17. #define S3C2410_GPIO_BANKH (32*7)
  18. /* GPIO sizes for various SoCs:
  19. *
  20. * 2442
  21. * 2410 2412 2440 2443 2416
  22. * ---- ---- ---- ---- ----
  23. * A 23 22 25 16 25
  24. * B 11 11 11 11 9
  25. * C 16 15 16 16 16
  26. * D 16 16 16 16 16
  27. * E 16 16 16 16 16
  28. * F 8 8 8 8 8
  29. * G 16 16 16 16 8
  30. * H 11 11 9 15 15
  31. * J -- -- 13 16 --
  32. * K -- -- -- -- 16
  33. * L -- -- -- 15 7
  34. * M -- -- -- 2 2
  35. */
  36. /* GPIO bank sizes */
  37. #define S3C2410_GPIO_A_NR (32)
  38. #define S3C2410_GPIO_B_NR (32)
  39. #define S3C2410_GPIO_C_NR (32)
  40. #define S3C2410_GPIO_D_NR (32)
  41. #define S3C2410_GPIO_E_NR (32)
  42. #define S3C2410_GPIO_F_NR (32)
  43. #define S3C2410_GPIO_G_NR (32)
  44. #define S3C2410_GPIO_H_NR (32)
  45. #define S3C2410_GPIO_J_NR (32) /* technically 16. */
  46. #define S3C2410_GPIO_K_NR (32) /* technically 16. */
  47. #define S3C2410_GPIO_L_NR (32) /* technically 15. */
  48. #define S3C2410_GPIO_M_NR (32) /* technically 2. */
  49. #if CONFIG_S3C_GPIO_SPACE != 0
  50. #error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment
  51. #endif
  52. #define S3C2410_GPIO_NEXT(__gpio) \
  53. ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
  54. #ifndef __ASSEMBLY__
  55. enum s3c_gpio_number {
  56. S3C2410_GPIO_A_START = 0,
  57. S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
  58. S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
  59. S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
  60. S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
  61. S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
  62. S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
  63. S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
  64. S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
  65. S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
  66. S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
  67. S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
  68. };
  69. #endif /* __ASSEMBLY__ */
  70. /* S3C2410 GPIO number definitions. */
  71. #define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr))
  72. #define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr))
  73. #define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr))
  74. #define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr))
  75. #define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr))
  76. #define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
  77. #define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
  78. #define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
  79. #define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
  80. #define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
  81. #define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
  82. #define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
  83. #endif /* __MACH_GPIONRS_H */