viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/major.h>
  32. #include <linux/module.h>
  33. #include <linux/pm.h>
  34. #include <linux/sched.h>
  35. #include <linux/gpio.h>
  36. #include <linux/jiffies.h>
  37. #include <linux/i2c-gpio.h>
  38. #include <linux/i2c/pxa-i2c.h>
  39. #include <linux/serial_8250.h>
  40. #include <linux/smc91x.h>
  41. #include <linux/pwm_backlight.h>
  42. #include <linux/usb/isp116x.h>
  43. #include <linux/mtd/mtd.h>
  44. #include <linux/mtd/partitions.h>
  45. #include <linux/mtd/physmap.h>
  46. #include <linux/syscore_ops.h>
  47. #include <mach/pxa25x.h>
  48. #include <mach/audio.h>
  49. #include <mach/pxafb.h>
  50. #include <mach/regs-uart.h>
  51. #include <mach/arcom-pcmcia.h>
  52. #include <mach/viper.h>
  53. #include <asm/setup.h>
  54. #include <asm/mach-types.h>
  55. #include <asm/irq.h>
  56. #include <asm/sizes.h>
  57. #include <asm/system_info.h>
  58. #include <asm/mach/arch.h>
  59. #include <asm/mach/map.h>
  60. #include <asm/mach/irq.h>
  61. #include "generic.h"
  62. #include "devices.h"
  63. static unsigned int icr;
  64. static void viper_icr_set_bit(unsigned int bit)
  65. {
  66. icr |= bit;
  67. VIPER_ICR = icr;
  68. }
  69. static void viper_icr_clear_bit(unsigned int bit)
  70. {
  71. icr &= ~bit;
  72. VIPER_ICR = icr;
  73. }
  74. /* This function is used from the pcmcia module to reset the CF */
  75. static void viper_cf_reset(int state)
  76. {
  77. if (state)
  78. viper_icr_set_bit(VIPER_ICR_CF_RST);
  79. else
  80. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  81. }
  82. static struct arcom_pcmcia_pdata viper_pcmcia_info = {
  83. .cd_gpio = VIPER_CF_CD_GPIO,
  84. .rdy_gpio = VIPER_CF_RDY_GPIO,
  85. .pwr_gpio = VIPER_CF_POWER_GPIO,
  86. .reset = viper_cf_reset,
  87. };
  88. static struct platform_device viper_pcmcia_device = {
  89. .name = "viper-pcmcia",
  90. .id = -1,
  91. .dev = {
  92. .platform_data = &viper_pcmcia_info,
  93. },
  94. };
  95. /*
  96. * The CPLD version register was not present on VIPER boards prior to
  97. * v2i1. On v1 boards where the version register is not present we
  98. * will just read back the previous value from the databus.
  99. *
  100. * Therefore we do two reads. The first time we write 0 to the
  101. * (read-only) register before reading and the second time we write
  102. * 0xff first. If the two reads do not match or they read back as 0xff
  103. * or 0x00 then we have version 1 hardware.
  104. */
  105. static u8 viper_hw_version(void)
  106. {
  107. u8 v1, v2;
  108. unsigned long flags;
  109. local_irq_save(flags);
  110. VIPER_VERSION = 0;
  111. v1 = VIPER_VERSION;
  112. VIPER_VERSION = 0xff;
  113. v2 = VIPER_VERSION;
  114. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  115. local_irq_restore(flags);
  116. return v1;
  117. }
  118. /* CPU system core operations. */
  119. static int viper_cpu_suspend(void)
  120. {
  121. viper_icr_set_bit(VIPER_ICR_R_DIS);
  122. return 0;
  123. }
  124. static void viper_cpu_resume(void)
  125. {
  126. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  127. }
  128. static struct syscore_ops viper_cpu_syscore_ops = {
  129. .suspend = viper_cpu_suspend,
  130. .resume = viper_cpu_resume,
  131. };
  132. static unsigned int current_voltage_divisor;
  133. /*
  134. * If force is not true then step from existing to new divisor. If
  135. * force is true then jump straight to the new divisor. Stepping is
  136. * used because if the jump in voltage is too large, the VCC can dip
  137. * too low and the regulator cuts out.
  138. *
  139. * force can be used to initialize the divisor to a know state by
  140. * setting the value for the current clock speed, since we are already
  141. * running at that speed we know the voltage should be pretty close so
  142. * the jump won't be too large
  143. */
  144. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  145. {
  146. int i = 0;
  147. unsigned int divisor = 0;
  148. const char *v;
  149. if (khz < 200000) {
  150. v = "1.0"; divisor = 0xfff;
  151. } else if (khz < 300000) {
  152. v = "1.1"; divisor = 0xde5;
  153. } else {
  154. v = "1.3"; divisor = 0x325;
  155. }
  156. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  157. v, (int)khz / 1000, (int)khz % 1000);
  158. #define STEP 0x100
  159. do {
  160. int step;
  161. if (force)
  162. step = divisor;
  163. else if (current_voltage_divisor < divisor - STEP)
  164. step = current_voltage_divisor + STEP;
  165. else if (current_voltage_divisor > divisor + STEP)
  166. step = current_voltage_divisor - STEP;
  167. else
  168. step = divisor;
  169. force = 0;
  170. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  171. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  172. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  173. udelay(1);
  174. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  175. udelay(1);
  176. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  177. udelay(1);
  178. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  179. }
  180. udelay(1);
  181. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  182. udelay(1);
  183. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  184. current_voltage_divisor = step;
  185. } while (current_voltage_divisor != divisor);
  186. }
  187. /* Interrupt handling */
  188. static unsigned long viper_irq_enabled_mask;
  189. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  190. static const int viper_isa_irq_map[] = {
  191. 0, /* ISA irq #0, invalid */
  192. 0, /* ISA irq #1, invalid */
  193. 0, /* ISA irq #2, invalid */
  194. 1 << 0, /* ISA irq #3 */
  195. 1 << 1, /* ISA irq #4 */
  196. 1 << 2, /* ISA irq #5 */
  197. 1 << 3, /* ISA irq #6 */
  198. 1 << 4, /* ISA irq #7 */
  199. 0, /* ISA irq #8, invalid */
  200. 1 << 8, /* ISA irq #9 */
  201. 1 << 5, /* ISA irq #10 */
  202. 1 << 6, /* ISA irq #11 */
  203. 1 << 7, /* ISA irq #12 */
  204. 0, /* ISA irq #13, invalid */
  205. 1 << 9, /* ISA irq #14 */
  206. 1 << 10, /* ISA irq #15 */
  207. };
  208. static inline int viper_irq_to_bitmask(unsigned int irq)
  209. {
  210. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  211. }
  212. static inline int viper_bit_to_irq(int bit)
  213. {
  214. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  215. }
  216. static void viper_ack_irq(struct irq_data *d)
  217. {
  218. int viper_irq = viper_irq_to_bitmask(d->irq);
  219. if (viper_irq & 0xff)
  220. VIPER_LO_IRQ_STATUS = viper_irq;
  221. else
  222. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  223. }
  224. static void viper_mask_irq(struct irq_data *d)
  225. {
  226. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
  227. }
  228. static void viper_unmask_irq(struct irq_data *d)
  229. {
  230. viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
  231. }
  232. static inline unsigned long viper_irq_pending(void)
  233. {
  234. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  235. viper_irq_enabled_mask;
  236. }
  237. static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
  238. {
  239. unsigned long pending;
  240. pending = viper_irq_pending();
  241. do {
  242. /* we're in a chained irq handler,
  243. * so ack the interrupt by hand */
  244. desc->irq_data.chip->irq_ack(&desc->irq_data);
  245. if (likely(pending)) {
  246. irq = viper_bit_to_irq(__ffs(pending));
  247. generic_handle_irq(irq);
  248. }
  249. pending = viper_irq_pending();
  250. } while (pending);
  251. }
  252. static struct irq_chip viper_irq_chip = {
  253. .name = "ISA",
  254. .irq_ack = viper_ack_irq,
  255. .irq_mask = viper_mask_irq,
  256. .irq_unmask = viper_unmask_irq
  257. };
  258. static void __init viper_init_irq(void)
  259. {
  260. int level;
  261. int isa_irq;
  262. pxa25x_init_irq();
  263. /* setup ISA IRQs */
  264. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  265. isa_irq = viper_bit_to_irq(level);
  266. irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
  267. handle_edge_irq);
  268. set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
  269. }
  270. irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  271. viper_irq_handler);
  272. irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  273. }
  274. /* Flat Panel */
  275. static struct pxafb_mode_info fb_mode_info[] = {
  276. {
  277. .pixclock = 157500,
  278. .xres = 320,
  279. .yres = 240,
  280. .bpp = 16,
  281. .hsync_len = 63,
  282. .left_margin = 7,
  283. .right_margin = 13,
  284. .vsync_len = 20,
  285. .upper_margin = 0,
  286. .lower_margin = 0,
  287. .sync = 0,
  288. },
  289. };
  290. static struct pxafb_mach_info fb_info = {
  291. .modes = fb_mode_info,
  292. .num_modes = 1,
  293. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  294. };
  295. static int viper_backlight_init(struct device *dev)
  296. {
  297. int ret;
  298. /* GPIO9 and 10 control FB backlight. Initialise to off */
  299. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  300. if (ret)
  301. goto err_request_bckl;
  302. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  303. if (ret)
  304. goto err_request_lcd;
  305. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  306. if (ret)
  307. goto err_dir;
  308. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  309. if (ret)
  310. goto err_dir;
  311. return 0;
  312. err_dir:
  313. gpio_free(VIPER_LCD_EN_GPIO);
  314. err_request_lcd:
  315. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  316. err_request_bckl:
  317. dev_err(dev, "Failed to setup LCD GPIOs\n");
  318. return ret;
  319. }
  320. static int viper_backlight_notify(struct device *dev, int brightness)
  321. {
  322. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  323. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  324. return brightness;
  325. }
  326. static void viper_backlight_exit(struct device *dev)
  327. {
  328. gpio_free(VIPER_LCD_EN_GPIO);
  329. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  330. }
  331. static struct platform_pwm_backlight_data viper_backlight_data = {
  332. .pwm_id = 0,
  333. .max_brightness = 100,
  334. .dft_brightness = 100,
  335. .pwm_period_ns = 1000000,
  336. .init = viper_backlight_init,
  337. .notify = viper_backlight_notify,
  338. .exit = viper_backlight_exit,
  339. };
  340. static struct platform_device viper_backlight_device = {
  341. .name = "pwm-backlight",
  342. .dev = {
  343. .parent = &pxa25x_device_pwm0.dev,
  344. .platform_data = &viper_backlight_data,
  345. },
  346. };
  347. /* Ethernet */
  348. static struct resource smc91x_resources[] = {
  349. [0] = {
  350. .name = "smc91x-regs",
  351. .start = VIPER_ETH_PHYS + 0x300,
  352. .end = VIPER_ETH_PHYS + 0x30f,
  353. .flags = IORESOURCE_MEM,
  354. },
  355. [1] = {
  356. .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
  357. .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
  358. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  359. },
  360. [2] = {
  361. .name = "smc91x-data32",
  362. .start = VIPER_ETH_DATA_PHYS,
  363. .end = VIPER_ETH_DATA_PHYS + 3,
  364. .flags = IORESOURCE_MEM,
  365. },
  366. };
  367. static struct smc91x_platdata viper_smc91x_info = {
  368. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  369. .leda = RPC_LED_100_10,
  370. .ledb = RPC_LED_TX_RX,
  371. };
  372. static struct platform_device smc91x_device = {
  373. .name = "smc91x",
  374. .id = -1,
  375. .num_resources = ARRAY_SIZE(smc91x_resources),
  376. .resource = smc91x_resources,
  377. .dev = {
  378. .platform_data = &viper_smc91x_info,
  379. },
  380. };
  381. /* i2c */
  382. static struct i2c_gpio_platform_data i2c_bus_data = {
  383. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  384. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  385. .udelay = 10,
  386. .timeout = HZ,
  387. };
  388. static struct platform_device i2c_bus_device = {
  389. .name = "i2c-gpio",
  390. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  391. .dev = {
  392. .platform_data = &i2c_bus_data,
  393. }
  394. };
  395. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  396. {
  397. I2C_BOARD_INFO("ds1338", 0x68),
  398. },
  399. };
  400. /*
  401. * Serial configuration:
  402. * You can either have the standard PXA ports driven by the PXA driver,
  403. * or all the ports (PXA + 16850) driven by the 8250 driver.
  404. * Choose your poison.
  405. */
  406. static struct resource viper_serial_resources[] = {
  407. #ifndef CONFIG_SERIAL_PXA
  408. {
  409. .start = 0x40100000,
  410. .end = 0x4010001f,
  411. .flags = IORESOURCE_MEM,
  412. },
  413. {
  414. .start = 0x40200000,
  415. .end = 0x4020001f,
  416. .flags = IORESOURCE_MEM,
  417. },
  418. {
  419. .start = 0x40700000,
  420. .end = 0x4070001f,
  421. .flags = IORESOURCE_MEM,
  422. },
  423. {
  424. .start = VIPER_UARTA_PHYS,
  425. .end = VIPER_UARTA_PHYS + 0xf,
  426. .flags = IORESOURCE_MEM,
  427. },
  428. {
  429. .start = VIPER_UARTB_PHYS,
  430. .end = VIPER_UARTB_PHYS + 0xf,
  431. .flags = IORESOURCE_MEM,
  432. },
  433. #else
  434. {
  435. 0,
  436. },
  437. #endif
  438. };
  439. static struct plat_serial8250_port serial_platform_data[] = {
  440. #ifndef CONFIG_SERIAL_PXA
  441. /* Internal UARTs */
  442. {
  443. .membase = (void *)&FFUART,
  444. .mapbase = __PREG(FFUART),
  445. .irq = IRQ_FFUART,
  446. .uartclk = 921600 * 16,
  447. .regshift = 2,
  448. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  449. .iotype = UPIO_MEM,
  450. },
  451. {
  452. .membase = (void *)&BTUART,
  453. .mapbase = __PREG(BTUART),
  454. .irq = IRQ_BTUART,
  455. .uartclk = 921600 * 16,
  456. .regshift = 2,
  457. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  458. .iotype = UPIO_MEM,
  459. },
  460. {
  461. .membase = (void *)&STUART,
  462. .mapbase = __PREG(STUART),
  463. .irq = IRQ_STUART,
  464. .uartclk = 921600 * 16,
  465. .regshift = 2,
  466. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  467. .iotype = UPIO_MEM,
  468. },
  469. /* External UARTs */
  470. {
  471. .mapbase = VIPER_UARTA_PHYS,
  472. .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
  473. .irqflags = IRQF_TRIGGER_RISING,
  474. .uartclk = 1843200,
  475. .regshift = 1,
  476. .iotype = UPIO_MEM,
  477. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  478. UPF_SKIP_TEST,
  479. },
  480. {
  481. .mapbase = VIPER_UARTB_PHYS,
  482. .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
  483. .irqflags = IRQF_TRIGGER_RISING,
  484. .uartclk = 1843200,
  485. .regshift = 1,
  486. .iotype = UPIO_MEM,
  487. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  488. UPF_SKIP_TEST,
  489. },
  490. #endif
  491. { },
  492. };
  493. static struct platform_device serial_device = {
  494. .name = "serial8250",
  495. .id = 0,
  496. .dev = {
  497. .platform_data = serial_platform_data,
  498. },
  499. .num_resources = ARRAY_SIZE(viper_serial_resources),
  500. .resource = viper_serial_resources,
  501. };
  502. /* USB */
  503. static void isp116x_delay(struct device *dev, int delay)
  504. {
  505. ndelay(delay);
  506. }
  507. static struct resource isp116x_resources[] = {
  508. [0] = { /* DATA */
  509. .start = VIPER_USB_PHYS + 0,
  510. .end = VIPER_USB_PHYS + 1,
  511. .flags = IORESOURCE_MEM,
  512. },
  513. [1] = { /* ADDR */
  514. .start = VIPER_USB_PHYS + 2,
  515. .end = VIPER_USB_PHYS + 3,
  516. .flags = IORESOURCE_MEM,
  517. },
  518. [2] = {
  519. .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
  520. .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
  521. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  522. },
  523. };
  524. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  525. static struct isp116x_platform_data isp116x_platform_data = {
  526. /* Enable internal resistors on downstream ports */
  527. .sel15Kres = 1,
  528. /* On-chip overcurrent protection */
  529. .oc_enable = 1,
  530. /* INT output polarity */
  531. .int_act_high = 1,
  532. /* INT edge or level triggered */
  533. .int_edge_triggered = 0,
  534. /* WAKEUP pin connected - NOT SUPPORTED */
  535. /* .remote_wakeup_connected = 0, */
  536. /* Wakeup by devices on usb bus enabled */
  537. .remote_wakeup_enable = 0,
  538. .delay = isp116x_delay,
  539. };
  540. static struct platform_device isp116x_device = {
  541. .name = "isp116x-hcd",
  542. .id = -1,
  543. .num_resources = ARRAY_SIZE(isp116x_resources),
  544. .resource = isp116x_resources,
  545. .dev = {
  546. .platform_data = &isp116x_platform_data,
  547. },
  548. };
  549. /* MTD */
  550. static struct resource mtd_resources[] = {
  551. [0] = { /* RedBoot config + filesystem flash */
  552. .start = VIPER_FLASH_PHYS,
  553. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  554. .flags = IORESOURCE_MEM,
  555. },
  556. [1] = { /* Boot flash */
  557. .start = VIPER_BOOT_PHYS,
  558. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  559. .flags = IORESOURCE_MEM,
  560. },
  561. [2] = { /*
  562. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  563. * (each byte is on a 16bit boundary).
  564. */
  565. .start = _VIPER_SRAM_BASE,
  566. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  567. .flags = IORESOURCE_MEM,
  568. },
  569. };
  570. static struct mtd_partition viper_boot_flash_partition = {
  571. .name = "RedBoot",
  572. .size = SZ_1M,
  573. .offset = 0,
  574. .mask_flags = MTD_WRITEABLE, /* force R/O */
  575. };
  576. static struct physmap_flash_data viper_flash_data[] = {
  577. [0] = {
  578. .width = 2,
  579. .parts = NULL,
  580. .nr_parts = 0,
  581. },
  582. [1] = {
  583. .width = 2,
  584. .parts = &viper_boot_flash_partition,
  585. .nr_parts = 1,
  586. },
  587. };
  588. static struct platform_device viper_mtd_devices[] = {
  589. [0] = {
  590. .name = "physmap-flash",
  591. .id = 0,
  592. .dev = {
  593. .platform_data = &viper_flash_data[0],
  594. },
  595. .resource = &mtd_resources[0],
  596. .num_resources = 1,
  597. },
  598. [1] = {
  599. .name = "physmap-flash",
  600. .id = 1,
  601. .dev = {
  602. .platform_data = &viper_flash_data[1],
  603. },
  604. .resource = &mtd_resources[1],
  605. .num_resources = 1,
  606. },
  607. };
  608. static struct platform_device *viper_devs[] __initdata = {
  609. &smc91x_device,
  610. &i2c_bus_device,
  611. &serial_device,
  612. &isp116x_device,
  613. &viper_mtd_devices[0],
  614. &viper_mtd_devices[1],
  615. &viper_backlight_device,
  616. &viper_pcmcia_device,
  617. };
  618. static mfp_cfg_t viper_pin_config[] __initdata = {
  619. /* Chip selects */
  620. GPIO15_nCS_1,
  621. GPIO78_nCS_2,
  622. GPIO79_nCS_3,
  623. GPIO80_nCS_4,
  624. GPIO33_nCS_5,
  625. /* AC97 */
  626. GPIO28_AC97_BITCLK,
  627. GPIO29_AC97_SDATA_IN_0,
  628. GPIO30_AC97_SDATA_OUT,
  629. GPIO31_AC97_SYNC,
  630. /* FP Backlight */
  631. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  632. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  633. GPIO16_PWM0_OUT,
  634. /* Ethernet PHY Ready */
  635. GPIO18_RDY,
  636. /* Serial shutdown */
  637. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  638. /* Compact-Flash / PC104 */
  639. GPIO48_nPOE,
  640. GPIO49_nPWE,
  641. GPIO50_nPIOR,
  642. GPIO51_nPIOW,
  643. GPIO52_nPCE_1,
  644. GPIO53_nPCE_2,
  645. GPIO54_nPSKTSEL,
  646. GPIO55_nPREG,
  647. GPIO56_nPWAIT,
  648. GPIO57_nIOIS16,
  649. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  650. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  651. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  652. /* Integrated UPS control */
  653. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  654. /* Vcc regulator control */
  655. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  656. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  657. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  658. /* i2c busses */
  659. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  660. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  661. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  662. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  663. /* PC/104 Interrupt */
  664. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  665. };
  666. static unsigned long viper_tpm;
  667. static int __init viper_tpm_setup(char *str)
  668. {
  669. strict_strtoul(str, 10, &viper_tpm);
  670. return 1;
  671. }
  672. __setup("tpm=", viper_tpm_setup);
  673. static void __init viper_tpm_init(void)
  674. {
  675. struct platform_device *tpm_device;
  676. struct i2c_gpio_platform_data i2c_tpm_data = {
  677. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  678. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  679. .udelay = 10,
  680. .timeout = HZ,
  681. };
  682. char *errstr;
  683. /* Allocate TPM i2c bus if requested */
  684. if (!viper_tpm)
  685. return;
  686. tpm_device = platform_device_alloc("i2c-gpio", 2);
  687. if (tpm_device) {
  688. if (!platform_device_add_data(tpm_device,
  689. &i2c_tpm_data,
  690. sizeof(i2c_tpm_data))) {
  691. if (platform_device_add(tpm_device)) {
  692. errstr = "register TPM i2c bus";
  693. goto error_free_tpm;
  694. }
  695. } else {
  696. errstr = "allocate TPM i2c bus data";
  697. goto error_free_tpm;
  698. }
  699. } else {
  700. errstr = "allocate TPM i2c device";
  701. goto error_tpm;
  702. }
  703. return;
  704. error_free_tpm:
  705. kfree(tpm_device);
  706. error_tpm:
  707. pr_err("viper: Couldn't %s, giving up\n", errstr);
  708. }
  709. static void __init viper_init_vcore_gpios(void)
  710. {
  711. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  712. goto err_request_data;
  713. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  714. goto err_request_clk;
  715. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  716. goto err_request_cs;
  717. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  718. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  719. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  720. goto err_dir;
  721. /* c/should assume redboot set the correct level ??? */
  722. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  723. return;
  724. err_dir:
  725. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  726. err_request_cs:
  727. gpio_free(VIPER_PSU_CLK_GPIO);
  728. err_request_clk:
  729. gpio_free(VIPER_PSU_DATA_GPIO);
  730. err_request_data:
  731. pr_err("viper: Failed to setup vcore control GPIOs\n");
  732. }
  733. static void __init viper_init_serial_gpio(void)
  734. {
  735. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  736. goto err_request;
  737. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  738. goto err_dir;
  739. return;
  740. err_dir:
  741. gpio_free(VIPER_UART_SHDN_GPIO);
  742. err_request:
  743. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  744. }
  745. #ifdef CONFIG_CPU_FREQ
  746. static int viper_cpufreq_notifier(struct notifier_block *nb,
  747. unsigned long val, void *data)
  748. {
  749. struct cpufreq_freqs *freq = data;
  750. /* TODO: Adjust timings??? */
  751. switch (val) {
  752. case CPUFREQ_PRECHANGE:
  753. if (freq->old < freq->new) {
  754. /* we are getting faster so raise the voltage
  755. * before we change freq */
  756. viper_set_core_cpu_voltage(freq->new, 0);
  757. }
  758. break;
  759. case CPUFREQ_POSTCHANGE:
  760. if (freq->old > freq->new) {
  761. /* we are slowing down so drop the power
  762. * after we change freq */
  763. viper_set_core_cpu_voltage(freq->new, 0);
  764. }
  765. break;
  766. case CPUFREQ_RESUMECHANGE:
  767. viper_set_core_cpu_voltage(freq->new, 0);
  768. break;
  769. default:
  770. /* ignore */
  771. break;
  772. }
  773. return 0;
  774. }
  775. static struct notifier_block viper_cpufreq_notifier_block = {
  776. .notifier_call = viper_cpufreq_notifier
  777. };
  778. static void __init viper_init_cpufreq(void)
  779. {
  780. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  781. CPUFREQ_TRANSITION_NOTIFIER))
  782. pr_err("viper: Failed to setup cpufreq notifier\n");
  783. }
  784. #else
  785. static inline void viper_init_cpufreq(void) {}
  786. #endif
  787. static void viper_power_off(void)
  788. {
  789. pr_notice("Shutting off UPS\n");
  790. gpio_set_value(VIPER_UPS_GPIO, 1);
  791. /* Spin to death... */
  792. while (1);
  793. }
  794. static void __init viper_init(void)
  795. {
  796. u8 version;
  797. pm_power_off = viper_power_off;
  798. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  799. pxa_set_ffuart_info(NULL);
  800. pxa_set_btuart_info(NULL);
  801. pxa_set_stuart_info(NULL);
  802. /* Wake-up serial console */
  803. viper_init_serial_gpio();
  804. pxa_set_fb_info(NULL, &fb_info);
  805. /* v1 hardware cannot use the datacs line */
  806. version = viper_hw_version();
  807. if (version == 0)
  808. smc91x_device.num_resources--;
  809. pxa_set_i2c_info(NULL);
  810. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  811. viper_init_vcore_gpios();
  812. viper_init_cpufreq();
  813. register_syscore_ops(&viper_cpu_syscore_ops);
  814. if (version) {
  815. pr_info("viper: hardware v%di%d detected. "
  816. "CPLD revision %d.\n",
  817. VIPER_BOARD_VERSION(version),
  818. VIPER_BOARD_ISSUE(version),
  819. VIPER_CPLD_REVISION(version));
  820. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  821. (VIPER_BOARD_ISSUE(version) << 4) |
  822. VIPER_CPLD_REVISION(version);
  823. } else {
  824. pr_info("viper: No version register.\n");
  825. }
  826. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  827. viper_tpm_init();
  828. pxa_set_ac97_info(NULL);
  829. }
  830. static struct map_desc viper_io_desc[] __initdata = {
  831. {
  832. .virtual = VIPER_CPLD_BASE,
  833. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  834. .length = 0x00300000,
  835. .type = MT_DEVICE,
  836. },
  837. {
  838. .virtual = VIPER_PC104IO_BASE,
  839. .pfn = __phys_to_pfn(0x30000000),
  840. .length = 0x00800000,
  841. .type = MT_DEVICE,
  842. },
  843. };
  844. static void __init viper_map_io(void)
  845. {
  846. pxa25x_map_io();
  847. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  848. PCFR |= PCFR_OPDE;
  849. }
  850. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  851. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  852. .atag_offset = 0x100,
  853. .map_io = viper_map_io,
  854. .nr_irqs = PXA_NR_IRQS,
  855. .init_irq = viper_init_irq,
  856. .handle_irq = pxa25x_handle_irq,
  857. .timer = &pxa_timer,
  858. .init_machine = viper_init,
  859. .restart = pxa_restart,
  860. MACHINE_END