omap_hwmod.c 105 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "common.h"
  141. #include <plat/cpu.h>
  142. #include "clockdomain.h"
  143. #include "powerdomain.h"
  144. #include <plat/clock.h>
  145. #include <plat/omap_hwmod.h>
  146. #include <plat/prcm.h>
  147. #include "cm2xxx_3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "prm2xxx_3xxx.h"
  150. #include "prm44xx.h"
  151. #include "prminst44xx.h"
  152. #include "mux.h"
  153. #include "pm.h"
  154. /* Maximum microseconds to wait for OMAP module to softreset */
  155. #define MAX_MODULE_SOFTRESET_WAIT 10000
  156. /* Name of the OMAP hwmod for the MPU */
  157. #define MPU_INITIATOR_NAME "mpu"
  158. /*
  159. * Number of struct omap_hwmod_link records per struct
  160. * omap_hwmod_ocp_if record (master->slave and slave->master)
  161. */
  162. #define LINKS_PER_OCP_IF 2
  163. /**
  164. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  165. * @enable_module: function to enable a module (via MODULEMODE)
  166. * @disable_module: function to disable a module (via MODULEMODE)
  167. *
  168. * XXX Eventually this functionality will be hidden inside the PRM/CM
  169. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  170. * conditionals in this code.
  171. */
  172. struct omap_hwmod_soc_ops {
  173. void (*enable_module)(struct omap_hwmod *oh);
  174. int (*disable_module)(struct omap_hwmod *oh);
  175. int (*wait_target_ready)(struct omap_hwmod *oh);
  176. int (*assert_hardreset)(struct omap_hwmod *oh,
  177. struct omap_hwmod_rst_info *ohri);
  178. int (*deassert_hardreset)(struct omap_hwmod *oh,
  179. struct omap_hwmod_rst_info *ohri);
  180. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  181. struct omap_hwmod_rst_info *ohri);
  182. int (*init_clkdm)(struct omap_hwmod *oh);
  183. };
  184. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  185. static struct omap_hwmod_soc_ops soc_ops;
  186. /* omap_hwmod_list contains all registered struct omap_hwmods */
  187. static LIST_HEAD(omap_hwmod_list);
  188. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  189. static struct omap_hwmod *mpu_oh;
  190. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  191. static DEFINE_SPINLOCK(io_chain_lock);
  192. /*
  193. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  194. * allocated from - used to reduce the number of small memory
  195. * allocations, which has a significant impact on performance
  196. */
  197. static struct omap_hwmod_link *linkspace;
  198. /*
  199. * free_ls, max_ls: array indexes into linkspace; representing the
  200. * next free struct omap_hwmod_link index, and the maximum number of
  201. * struct omap_hwmod_link records allocated (respectively)
  202. */
  203. static unsigned short free_ls, max_ls, ls_supp;
  204. /* inited: set to true once the hwmod code is initialized */
  205. static bool inited;
  206. /* Private functions */
  207. /**
  208. * _fetch_next_ocp_if - return the next OCP interface in a list
  209. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  210. * @i: pointer to the index of the element pointed to by @p in the list
  211. *
  212. * Return a pointer to the struct omap_hwmod_ocp_if record
  213. * containing the struct list_head pointed to by @p, and increment
  214. * @p such that a future call to this routine will return the next
  215. * record.
  216. */
  217. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  218. int *i)
  219. {
  220. struct omap_hwmod_ocp_if *oi;
  221. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  222. *p = (*p)->next;
  223. *i = *i + 1;
  224. return oi;
  225. }
  226. /**
  227. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  228. * @oh: struct omap_hwmod *
  229. *
  230. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  231. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  232. * OCP_SYSCONFIG register or 0 upon success.
  233. */
  234. static int _update_sysc_cache(struct omap_hwmod *oh)
  235. {
  236. if (!oh->class->sysc) {
  237. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  238. return -EINVAL;
  239. }
  240. /* XXX ensure module interface clock is up */
  241. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  242. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  243. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  244. return 0;
  245. }
  246. /**
  247. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  248. * @v: OCP_SYSCONFIG value to write
  249. * @oh: struct omap_hwmod *
  250. *
  251. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  252. * one. No return value.
  253. */
  254. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  255. {
  256. if (!oh->class->sysc) {
  257. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  258. return;
  259. }
  260. /* XXX ensure module interface clock is up */
  261. /* Module might have lost context, always update cache and register */
  262. oh->_sysc_cache = v;
  263. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  264. }
  265. /**
  266. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  267. * @oh: struct omap_hwmod *
  268. * @standbymode: MIDLEMODE field bits
  269. * @v: pointer to register contents to modify
  270. *
  271. * Update the master standby mode bits in @v to be @standbymode for
  272. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  273. * upon error or 0 upon success.
  274. */
  275. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  276. u32 *v)
  277. {
  278. u32 mstandby_mask;
  279. u8 mstandby_shift;
  280. if (!oh->class->sysc ||
  281. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  282. return -EINVAL;
  283. if (!oh->class->sysc->sysc_fields) {
  284. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  285. return -EINVAL;
  286. }
  287. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  288. mstandby_mask = (0x3 << mstandby_shift);
  289. *v &= ~mstandby_mask;
  290. *v |= __ffs(standbymode) << mstandby_shift;
  291. return 0;
  292. }
  293. /**
  294. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  295. * @oh: struct omap_hwmod *
  296. * @idlemode: SIDLEMODE field bits
  297. * @v: pointer to register contents to modify
  298. *
  299. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  300. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  301. * or 0 upon success.
  302. */
  303. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  304. {
  305. u32 sidle_mask;
  306. u8 sidle_shift;
  307. if (!oh->class->sysc ||
  308. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  309. return -EINVAL;
  310. if (!oh->class->sysc->sysc_fields) {
  311. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  312. return -EINVAL;
  313. }
  314. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  315. sidle_mask = (0x3 << sidle_shift);
  316. *v &= ~sidle_mask;
  317. *v |= __ffs(idlemode) << sidle_shift;
  318. return 0;
  319. }
  320. /**
  321. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  322. * @oh: struct omap_hwmod *
  323. * @clockact: CLOCKACTIVITY field bits
  324. * @v: pointer to register contents to modify
  325. *
  326. * Update the clockactivity mode bits in @v to be @clockact for the
  327. * @oh hwmod. Used for additional powersaving on some modules. Does
  328. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  329. * success.
  330. */
  331. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  332. {
  333. u32 clkact_mask;
  334. u8 clkact_shift;
  335. if (!oh->class->sysc ||
  336. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  337. return -EINVAL;
  338. if (!oh->class->sysc->sysc_fields) {
  339. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  340. return -EINVAL;
  341. }
  342. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  343. clkact_mask = (0x3 << clkact_shift);
  344. *v &= ~clkact_mask;
  345. *v |= clockact << clkact_shift;
  346. return 0;
  347. }
  348. /**
  349. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  350. * @oh: struct omap_hwmod *
  351. * @v: pointer to register contents to modify
  352. *
  353. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  354. * error or 0 upon success.
  355. */
  356. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  357. {
  358. u32 softrst_mask;
  359. if (!oh->class->sysc ||
  360. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  361. return -EINVAL;
  362. if (!oh->class->sysc->sysc_fields) {
  363. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  364. return -EINVAL;
  365. }
  366. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  367. *v |= softrst_mask;
  368. return 0;
  369. }
  370. /**
  371. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  372. * @oh: struct omap_hwmod *
  373. *
  374. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  375. * of some modules. When the DMA must perform read/write accesses, the
  376. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  377. * for power management, software must set the DMADISABLE bit back to 1.
  378. *
  379. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  380. * error or 0 upon success.
  381. */
  382. static int _set_dmadisable(struct omap_hwmod *oh)
  383. {
  384. u32 v;
  385. u32 dmadisable_mask;
  386. if (!oh->class->sysc ||
  387. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  388. return -EINVAL;
  389. if (!oh->class->sysc->sysc_fields) {
  390. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  391. return -EINVAL;
  392. }
  393. /* clocks must be on for this operation */
  394. if (oh->_state != _HWMOD_STATE_ENABLED) {
  395. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  396. return -EINVAL;
  397. }
  398. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  399. v = oh->_sysc_cache;
  400. dmadisable_mask =
  401. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  402. v |= dmadisable_mask;
  403. _write_sysconfig(v, oh);
  404. return 0;
  405. }
  406. /**
  407. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  408. * @oh: struct omap_hwmod *
  409. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  410. * @v: pointer to register contents to modify
  411. *
  412. * Update the module autoidle bit in @v to be @autoidle for the @oh
  413. * hwmod. The autoidle bit controls whether the module can gate
  414. * internal clocks automatically when it isn't doing anything; the
  415. * exact function of this bit varies on a per-module basis. This
  416. * function does not write to the hardware. Returns -EINVAL upon
  417. * error or 0 upon success.
  418. */
  419. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  420. u32 *v)
  421. {
  422. u32 autoidle_mask;
  423. u8 autoidle_shift;
  424. if (!oh->class->sysc ||
  425. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  426. return -EINVAL;
  427. if (!oh->class->sysc->sysc_fields) {
  428. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  429. return -EINVAL;
  430. }
  431. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  432. autoidle_mask = (0x1 << autoidle_shift);
  433. *v &= ~autoidle_mask;
  434. *v |= autoidle << autoidle_shift;
  435. return 0;
  436. }
  437. /**
  438. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  439. * @oh: struct omap_hwmod *
  440. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  441. *
  442. * Set or clear the I/O pad wakeup flag in the mux entries for the
  443. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  444. * in memory. If the hwmod is currently idled, and the new idle
  445. * values don't match the previous ones, this function will also
  446. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  447. * currently idled, this function won't touch the hardware: the new
  448. * mux settings are written to the SCM PADCTRL registers when the
  449. * hwmod is idled. No return value.
  450. */
  451. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  452. {
  453. struct omap_device_pad *pad;
  454. bool change = false;
  455. u16 prev_idle;
  456. int j;
  457. if (!oh->mux || !oh->mux->enabled)
  458. return;
  459. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  460. pad = oh->mux->pads_dynamic[j];
  461. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  462. continue;
  463. prev_idle = pad->idle;
  464. if (set_wake)
  465. pad->idle |= OMAP_WAKEUP_EN;
  466. else
  467. pad->idle &= ~OMAP_WAKEUP_EN;
  468. if (prev_idle != pad->idle)
  469. change = true;
  470. }
  471. if (change && oh->_state == _HWMOD_STATE_IDLE)
  472. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  473. }
  474. /**
  475. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  476. * @oh: struct omap_hwmod *
  477. *
  478. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  479. * upon error or 0 upon success.
  480. */
  481. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  482. {
  483. if (!oh->class->sysc ||
  484. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  485. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  486. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  487. return -EINVAL;
  488. if (!oh->class->sysc->sysc_fields) {
  489. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  490. return -EINVAL;
  491. }
  492. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  493. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  494. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  495. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  496. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  497. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  498. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  499. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  500. return 0;
  501. }
  502. /**
  503. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  504. * @oh: struct omap_hwmod *
  505. *
  506. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  507. * upon error or 0 upon success.
  508. */
  509. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  510. {
  511. if (!oh->class->sysc ||
  512. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  513. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  514. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  515. return -EINVAL;
  516. if (!oh->class->sysc->sysc_fields) {
  517. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  518. return -EINVAL;
  519. }
  520. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  521. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  522. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  523. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  524. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  525. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  526. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  527. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  528. return 0;
  529. }
  530. /**
  531. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  532. * @oh: struct omap_hwmod *
  533. *
  534. * Prevent the hardware module @oh from entering idle while the
  535. * hardare module initiator @init_oh is active. Useful when a module
  536. * will be accessed by a particular initiator (e.g., if a module will
  537. * be accessed by the IVA, there should be a sleepdep between the IVA
  538. * initiator and the module). Only applies to modules in smart-idle
  539. * mode. If the clockdomain is marked as not needing autodeps, return
  540. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  541. * passes along clkdm_add_sleepdep() value upon success.
  542. */
  543. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  544. {
  545. if (!oh->_clk)
  546. return -EINVAL;
  547. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  548. return 0;
  549. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  550. }
  551. /**
  552. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  553. * @oh: struct omap_hwmod *
  554. *
  555. * Allow the hardware module @oh to enter idle while the hardare
  556. * module initiator @init_oh is active. Useful when a module will not
  557. * be accessed by a particular initiator (e.g., if a module will not
  558. * be accessed by the IVA, there should be no sleepdep between the IVA
  559. * initiator and the module). Only applies to modules in smart-idle
  560. * mode. If the clockdomain is marked as not needing autodeps, return
  561. * 0 without doing anything. Returns -EINVAL upon error or passes
  562. * along clkdm_del_sleepdep() value upon success.
  563. */
  564. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  565. {
  566. if (!oh->_clk)
  567. return -EINVAL;
  568. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  569. return 0;
  570. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  571. }
  572. /**
  573. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  574. * @oh: struct omap_hwmod *
  575. *
  576. * Called from _init_clocks(). Populates the @oh _clk (main
  577. * functional clock pointer) if a main_clk is present. Returns 0 on
  578. * success or -EINVAL on error.
  579. */
  580. static int _init_main_clk(struct omap_hwmod *oh)
  581. {
  582. int ret = 0;
  583. if (!oh->main_clk)
  584. return 0;
  585. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  586. if (!oh->_clk) {
  587. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  588. oh->name, oh->main_clk);
  589. return -EINVAL;
  590. }
  591. if (!oh->_clk->clkdm)
  592. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  593. oh->main_clk, oh->_clk->name);
  594. return ret;
  595. }
  596. /**
  597. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  598. * @oh: struct omap_hwmod *
  599. *
  600. * Called from _init_clocks(). Populates the @oh OCP slave interface
  601. * clock pointers. Returns 0 on success or -EINVAL on error.
  602. */
  603. static int _init_interface_clks(struct omap_hwmod *oh)
  604. {
  605. struct omap_hwmod_ocp_if *os;
  606. struct list_head *p;
  607. struct clk *c;
  608. int i = 0;
  609. int ret = 0;
  610. p = oh->slave_ports.next;
  611. while (i < oh->slaves_cnt) {
  612. os = _fetch_next_ocp_if(&p, &i);
  613. if (!os->clk)
  614. continue;
  615. c = omap_clk_get_by_name(os->clk);
  616. if (!c) {
  617. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  618. oh->name, os->clk);
  619. ret = -EINVAL;
  620. }
  621. os->_clk = c;
  622. }
  623. return ret;
  624. }
  625. /**
  626. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  627. * @oh: struct omap_hwmod *
  628. *
  629. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  630. * clock pointers. Returns 0 on success or -EINVAL on error.
  631. */
  632. static int _init_opt_clks(struct omap_hwmod *oh)
  633. {
  634. struct omap_hwmod_opt_clk *oc;
  635. struct clk *c;
  636. int i;
  637. int ret = 0;
  638. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  639. c = omap_clk_get_by_name(oc->clk);
  640. if (!c) {
  641. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  642. oh->name, oc->clk);
  643. ret = -EINVAL;
  644. }
  645. oc->_clk = c;
  646. }
  647. return ret;
  648. }
  649. /**
  650. * _enable_clocks - enable hwmod main clock and interface clocks
  651. * @oh: struct omap_hwmod *
  652. *
  653. * Enables all clocks necessary for register reads and writes to succeed
  654. * on the hwmod @oh. Returns 0.
  655. */
  656. static int _enable_clocks(struct omap_hwmod *oh)
  657. {
  658. struct omap_hwmod_ocp_if *os;
  659. struct list_head *p;
  660. int i = 0;
  661. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  662. if (oh->_clk)
  663. clk_enable(oh->_clk);
  664. p = oh->slave_ports.next;
  665. while (i < oh->slaves_cnt) {
  666. os = _fetch_next_ocp_if(&p, &i);
  667. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  668. clk_enable(os->_clk);
  669. }
  670. /* The opt clocks are controlled by the device driver. */
  671. return 0;
  672. }
  673. /**
  674. * _disable_clocks - disable hwmod main clock and interface clocks
  675. * @oh: struct omap_hwmod *
  676. *
  677. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  678. */
  679. static int _disable_clocks(struct omap_hwmod *oh)
  680. {
  681. struct omap_hwmod_ocp_if *os;
  682. struct list_head *p;
  683. int i = 0;
  684. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  685. if (oh->_clk)
  686. clk_disable(oh->_clk);
  687. p = oh->slave_ports.next;
  688. while (i < oh->slaves_cnt) {
  689. os = _fetch_next_ocp_if(&p, &i);
  690. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  691. clk_disable(os->_clk);
  692. }
  693. /* The opt clocks are controlled by the device driver. */
  694. return 0;
  695. }
  696. static void _enable_optional_clocks(struct omap_hwmod *oh)
  697. {
  698. struct omap_hwmod_opt_clk *oc;
  699. int i;
  700. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  701. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  702. if (oc->_clk) {
  703. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  704. oc->_clk->name);
  705. clk_enable(oc->_clk);
  706. }
  707. }
  708. static void _disable_optional_clocks(struct omap_hwmod *oh)
  709. {
  710. struct omap_hwmod_opt_clk *oc;
  711. int i;
  712. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  713. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  714. if (oc->_clk) {
  715. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  716. oc->_clk->name);
  717. clk_disable(oc->_clk);
  718. }
  719. }
  720. /**
  721. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  722. * @oh: struct omap_hwmod *
  723. *
  724. * Enables the PRCM module mode related to the hwmod @oh.
  725. * No return value.
  726. */
  727. static void _omap4_enable_module(struct omap_hwmod *oh)
  728. {
  729. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  730. return;
  731. pr_debug("omap_hwmod: %s: %s: %d\n",
  732. oh->name, __func__, oh->prcm.omap4.modulemode);
  733. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  734. oh->clkdm->prcm_partition,
  735. oh->clkdm->cm_inst,
  736. oh->clkdm->clkdm_offs,
  737. oh->prcm.omap4.clkctrl_offs);
  738. }
  739. /**
  740. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  741. * @oh: struct omap_hwmod *
  742. *
  743. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  744. * does not have an IDLEST bit or if the module successfully enters
  745. * slave idle; otherwise, pass along the return value of the
  746. * appropriate *_cm*_wait_module_idle() function.
  747. */
  748. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  749. {
  750. if (!oh || !oh->clkdm)
  751. return -EINVAL;
  752. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  753. return 0;
  754. if (oh->flags & HWMOD_NO_IDLEST)
  755. return 0;
  756. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  757. oh->clkdm->cm_inst,
  758. oh->clkdm->clkdm_offs,
  759. oh->prcm.omap4.clkctrl_offs);
  760. }
  761. /**
  762. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  763. * @oh: struct omap_hwmod *oh
  764. *
  765. * Count and return the number of MPU IRQs associated with the hwmod
  766. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  767. * NULL.
  768. */
  769. static int _count_mpu_irqs(struct omap_hwmod *oh)
  770. {
  771. struct omap_hwmod_irq_info *ohii;
  772. int i = 0;
  773. if (!oh || !oh->mpu_irqs)
  774. return 0;
  775. do {
  776. ohii = &oh->mpu_irqs[i++];
  777. } while (ohii->irq != -1);
  778. return i-1;
  779. }
  780. /**
  781. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  782. * @oh: struct omap_hwmod *oh
  783. *
  784. * Count and return the number of SDMA request lines associated with
  785. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  786. * if @oh is NULL.
  787. */
  788. static int _count_sdma_reqs(struct omap_hwmod *oh)
  789. {
  790. struct omap_hwmod_dma_info *ohdi;
  791. int i = 0;
  792. if (!oh || !oh->sdma_reqs)
  793. return 0;
  794. do {
  795. ohdi = &oh->sdma_reqs[i++];
  796. } while (ohdi->dma_req != -1);
  797. return i-1;
  798. }
  799. /**
  800. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  801. * @oh: struct omap_hwmod *oh
  802. *
  803. * Count and return the number of address space ranges associated with
  804. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  805. * if @oh is NULL.
  806. */
  807. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  808. {
  809. struct omap_hwmod_addr_space *mem;
  810. int i = 0;
  811. if (!os || !os->addr)
  812. return 0;
  813. do {
  814. mem = &os->addr[i++];
  815. } while (mem->pa_start != mem->pa_end);
  816. return i-1;
  817. }
  818. /**
  819. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  820. * @oh: struct omap_hwmod * to operate on
  821. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  822. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  823. *
  824. * Retrieve a MPU hardware IRQ line number named by @name associated
  825. * with the IP block pointed to by @oh. The IRQ number will be filled
  826. * into the address pointed to by @dma. When @name is non-null, the
  827. * IRQ line number associated with the named entry will be returned.
  828. * If @name is null, the first matching entry will be returned. Data
  829. * order is not meaningful in hwmod data, so callers are strongly
  830. * encouraged to use a non-null @name whenever possible to avoid
  831. * unpredictable effects if hwmod data is later added that causes data
  832. * ordering to change. Returns 0 upon success or a negative error
  833. * code upon error.
  834. */
  835. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  836. unsigned int *irq)
  837. {
  838. int i;
  839. bool found = false;
  840. if (!oh->mpu_irqs)
  841. return -ENOENT;
  842. i = 0;
  843. while (oh->mpu_irqs[i].irq != -1) {
  844. if (name == oh->mpu_irqs[i].name ||
  845. !strcmp(name, oh->mpu_irqs[i].name)) {
  846. found = true;
  847. break;
  848. }
  849. i++;
  850. }
  851. if (!found)
  852. return -ENOENT;
  853. *irq = oh->mpu_irqs[i].irq;
  854. return 0;
  855. }
  856. /**
  857. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  858. * @oh: struct omap_hwmod * to operate on
  859. * @name: pointer to the name of the SDMA request line to fetch (optional)
  860. * @dma: pointer to an unsigned int to store the request line ID to
  861. *
  862. * Retrieve an SDMA request line ID named by @name on the IP block
  863. * pointed to by @oh. The ID will be filled into the address pointed
  864. * to by @dma. When @name is non-null, the request line ID associated
  865. * with the named entry will be returned. If @name is null, the first
  866. * matching entry will be returned. Data order is not meaningful in
  867. * hwmod data, so callers are strongly encouraged to use a non-null
  868. * @name whenever possible to avoid unpredictable effects if hwmod
  869. * data is later added that causes data ordering to change. Returns 0
  870. * upon success or a negative error code upon error.
  871. */
  872. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  873. unsigned int *dma)
  874. {
  875. int i;
  876. bool found = false;
  877. if (!oh->sdma_reqs)
  878. return -ENOENT;
  879. i = 0;
  880. while (oh->sdma_reqs[i].dma_req != -1) {
  881. if (name == oh->sdma_reqs[i].name ||
  882. !strcmp(name, oh->sdma_reqs[i].name)) {
  883. found = true;
  884. break;
  885. }
  886. i++;
  887. }
  888. if (!found)
  889. return -ENOENT;
  890. *dma = oh->sdma_reqs[i].dma_req;
  891. return 0;
  892. }
  893. /**
  894. * _get_addr_space_by_name - fetch address space start & end by name
  895. * @oh: struct omap_hwmod * to operate on
  896. * @name: pointer to the name of the address space to fetch (optional)
  897. * @pa_start: pointer to a u32 to store the starting address to
  898. * @pa_end: pointer to a u32 to store the ending address to
  899. *
  900. * Retrieve address space start and end addresses for the IP block
  901. * pointed to by @oh. The data will be filled into the addresses
  902. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  903. * address space data associated with the named entry will be
  904. * returned. If @name is null, the first matching entry will be
  905. * returned. Data order is not meaningful in hwmod data, so callers
  906. * are strongly encouraged to use a non-null @name whenever possible
  907. * to avoid unpredictable effects if hwmod data is later added that
  908. * causes data ordering to change. Returns 0 upon success or a
  909. * negative error code upon error.
  910. */
  911. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  912. u32 *pa_start, u32 *pa_end)
  913. {
  914. int i, j;
  915. struct omap_hwmod_ocp_if *os;
  916. struct list_head *p = NULL;
  917. bool found = false;
  918. p = oh->slave_ports.next;
  919. i = 0;
  920. while (i < oh->slaves_cnt) {
  921. os = _fetch_next_ocp_if(&p, &i);
  922. if (!os->addr)
  923. return -ENOENT;
  924. j = 0;
  925. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  926. if (name == os->addr[j].name ||
  927. !strcmp(name, os->addr[j].name)) {
  928. found = true;
  929. break;
  930. }
  931. j++;
  932. }
  933. if (found)
  934. break;
  935. }
  936. if (!found)
  937. return -ENOENT;
  938. *pa_start = os->addr[j].pa_start;
  939. *pa_end = os->addr[j].pa_end;
  940. return 0;
  941. }
  942. /**
  943. * _save_mpu_port_index - find and save the index to @oh's MPU port
  944. * @oh: struct omap_hwmod *
  945. *
  946. * Determines the array index of the OCP slave port that the MPU uses
  947. * to address the device, and saves it into the struct omap_hwmod.
  948. * Intended to be called during hwmod registration only. No return
  949. * value.
  950. */
  951. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  952. {
  953. struct omap_hwmod_ocp_if *os = NULL;
  954. struct list_head *p;
  955. int i = 0;
  956. if (!oh)
  957. return;
  958. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  959. p = oh->slave_ports.next;
  960. while (i < oh->slaves_cnt) {
  961. os = _fetch_next_ocp_if(&p, &i);
  962. if (os->user & OCP_USER_MPU) {
  963. oh->_mpu_port = os;
  964. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  965. break;
  966. }
  967. }
  968. return;
  969. }
  970. /**
  971. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  972. * @oh: struct omap_hwmod *
  973. *
  974. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  975. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  976. * communicate with the IP block. This interface need not be directly
  977. * connected to the MPU (and almost certainly is not), but is directly
  978. * connected to the IP block represented by @oh. Returns a pointer
  979. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  980. * error or if there does not appear to be a path from the MPU to this
  981. * IP block.
  982. */
  983. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  984. {
  985. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  986. return NULL;
  987. return oh->_mpu_port;
  988. };
  989. /**
  990. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  991. * @oh: struct omap_hwmod *
  992. *
  993. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  994. * the register target MPU address space; or returns NULL upon error.
  995. */
  996. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  997. {
  998. struct omap_hwmod_ocp_if *os;
  999. struct omap_hwmod_addr_space *mem;
  1000. int found = 0, i = 0;
  1001. os = _find_mpu_rt_port(oh);
  1002. if (!os || !os->addr)
  1003. return NULL;
  1004. do {
  1005. mem = &os->addr[i++];
  1006. if (mem->flags & ADDR_TYPE_RT)
  1007. found = 1;
  1008. } while (!found && mem->pa_start != mem->pa_end);
  1009. return (found) ? mem : NULL;
  1010. }
  1011. /**
  1012. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1013. * @oh: struct omap_hwmod *
  1014. *
  1015. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1016. * by @oh is set to indicate to the PRCM that the IP block is active.
  1017. * Usually this means placing the module into smart-idle mode and
  1018. * smart-standby, but if there is a bug in the automatic idle handling
  1019. * for the IP block, it may need to be placed into the force-idle or
  1020. * no-idle variants of these modes. No return value.
  1021. */
  1022. static void _enable_sysc(struct omap_hwmod *oh)
  1023. {
  1024. u8 idlemode, sf;
  1025. u32 v;
  1026. bool clkdm_act;
  1027. if (!oh->class->sysc)
  1028. return;
  1029. v = oh->_sysc_cache;
  1030. sf = oh->class->sysc->sysc_flags;
  1031. if (sf & SYSC_HAS_SIDLEMODE) {
  1032. clkdm_act = ((oh->clkdm &&
  1033. oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
  1034. (oh->_clk && oh->_clk->clkdm &&
  1035. oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
  1036. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1037. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1038. idlemode = HWMOD_IDLEMODE_FORCE;
  1039. else
  1040. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1041. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1042. _set_slave_idlemode(oh, idlemode, &v);
  1043. }
  1044. if (sf & SYSC_HAS_MIDLEMODE) {
  1045. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1046. idlemode = HWMOD_IDLEMODE_NO;
  1047. } else {
  1048. if (sf & SYSC_HAS_ENAWAKEUP)
  1049. _enable_wakeup(oh, &v);
  1050. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1051. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1052. else
  1053. idlemode = HWMOD_IDLEMODE_SMART;
  1054. }
  1055. _set_master_standbymode(oh, idlemode, &v);
  1056. }
  1057. /*
  1058. * XXX The clock framework should handle this, by
  1059. * calling into this code. But this must wait until the
  1060. * clock structures are tagged with omap_hwmod entries
  1061. */
  1062. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1063. (sf & SYSC_HAS_CLOCKACTIVITY))
  1064. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1065. /* If slave is in SMARTIDLE, also enable wakeup */
  1066. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1067. _enable_wakeup(oh, &v);
  1068. _write_sysconfig(v, oh);
  1069. /*
  1070. * Set the autoidle bit only after setting the smartidle bit
  1071. * Setting this will not have any impact on the other modules.
  1072. */
  1073. if (sf & SYSC_HAS_AUTOIDLE) {
  1074. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1075. 0 : 1;
  1076. _set_module_autoidle(oh, idlemode, &v);
  1077. _write_sysconfig(v, oh);
  1078. }
  1079. }
  1080. /**
  1081. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1082. * @oh: struct omap_hwmod *
  1083. *
  1084. * If module is marked as SWSUP_SIDLE, force the module into slave
  1085. * idle; otherwise, configure it for smart-idle. If module is marked
  1086. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1087. * configure it for smart-standby. No return value.
  1088. */
  1089. static void _idle_sysc(struct omap_hwmod *oh)
  1090. {
  1091. u8 idlemode, sf;
  1092. u32 v;
  1093. if (!oh->class->sysc)
  1094. return;
  1095. v = oh->_sysc_cache;
  1096. sf = oh->class->sysc->sysc_flags;
  1097. if (sf & SYSC_HAS_SIDLEMODE) {
  1098. /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
  1099. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1100. !(oh->class->sysc->idlemodes &
  1101. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1102. idlemode = HWMOD_IDLEMODE_FORCE;
  1103. else
  1104. idlemode = HWMOD_IDLEMODE_SMART;
  1105. _set_slave_idlemode(oh, idlemode, &v);
  1106. }
  1107. if (sf & SYSC_HAS_MIDLEMODE) {
  1108. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1109. idlemode = HWMOD_IDLEMODE_FORCE;
  1110. } else {
  1111. if (sf & SYSC_HAS_ENAWAKEUP)
  1112. _enable_wakeup(oh, &v);
  1113. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1114. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1115. else
  1116. idlemode = HWMOD_IDLEMODE_SMART;
  1117. }
  1118. _set_master_standbymode(oh, idlemode, &v);
  1119. }
  1120. /* If slave is in SMARTIDLE, also enable wakeup */
  1121. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1122. _enable_wakeup(oh, &v);
  1123. _write_sysconfig(v, oh);
  1124. }
  1125. /**
  1126. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1127. * @oh: struct omap_hwmod *
  1128. *
  1129. * Force the module into slave idle and master suspend. No return
  1130. * value.
  1131. */
  1132. static void _shutdown_sysc(struct omap_hwmod *oh)
  1133. {
  1134. u32 v;
  1135. u8 sf;
  1136. if (!oh->class->sysc)
  1137. return;
  1138. v = oh->_sysc_cache;
  1139. sf = oh->class->sysc->sysc_flags;
  1140. if (sf & SYSC_HAS_SIDLEMODE)
  1141. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1142. if (sf & SYSC_HAS_MIDLEMODE)
  1143. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1144. if (sf & SYSC_HAS_AUTOIDLE)
  1145. _set_module_autoidle(oh, 1, &v);
  1146. _write_sysconfig(v, oh);
  1147. }
  1148. /**
  1149. * _lookup - find an omap_hwmod by name
  1150. * @name: find an omap_hwmod by name
  1151. *
  1152. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1153. */
  1154. static struct omap_hwmod *_lookup(const char *name)
  1155. {
  1156. struct omap_hwmod *oh, *temp_oh;
  1157. oh = NULL;
  1158. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1159. if (!strcmp(name, temp_oh->name)) {
  1160. oh = temp_oh;
  1161. break;
  1162. }
  1163. }
  1164. return oh;
  1165. }
  1166. /**
  1167. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1168. * @oh: struct omap_hwmod *
  1169. *
  1170. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1171. * clockdomain pointer, and save it into the struct omap_hwmod.
  1172. * Return -EINVAL if the clkdm_name lookup failed.
  1173. */
  1174. static int _init_clkdm(struct omap_hwmod *oh)
  1175. {
  1176. if (!oh->clkdm_name)
  1177. return 0;
  1178. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1179. if (!oh->clkdm) {
  1180. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1181. oh->name, oh->clkdm_name);
  1182. return -EINVAL;
  1183. }
  1184. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1185. oh->name, oh->clkdm_name);
  1186. return 0;
  1187. }
  1188. /**
  1189. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1190. * well the clockdomain.
  1191. * @oh: struct omap_hwmod *
  1192. * @data: not used; pass NULL
  1193. *
  1194. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1195. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1196. * success, or a negative error code on failure.
  1197. */
  1198. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1199. {
  1200. int ret = 0;
  1201. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1202. return 0;
  1203. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1204. ret |= _init_main_clk(oh);
  1205. ret |= _init_interface_clks(oh);
  1206. ret |= _init_opt_clks(oh);
  1207. if (soc_ops.init_clkdm)
  1208. ret |= soc_ops.init_clkdm(oh);
  1209. if (!ret)
  1210. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1211. else
  1212. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1213. return ret;
  1214. }
  1215. /**
  1216. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1217. * @oh: struct omap_hwmod *
  1218. * @name: name of the reset line in the context of this hwmod
  1219. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1220. *
  1221. * Return the bit position of the reset line that match the
  1222. * input name. Return -ENOENT if not found.
  1223. */
  1224. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1225. struct omap_hwmod_rst_info *ohri)
  1226. {
  1227. int i;
  1228. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1229. const char *rst_line = oh->rst_lines[i].name;
  1230. if (!strcmp(rst_line, name)) {
  1231. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1232. ohri->st_shift = oh->rst_lines[i].st_shift;
  1233. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1234. oh->name, __func__, rst_line, ohri->rst_shift,
  1235. ohri->st_shift);
  1236. return 0;
  1237. }
  1238. }
  1239. return -ENOENT;
  1240. }
  1241. /**
  1242. * _assert_hardreset - assert the HW reset line of submodules
  1243. * contained in the hwmod module.
  1244. * @oh: struct omap_hwmod *
  1245. * @name: name of the reset line to lookup and assert
  1246. *
  1247. * Some IP like dsp, ipu or iva contain processor that require an HW
  1248. * reset line to be assert / deassert in order to enable fully the IP.
  1249. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1250. * asserting the hardreset line on the currently-booted SoC, or passes
  1251. * along the return value from _lookup_hardreset() or the SoC's
  1252. * assert_hardreset code.
  1253. */
  1254. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1255. {
  1256. struct omap_hwmod_rst_info ohri;
  1257. u8 ret = -EINVAL;
  1258. if (!oh)
  1259. return -EINVAL;
  1260. if (!soc_ops.assert_hardreset)
  1261. return -ENOSYS;
  1262. ret = _lookup_hardreset(oh, name, &ohri);
  1263. if (IS_ERR_VALUE(ret))
  1264. return ret;
  1265. ret = soc_ops.assert_hardreset(oh, &ohri);
  1266. return ret;
  1267. }
  1268. /**
  1269. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1270. * in the hwmod module.
  1271. * @oh: struct omap_hwmod *
  1272. * @name: name of the reset line to look up and deassert
  1273. *
  1274. * Some IP like dsp, ipu or iva contain processor that require an HW
  1275. * reset line to be assert / deassert in order to enable fully the IP.
  1276. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1277. * deasserting the hardreset line on the currently-booted SoC, or passes
  1278. * along the return value from _lookup_hardreset() or the SoC's
  1279. * deassert_hardreset code.
  1280. */
  1281. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1282. {
  1283. struct omap_hwmod_rst_info ohri;
  1284. int ret = -EINVAL;
  1285. if (!oh)
  1286. return -EINVAL;
  1287. if (!soc_ops.deassert_hardreset)
  1288. return -ENOSYS;
  1289. ret = _lookup_hardreset(oh, name, &ohri);
  1290. if (IS_ERR_VALUE(ret))
  1291. return ret;
  1292. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1293. if (ret == -EBUSY)
  1294. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1295. return ret;
  1296. }
  1297. /**
  1298. * _read_hardreset - read the HW reset line state of submodules
  1299. * contained in the hwmod module
  1300. * @oh: struct omap_hwmod *
  1301. * @name: name of the reset line to look up and read
  1302. *
  1303. * Return the state of the reset line. Returns -EINVAL if @oh is
  1304. * null, -ENOSYS if we have no way of reading the hardreset line
  1305. * status on the currently-booted SoC, or passes along the return
  1306. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1307. * code.
  1308. */
  1309. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1310. {
  1311. struct omap_hwmod_rst_info ohri;
  1312. u8 ret = -EINVAL;
  1313. if (!oh)
  1314. return -EINVAL;
  1315. if (!soc_ops.is_hardreset_asserted)
  1316. return -ENOSYS;
  1317. ret = _lookup_hardreset(oh, name, &ohri);
  1318. if (IS_ERR_VALUE(ret))
  1319. return ret;
  1320. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1321. }
  1322. /**
  1323. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1324. * @oh: struct omap_hwmod *
  1325. *
  1326. * If any hardreset line associated with @oh is asserted, then return true.
  1327. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1328. * no hardreset lines associated with @oh are asserted, then return false.
  1329. * This function is used to avoid executing some parts of the IP block
  1330. * enable/disable sequence if a hardreset line is set.
  1331. */
  1332. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1333. {
  1334. int i;
  1335. if (oh->rst_lines_cnt == 0)
  1336. return false;
  1337. for (i = 0; i < oh->rst_lines_cnt; i++)
  1338. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1339. return true;
  1340. return false;
  1341. }
  1342. /**
  1343. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1344. * @oh: struct omap_hwmod *
  1345. *
  1346. * Disable the PRCM module mode related to the hwmod @oh.
  1347. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1348. */
  1349. static int _omap4_disable_module(struct omap_hwmod *oh)
  1350. {
  1351. int v;
  1352. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1353. return -EINVAL;
  1354. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1355. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1356. oh->clkdm->cm_inst,
  1357. oh->clkdm->clkdm_offs,
  1358. oh->prcm.omap4.clkctrl_offs);
  1359. if (_are_any_hardreset_lines_asserted(oh))
  1360. return 0;
  1361. v = _omap4_wait_target_disable(oh);
  1362. if (v)
  1363. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1364. oh->name);
  1365. return 0;
  1366. }
  1367. /**
  1368. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1369. * @oh: struct omap_hwmod *
  1370. *
  1371. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1372. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1373. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1374. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1375. *
  1376. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1377. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1378. * use the SYSCONFIG softreset bit to provide the status.
  1379. *
  1380. * Note that some IP like McBSP do have reset control but don't have
  1381. * reset status.
  1382. */
  1383. static int _ocp_softreset(struct omap_hwmod *oh)
  1384. {
  1385. u32 v, softrst_mask;
  1386. int c = 0;
  1387. int ret = 0;
  1388. if (!oh->class->sysc ||
  1389. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1390. return -ENOENT;
  1391. /* clocks must be on for this operation */
  1392. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1393. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1394. "enabled state\n", oh->name);
  1395. return -EINVAL;
  1396. }
  1397. /* For some modules, all optionnal clocks need to be enabled as well */
  1398. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1399. _enable_optional_clocks(oh);
  1400. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1401. v = oh->_sysc_cache;
  1402. ret = _set_softreset(oh, &v);
  1403. if (ret)
  1404. goto dis_opt_clks;
  1405. _write_sysconfig(v, oh);
  1406. if (oh->class->sysc->srst_udelay)
  1407. udelay(oh->class->sysc->srst_udelay);
  1408. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1409. omap_test_timeout((omap_hwmod_read(oh,
  1410. oh->class->sysc->syss_offs)
  1411. & SYSS_RESETDONE_MASK),
  1412. MAX_MODULE_SOFTRESET_WAIT, c);
  1413. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1414. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1415. omap_test_timeout(!(omap_hwmod_read(oh,
  1416. oh->class->sysc->sysc_offs)
  1417. & softrst_mask),
  1418. MAX_MODULE_SOFTRESET_WAIT, c);
  1419. }
  1420. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1421. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1422. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1423. else
  1424. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1425. /*
  1426. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1427. * _wait_target_ready() or _reset()
  1428. */
  1429. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1430. dis_opt_clks:
  1431. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1432. _disable_optional_clocks(oh);
  1433. return ret;
  1434. }
  1435. /**
  1436. * _reset - reset an omap_hwmod
  1437. * @oh: struct omap_hwmod *
  1438. *
  1439. * Resets an omap_hwmod @oh. If the module has a custom reset
  1440. * function pointer defined, then call it to reset the IP block, and
  1441. * pass along its return value to the caller. Otherwise, if the IP
  1442. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1443. * associated with it, call a function to reset the IP block via that
  1444. * method, and pass along the return value to the caller. Finally, if
  1445. * the IP block has some hardreset lines associated with it, assert
  1446. * all of those, but do _not_ deassert them. (This is because driver
  1447. * authors have expressed an apparent requirement to control the
  1448. * deassertion of the hardreset lines themselves.)
  1449. *
  1450. * The default software reset mechanism for most OMAP IP blocks is
  1451. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1452. * hwmods cannot be reset via this method. Some are not targets and
  1453. * therefore have no OCP header registers to access. Others (like the
  1454. * IVA) have idiosyncratic reset sequences. So for these relatively
  1455. * rare cases, custom reset code can be supplied in the struct
  1456. * omap_hwmod_class .reset function pointer.
  1457. *
  1458. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1459. * does not prevent idling of the system. This is necessary for cases
  1460. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1461. * kernel without disabling dma.
  1462. *
  1463. * Passes along the return value from either _ocp_softreset() or the
  1464. * custom reset function - these must return -EINVAL if the hwmod
  1465. * cannot be reset this way or if the hwmod is in the wrong state,
  1466. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1467. */
  1468. static int _reset(struct omap_hwmod *oh)
  1469. {
  1470. int i, r;
  1471. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1472. if (oh->class->reset) {
  1473. r = oh->class->reset(oh);
  1474. } else {
  1475. if (oh->rst_lines_cnt > 0) {
  1476. for (i = 0; i < oh->rst_lines_cnt; i++)
  1477. _assert_hardreset(oh, oh->rst_lines[i].name);
  1478. return 0;
  1479. } else {
  1480. r = _ocp_softreset(oh);
  1481. if (r == -ENOENT)
  1482. r = 0;
  1483. }
  1484. }
  1485. _set_dmadisable(oh);
  1486. /*
  1487. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1488. * softreset. The _enable() function should be split to avoid
  1489. * the rewrite of the OCP_SYSCONFIG register.
  1490. */
  1491. if (oh->class->sysc) {
  1492. _update_sysc_cache(oh);
  1493. _enable_sysc(oh);
  1494. }
  1495. return r;
  1496. }
  1497. /**
  1498. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1499. *
  1500. * Call the appropriate PRM function to clear any logged I/O chain
  1501. * wakeups and to reconfigure the chain. This apparently needs to be
  1502. * done upon every mux change. Since hwmods can be concurrently
  1503. * enabled and idled, hold a spinlock around the I/O chain
  1504. * reconfiguration sequence. No return value.
  1505. *
  1506. * XXX When the PRM code is moved to drivers, this function can be removed,
  1507. * as the PRM infrastructure should abstract this.
  1508. */
  1509. static void _reconfigure_io_chain(void)
  1510. {
  1511. unsigned long flags;
  1512. spin_lock_irqsave(&io_chain_lock, flags);
  1513. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1514. omap3xxx_prm_reconfigure_io_chain();
  1515. else if (cpu_is_omap44xx())
  1516. omap44xx_prm_reconfigure_io_chain();
  1517. spin_unlock_irqrestore(&io_chain_lock, flags);
  1518. }
  1519. /**
  1520. * _enable - enable an omap_hwmod
  1521. * @oh: struct omap_hwmod *
  1522. *
  1523. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1524. * register target. Returns -EINVAL if the hwmod is in the wrong
  1525. * state or passes along the return value of _wait_target_ready().
  1526. */
  1527. static int _enable(struct omap_hwmod *oh)
  1528. {
  1529. int r;
  1530. int hwsup = 0;
  1531. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1532. /*
  1533. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1534. * state at init. Now that someone is really trying to enable
  1535. * them, just ensure that the hwmod mux is set.
  1536. */
  1537. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1538. /*
  1539. * If the caller has mux data populated, do the mux'ing
  1540. * which wouldn't have been done as part of the _enable()
  1541. * done during setup.
  1542. */
  1543. if (oh->mux)
  1544. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1545. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1546. return 0;
  1547. }
  1548. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1549. oh->_state != _HWMOD_STATE_IDLE &&
  1550. oh->_state != _HWMOD_STATE_DISABLED) {
  1551. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1552. oh->name);
  1553. return -EINVAL;
  1554. }
  1555. /*
  1556. * If an IP block contains HW reset lines and any of them are
  1557. * asserted, we let integration code associated with that
  1558. * block handle the enable. We've received very little
  1559. * information on what those driver authors need, and until
  1560. * detailed information is provided and the driver code is
  1561. * posted to the public lists, this is probably the best we
  1562. * can do.
  1563. */
  1564. if (_are_any_hardreset_lines_asserted(oh))
  1565. return 0;
  1566. /* Mux pins for device runtime if populated */
  1567. if (oh->mux && (!oh->mux->enabled ||
  1568. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1569. oh->mux->pads_dynamic))) {
  1570. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1571. _reconfigure_io_chain();
  1572. }
  1573. _add_initiator_dep(oh, mpu_oh);
  1574. if (oh->clkdm) {
  1575. /*
  1576. * A clockdomain must be in SW_SUP before enabling
  1577. * completely the module. The clockdomain can be set
  1578. * in HW_AUTO only when the module become ready.
  1579. */
  1580. hwsup = clkdm_in_hwsup(oh->clkdm);
  1581. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1582. if (r) {
  1583. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1584. oh->name, oh->clkdm->name, r);
  1585. return r;
  1586. }
  1587. }
  1588. _enable_clocks(oh);
  1589. if (soc_ops.enable_module)
  1590. soc_ops.enable_module(oh);
  1591. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1592. -EINVAL;
  1593. if (!r) {
  1594. /*
  1595. * Set the clockdomain to HW_AUTO only if the target is ready,
  1596. * assuming that the previous state was HW_AUTO
  1597. */
  1598. if (oh->clkdm && hwsup)
  1599. clkdm_allow_idle(oh->clkdm);
  1600. oh->_state = _HWMOD_STATE_ENABLED;
  1601. /* Access the sysconfig only if the target is ready */
  1602. if (oh->class->sysc) {
  1603. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1604. _update_sysc_cache(oh);
  1605. _enable_sysc(oh);
  1606. }
  1607. } else {
  1608. _disable_clocks(oh);
  1609. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1610. oh->name, r);
  1611. if (oh->clkdm)
  1612. clkdm_hwmod_disable(oh->clkdm, oh);
  1613. }
  1614. return r;
  1615. }
  1616. /**
  1617. * _idle - idle an omap_hwmod
  1618. * @oh: struct omap_hwmod *
  1619. *
  1620. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1621. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1622. * state or returns 0.
  1623. */
  1624. static int _idle(struct omap_hwmod *oh)
  1625. {
  1626. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1627. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1628. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1629. oh->name);
  1630. return -EINVAL;
  1631. }
  1632. if (_are_any_hardreset_lines_asserted(oh))
  1633. return 0;
  1634. if (oh->class->sysc)
  1635. _idle_sysc(oh);
  1636. _del_initiator_dep(oh, mpu_oh);
  1637. if (soc_ops.disable_module)
  1638. soc_ops.disable_module(oh);
  1639. /*
  1640. * The module must be in idle mode before disabling any parents
  1641. * clocks. Otherwise, the parent clock might be disabled before
  1642. * the module transition is done, and thus will prevent the
  1643. * transition to complete properly.
  1644. */
  1645. _disable_clocks(oh);
  1646. if (oh->clkdm)
  1647. clkdm_hwmod_disable(oh->clkdm, oh);
  1648. /* Mux pins for device idle if populated */
  1649. if (oh->mux && oh->mux->pads_dynamic) {
  1650. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1651. _reconfigure_io_chain();
  1652. }
  1653. oh->_state = _HWMOD_STATE_IDLE;
  1654. return 0;
  1655. }
  1656. /**
  1657. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1658. * @oh: struct omap_hwmod *
  1659. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1660. *
  1661. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1662. * local copy. Intended to be used by drivers that require
  1663. * direct manipulation of the AUTOIDLE bits.
  1664. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1665. * along the return value from _set_module_autoidle().
  1666. *
  1667. * Any users of this function should be scrutinized carefully.
  1668. */
  1669. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1670. {
  1671. u32 v;
  1672. int retval = 0;
  1673. unsigned long flags;
  1674. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1675. return -EINVAL;
  1676. spin_lock_irqsave(&oh->_lock, flags);
  1677. v = oh->_sysc_cache;
  1678. retval = _set_module_autoidle(oh, autoidle, &v);
  1679. if (!retval)
  1680. _write_sysconfig(v, oh);
  1681. spin_unlock_irqrestore(&oh->_lock, flags);
  1682. return retval;
  1683. }
  1684. /**
  1685. * _shutdown - shutdown an omap_hwmod
  1686. * @oh: struct omap_hwmod *
  1687. *
  1688. * Shut down an omap_hwmod @oh. This should be called when the driver
  1689. * used for the hwmod is removed or unloaded or if the driver is not
  1690. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1691. * state or returns 0.
  1692. */
  1693. static int _shutdown(struct omap_hwmod *oh)
  1694. {
  1695. int ret, i;
  1696. u8 prev_state;
  1697. if (oh->_state != _HWMOD_STATE_IDLE &&
  1698. oh->_state != _HWMOD_STATE_ENABLED) {
  1699. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1700. oh->name);
  1701. return -EINVAL;
  1702. }
  1703. if (_are_any_hardreset_lines_asserted(oh))
  1704. return 0;
  1705. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1706. if (oh->class->pre_shutdown) {
  1707. prev_state = oh->_state;
  1708. if (oh->_state == _HWMOD_STATE_IDLE)
  1709. _enable(oh);
  1710. ret = oh->class->pre_shutdown(oh);
  1711. if (ret) {
  1712. if (prev_state == _HWMOD_STATE_IDLE)
  1713. _idle(oh);
  1714. return ret;
  1715. }
  1716. }
  1717. if (oh->class->sysc) {
  1718. if (oh->_state == _HWMOD_STATE_IDLE)
  1719. _enable(oh);
  1720. _shutdown_sysc(oh);
  1721. }
  1722. /* clocks and deps are already disabled in idle */
  1723. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1724. _del_initiator_dep(oh, mpu_oh);
  1725. /* XXX what about the other system initiators here? dma, dsp */
  1726. if (soc_ops.disable_module)
  1727. soc_ops.disable_module(oh);
  1728. _disable_clocks(oh);
  1729. if (oh->clkdm)
  1730. clkdm_hwmod_disable(oh->clkdm, oh);
  1731. }
  1732. /* XXX Should this code also force-disable the optional clocks? */
  1733. for (i = 0; i < oh->rst_lines_cnt; i++)
  1734. _assert_hardreset(oh, oh->rst_lines[i].name);
  1735. /* Mux pins to safe mode or use populated off mode values */
  1736. if (oh->mux)
  1737. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1738. oh->_state = _HWMOD_STATE_DISABLED;
  1739. return 0;
  1740. }
  1741. /**
  1742. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1743. * @oh: struct omap_hwmod * to locate the virtual address
  1744. *
  1745. * Cache the virtual address used by the MPU to access this IP block's
  1746. * registers. This address is needed early so the OCP registers that
  1747. * are part of the device's address space can be ioremapped properly.
  1748. * No return value.
  1749. */
  1750. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1751. {
  1752. struct omap_hwmod_addr_space *mem;
  1753. void __iomem *va_start;
  1754. if (!oh)
  1755. return;
  1756. _save_mpu_port_index(oh);
  1757. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1758. return;
  1759. mem = _find_mpu_rt_addr_space(oh);
  1760. if (!mem) {
  1761. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1762. oh->name);
  1763. return;
  1764. }
  1765. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1766. if (!va_start) {
  1767. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1768. return;
  1769. }
  1770. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1771. oh->name, va_start);
  1772. oh->_mpu_rt_va = va_start;
  1773. }
  1774. /**
  1775. * _init - initialize internal data for the hwmod @oh
  1776. * @oh: struct omap_hwmod *
  1777. * @n: (unused)
  1778. *
  1779. * Look up the clocks and the address space used by the MPU to access
  1780. * registers belonging to the hwmod @oh. @oh must already be
  1781. * registered at this point. This is the first of two phases for
  1782. * hwmod initialization. Code called here does not touch any hardware
  1783. * registers, it simply prepares internal data structures. Returns 0
  1784. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1785. * failure.
  1786. */
  1787. static int __init _init(struct omap_hwmod *oh, void *data)
  1788. {
  1789. int r;
  1790. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1791. return 0;
  1792. _init_mpu_rt_base(oh, NULL);
  1793. r = _init_clocks(oh, NULL);
  1794. if (IS_ERR_VALUE(r)) {
  1795. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1796. return -EINVAL;
  1797. }
  1798. oh->_state = _HWMOD_STATE_INITIALIZED;
  1799. return 0;
  1800. }
  1801. /**
  1802. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1803. * @oh: struct omap_hwmod *
  1804. *
  1805. * Set up the module's interface clocks. XXX This function is still mostly
  1806. * a stub; implementing this properly requires iclk autoidle usecounting in
  1807. * the clock code. No return value.
  1808. */
  1809. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1810. {
  1811. struct omap_hwmod_ocp_if *os;
  1812. struct list_head *p;
  1813. int i = 0;
  1814. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1815. return;
  1816. p = oh->slave_ports.next;
  1817. while (i < oh->slaves_cnt) {
  1818. os = _fetch_next_ocp_if(&p, &i);
  1819. if (!os->_clk)
  1820. continue;
  1821. if (os->flags & OCPIF_SWSUP_IDLE) {
  1822. /* XXX omap_iclk_deny_idle(c); */
  1823. } else {
  1824. /* XXX omap_iclk_allow_idle(c); */
  1825. clk_enable(os->_clk);
  1826. }
  1827. }
  1828. return;
  1829. }
  1830. /**
  1831. * _setup_reset - reset an IP block during the setup process
  1832. * @oh: struct omap_hwmod *
  1833. *
  1834. * Reset the IP block corresponding to the hwmod @oh during the setup
  1835. * process. The IP block is first enabled so it can be successfully
  1836. * reset. Returns 0 upon success or a negative error code upon
  1837. * failure.
  1838. */
  1839. static int __init _setup_reset(struct omap_hwmod *oh)
  1840. {
  1841. int r;
  1842. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1843. return -EINVAL;
  1844. if (oh->rst_lines_cnt == 0) {
  1845. r = _enable(oh);
  1846. if (r) {
  1847. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1848. oh->name, oh->_state);
  1849. return -EINVAL;
  1850. }
  1851. }
  1852. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1853. r = _reset(oh);
  1854. return r;
  1855. }
  1856. /**
  1857. * _setup_postsetup - transition to the appropriate state after _setup
  1858. * @oh: struct omap_hwmod *
  1859. *
  1860. * Place an IP block represented by @oh into a "post-setup" state --
  1861. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1862. * this function is called at the end of _setup().) The postsetup
  1863. * state for an IP block can be changed by calling
  1864. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1865. * before one of the omap_hwmod_setup*() functions are called for the
  1866. * IP block.
  1867. *
  1868. * The IP block stays in this state until a PM runtime-based driver is
  1869. * loaded for that IP block. A post-setup state of IDLE is
  1870. * appropriate for almost all IP blocks with runtime PM-enabled
  1871. * drivers, since those drivers are able to enable the IP block. A
  1872. * post-setup state of ENABLED is appropriate for kernels with PM
  1873. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1874. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1875. * included, since the WDTIMER starts running on reset and will reset
  1876. * the MPU if left active.
  1877. *
  1878. * This post-setup mechanism is deprecated. Once all of the OMAP
  1879. * drivers have been converted to use PM runtime, and all of the IP
  1880. * block data and interconnect data is available to the hwmod code, it
  1881. * should be possible to replace this mechanism with a "lazy reset"
  1882. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1883. * when the driver first probes, then all remaining IP blocks without
  1884. * drivers are either shut down or enabled after the drivers have
  1885. * loaded. However, this cannot take place until the above
  1886. * preconditions have been met, since otherwise the late reset code
  1887. * has no way of knowing which IP blocks are in use by drivers, and
  1888. * which ones are unused.
  1889. *
  1890. * No return value.
  1891. */
  1892. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1893. {
  1894. u8 postsetup_state;
  1895. if (oh->rst_lines_cnt > 0)
  1896. return;
  1897. postsetup_state = oh->_postsetup_state;
  1898. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1899. postsetup_state = _HWMOD_STATE_ENABLED;
  1900. /*
  1901. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1902. * it should be set by the core code as a runtime flag during startup
  1903. */
  1904. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1905. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1906. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1907. postsetup_state = _HWMOD_STATE_ENABLED;
  1908. }
  1909. if (postsetup_state == _HWMOD_STATE_IDLE)
  1910. _idle(oh);
  1911. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1912. _shutdown(oh);
  1913. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1914. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1915. oh->name, postsetup_state);
  1916. return;
  1917. }
  1918. /**
  1919. * _setup - prepare IP block hardware for use
  1920. * @oh: struct omap_hwmod *
  1921. * @n: (unused, pass NULL)
  1922. *
  1923. * Configure the IP block represented by @oh. This may include
  1924. * enabling the IP block, resetting it, and placing it into a
  1925. * post-setup state, depending on the type of IP block and applicable
  1926. * flags. IP blocks are reset to prevent any previous configuration
  1927. * by the bootloader or previous operating system from interfering
  1928. * with power management or other parts of the system. The reset can
  1929. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1930. * two phases for hwmod initialization. Code called here generally
  1931. * affects the IP block hardware, or system integration hardware
  1932. * associated with the IP block. Returns 0.
  1933. */
  1934. static int __init _setup(struct omap_hwmod *oh, void *data)
  1935. {
  1936. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1937. return 0;
  1938. _setup_iclk_autoidle(oh);
  1939. if (!_setup_reset(oh))
  1940. _setup_postsetup(oh);
  1941. return 0;
  1942. }
  1943. /**
  1944. * _register - register a struct omap_hwmod
  1945. * @oh: struct omap_hwmod *
  1946. *
  1947. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1948. * already has been registered by the same name; -EINVAL if the
  1949. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1950. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1951. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1952. * success.
  1953. *
  1954. * XXX The data should be copied into bootmem, so the original data
  1955. * should be marked __initdata and freed after init. This would allow
  1956. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1957. * that the copy process would be relatively complex due to the large number
  1958. * of substructures.
  1959. */
  1960. static int __init _register(struct omap_hwmod *oh)
  1961. {
  1962. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1963. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1964. return -EINVAL;
  1965. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1966. if (_lookup(oh->name))
  1967. return -EEXIST;
  1968. list_add_tail(&oh->node, &omap_hwmod_list);
  1969. INIT_LIST_HEAD(&oh->master_ports);
  1970. INIT_LIST_HEAD(&oh->slave_ports);
  1971. spin_lock_init(&oh->_lock);
  1972. oh->_state = _HWMOD_STATE_REGISTERED;
  1973. /*
  1974. * XXX Rather than doing a strcmp(), this should test a flag
  1975. * set in the hwmod data, inserted by the autogenerator code.
  1976. */
  1977. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1978. mpu_oh = oh;
  1979. return 0;
  1980. }
  1981. /**
  1982. * _alloc_links - return allocated memory for hwmod links
  1983. * @ml: pointer to a struct omap_hwmod_link * for the master link
  1984. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  1985. *
  1986. * Return pointers to two struct omap_hwmod_link records, via the
  1987. * addresses pointed to by @ml and @sl. Will first attempt to return
  1988. * memory allocated as part of a large initial block, but if that has
  1989. * been exhausted, will allocate memory itself. Since ideally this
  1990. * second allocation path will never occur, the number of these
  1991. * 'supplemental' allocations will be logged when debugging is
  1992. * enabled. Returns 0.
  1993. */
  1994. static int __init _alloc_links(struct omap_hwmod_link **ml,
  1995. struct omap_hwmod_link **sl)
  1996. {
  1997. unsigned int sz;
  1998. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  1999. *ml = &linkspace[free_ls++];
  2000. *sl = &linkspace[free_ls++];
  2001. return 0;
  2002. }
  2003. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2004. *sl = NULL;
  2005. *ml = alloc_bootmem(sz);
  2006. memset(*ml, 0, sz);
  2007. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2008. ls_supp++;
  2009. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2010. ls_supp * LINKS_PER_OCP_IF);
  2011. return 0;
  2012. };
  2013. /**
  2014. * _add_link - add an interconnect between two IP blocks
  2015. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2016. *
  2017. * Add struct omap_hwmod_link records connecting the master IP block
  2018. * specified in @oi->master to @oi, and connecting the slave IP block
  2019. * specified in @oi->slave to @oi. This code is assumed to run before
  2020. * preemption or SMP has been enabled, thus avoiding the need for
  2021. * locking in this code. Changes to this assumption will require
  2022. * additional locking. Returns 0.
  2023. */
  2024. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2025. {
  2026. struct omap_hwmod_link *ml, *sl;
  2027. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2028. oi->slave->name);
  2029. _alloc_links(&ml, &sl);
  2030. ml->ocp_if = oi;
  2031. INIT_LIST_HEAD(&ml->node);
  2032. list_add(&ml->node, &oi->master->master_ports);
  2033. oi->master->masters_cnt++;
  2034. sl->ocp_if = oi;
  2035. INIT_LIST_HEAD(&sl->node);
  2036. list_add(&sl->node, &oi->slave->slave_ports);
  2037. oi->slave->slaves_cnt++;
  2038. return 0;
  2039. }
  2040. /**
  2041. * _register_link - register a struct omap_hwmod_ocp_if
  2042. * @oi: struct omap_hwmod_ocp_if *
  2043. *
  2044. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2045. * has already been registered; -EINVAL if @oi is NULL or if the
  2046. * record pointed to by @oi is missing required fields; or 0 upon
  2047. * success.
  2048. *
  2049. * XXX The data should be copied into bootmem, so the original data
  2050. * should be marked __initdata and freed after init. This would allow
  2051. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2052. */
  2053. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2054. {
  2055. if (!oi || !oi->master || !oi->slave || !oi->user)
  2056. return -EINVAL;
  2057. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2058. return -EEXIST;
  2059. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2060. oi->master->name, oi->slave->name);
  2061. /*
  2062. * Register the connected hwmods, if they haven't been
  2063. * registered already
  2064. */
  2065. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2066. _register(oi->master);
  2067. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2068. _register(oi->slave);
  2069. _add_link(oi);
  2070. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2071. return 0;
  2072. }
  2073. /**
  2074. * _alloc_linkspace - allocate large block of hwmod links
  2075. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2076. *
  2077. * Allocate a large block of struct omap_hwmod_link records. This
  2078. * improves boot time significantly by avoiding the need to allocate
  2079. * individual records one by one. If the number of records to
  2080. * allocate in the block hasn't been manually specified, this function
  2081. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2082. * and use that to determine the allocation size. For SoC families
  2083. * that require multiple list registrations, such as OMAP3xxx, this
  2084. * estimation process isn't optimal, so manual estimation is advised
  2085. * in those cases. Returns -EEXIST if the allocation has already occurred
  2086. * or 0 upon success.
  2087. */
  2088. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2089. {
  2090. unsigned int i = 0;
  2091. unsigned int sz;
  2092. if (linkspace) {
  2093. WARN(1, "linkspace already allocated\n");
  2094. return -EEXIST;
  2095. }
  2096. if (max_ls == 0)
  2097. while (ois[i++])
  2098. max_ls += LINKS_PER_OCP_IF;
  2099. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2100. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2101. __func__, sz, max_ls);
  2102. linkspace = alloc_bootmem(sz);
  2103. memset(linkspace, 0, sz);
  2104. return 0;
  2105. }
  2106. /* Static functions intended only for use in soc_ops field function pointers */
  2107. /**
  2108. * _omap2_wait_target_ready - wait for a module to leave slave idle
  2109. * @oh: struct omap_hwmod *
  2110. *
  2111. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2112. * does not have an IDLEST bit or if the module successfully leaves
  2113. * slave idle; otherwise, pass along the return value of the
  2114. * appropriate *_cm*_wait_module_ready() function.
  2115. */
  2116. static int _omap2_wait_target_ready(struct omap_hwmod *oh)
  2117. {
  2118. if (!oh)
  2119. return -EINVAL;
  2120. if (oh->flags & HWMOD_NO_IDLEST)
  2121. return 0;
  2122. if (!_find_mpu_rt_port(oh))
  2123. return 0;
  2124. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2125. return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2126. oh->prcm.omap2.idlest_reg_id,
  2127. oh->prcm.omap2.idlest_idle_bit);
  2128. }
  2129. /**
  2130. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2131. * @oh: struct omap_hwmod *
  2132. *
  2133. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2134. * does not have an IDLEST bit or if the module successfully leaves
  2135. * slave idle; otherwise, pass along the return value of the
  2136. * appropriate *_cm*_wait_module_ready() function.
  2137. */
  2138. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2139. {
  2140. if (!oh || !oh->clkdm)
  2141. return -EINVAL;
  2142. if (oh->flags & HWMOD_NO_IDLEST)
  2143. return 0;
  2144. if (!_find_mpu_rt_port(oh))
  2145. return 0;
  2146. /* XXX check module SIDLEMODE, hardreset status */
  2147. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2148. oh->clkdm->cm_inst,
  2149. oh->clkdm->clkdm_offs,
  2150. oh->prcm.omap4.clkctrl_offs);
  2151. }
  2152. /**
  2153. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2154. * @oh: struct omap_hwmod * to assert hardreset
  2155. * @ohri: hardreset line data
  2156. *
  2157. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2158. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2159. * use as an soc_ops function pointer. Passes along the return value
  2160. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2161. * for removal when the PRM code is moved into drivers/.
  2162. */
  2163. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2164. struct omap_hwmod_rst_info *ohri)
  2165. {
  2166. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2167. ohri->rst_shift);
  2168. }
  2169. /**
  2170. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2171. * @oh: struct omap_hwmod * to deassert hardreset
  2172. * @ohri: hardreset line data
  2173. *
  2174. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2175. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2176. * use as an soc_ops function pointer. Passes along the return value
  2177. * from omap2_prm_deassert_hardreset(). XXX This function is
  2178. * scheduled for removal when the PRM code is moved into drivers/.
  2179. */
  2180. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2181. struct omap_hwmod_rst_info *ohri)
  2182. {
  2183. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2184. ohri->rst_shift,
  2185. ohri->st_shift);
  2186. }
  2187. /**
  2188. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2189. * @oh: struct omap_hwmod * to test hardreset
  2190. * @ohri: hardreset line data
  2191. *
  2192. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2193. * from the hwmod @oh and the hardreset line data @ohri. Only
  2194. * intended for use as an soc_ops function pointer. Passes along the
  2195. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2196. * function is scheduled for removal when the PRM code is moved into
  2197. * drivers/.
  2198. */
  2199. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2200. struct omap_hwmod_rst_info *ohri)
  2201. {
  2202. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2203. ohri->st_shift);
  2204. }
  2205. /**
  2206. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2207. * @oh: struct omap_hwmod * to assert hardreset
  2208. * @ohri: hardreset line data
  2209. *
  2210. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2211. * from the hwmod @oh and the hardreset line data @ohri. Only
  2212. * intended for use as an soc_ops function pointer. Passes along the
  2213. * return value from omap4_prminst_assert_hardreset(). XXX This
  2214. * function is scheduled for removal when the PRM code is moved into
  2215. * drivers/.
  2216. */
  2217. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2218. struct omap_hwmod_rst_info *ohri)
  2219. {
  2220. if (!oh->clkdm)
  2221. return -EINVAL;
  2222. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2223. oh->clkdm->pwrdm.ptr->prcm_partition,
  2224. oh->clkdm->pwrdm.ptr->prcm_offs,
  2225. oh->prcm.omap4.rstctrl_offs);
  2226. }
  2227. /**
  2228. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2229. * @oh: struct omap_hwmod * to deassert hardreset
  2230. * @ohri: hardreset line data
  2231. *
  2232. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2233. * from the hwmod @oh and the hardreset line data @ohri. Only
  2234. * intended for use as an soc_ops function pointer. Passes along the
  2235. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2236. * function is scheduled for removal when the PRM code is moved into
  2237. * drivers/.
  2238. */
  2239. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2240. struct omap_hwmod_rst_info *ohri)
  2241. {
  2242. if (!oh->clkdm)
  2243. return -EINVAL;
  2244. if (ohri->st_shift)
  2245. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2246. oh->name, ohri->name);
  2247. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2248. oh->clkdm->pwrdm.ptr->prcm_partition,
  2249. oh->clkdm->pwrdm.ptr->prcm_offs,
  2250. oh->prcm.omap4.rstctrl_offs);
  2251. }
  2252. /**
  2253. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2254. * @oh: struct omap_hwmod * to test hardreset
  2255. * @ohri: hardreset line data
  2256. *
  2257. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2258. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2259. * Only intended for use as an soc_ops function pointer. Passes along
  2260. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2261. * This function is scheduled for removal when the PRM code is moved
  2262. * into drivers/.
  2263. */
  2264. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2265. struct omap_hwmod_rst_info *ohri)
  2266. {
  2267. if (!oh->clkdm)
  2268. return -EINVAL;
  2269. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2270. oh->clkdm->pwrdm.ptr->prcm_partition,
  2271. oh->clkdm->pwrdm.ptr->prcm_offs,
  2272. oh->prcm.omap4.rstctrl_offs);
  2273. }
  2274. /* Public functions */
  2275. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2276. {
  2277. if (oh->flags & HWMOD_16BIT_REG)
  2278. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2279. else
  2280. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2281. }
  2282. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2283. {
  2284. if (oh->flags & HWMOD_16BIT_REG)
  2285. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2286. else
  2287. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2288. }
  2289. /**
  2290. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2291. * @oh: struct omap_hwmod *
  2292. *
  2293. * This is a public function exposed to drivers. Some drivers may need to do
  2294. * some settings before and after resetting the device. Those drivers after
  2295. * doing the necessary settings could use this function to start a reset by
  2296. * setting the SYSCONFIG.SOFTRESET bit.
  2297. */
  2298. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2299. {
  2300. u32 v;
  2301. int ret;
  2302. if (!oh || !(oh->_sysc_cache))
  2303. return -EINVAL;
  2304. v = oh->_sysc_cache;
  2305. ret = _set_softreset(oh, &v);
  2306. if (ret)
  2307. goto error;
  2308. _write_sysconfig(v, oh);
  2309. error:
  2310. return ret;
  2311. }
  2312. /**
  2313. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2314. * @oh: struct omap_hwmod *
  2315. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2316. *
  2317. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2318. * local copy. Intended to be used by drivers that have some erratum
  2319. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2320. * -EINVAL if @oh is null, or passes along the return value from
  2321. * _set_slave_idlemode().
  2322. *
  2323. * XXX Does this function have any current users? If not, we should
  2324. * remove it; it is better to let the rest of the hwmod code handle this.
  2325. * Any users of this function should be scrutinized carefully.
  2326. */
  2327. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2328. {
  2329. u32 v;
  2330. int retval = 0;
  2331. if (!oh)
  2332. return -EINVAL;
  2333. v = oh->_sysc_cache;
  2334. retval = _set_slave_idlemode(oh, idlemode, &v);
  2335. if (!retval)
  2336. _write_sysconfig(v, oh);
  2337. return retval;
  2338. }
  2339. /**
  2340. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2341. * @name: name of the omap_hwmod to look up
  2342. *
  2343. * Given a @name of an omap_hwmod, return a pointer to the registered
  2344. * struct omap_hwmod *, or NULL upon error.
  2345. */
  2346. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2347. {
  2348. struct omap_hwmod *oh;
  2349. if (!name)
  2350. return NULL;
  2351. oh = _lookup(name);
  2352. return oh;
  2353. }
  2354. /**
  2355. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2356. * @fn: pointer to a callback function
  2357. * @data: void * data to pass to callback function
  2358. *
  2359. * Call @fn for each registered omap_hwmod, passing @data to each
  2360. * function. @fn must return 0 for success or any other value for
  2361. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2362. * will stop and the non-zero return value will be passed to the
  2363. * caller of omap_hwmod_for_each(). @fn is called with
  2364. * omap_hwmod_for_each() held.
  2365. */
  2366. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2367. void *data)
  2368. {
  2369. struct omap_hwmod *temp_oh;
  2370. int ret = 0;
  2371. if (!fn)
  2372. return -EINVAL;
  2373. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2374. ret = (*fn)(temp_oh, data);
  2375. if (ret)
  2376. break;
  2377. }
  2378. return ret;
  2379. }
  2380. /**
  2381. * omap_hwmod_register_links - register an array of hwmod links
  2382. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2383. *
  2384. * Intended to be called early in boot before the clock framework is
  2385. * initialized. If @ois is not null, will register all omap_hwmods
  2386. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2387. * omap_hwmod_init() hasn't been called before calling this function,
  2388. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2389. * success.
  2390. */
  2391. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2392. {
  2393. int r, i;
  2394. if (!inited)
  2395. return -EINVAL;
  2396. if (!ois)
  2397. return 0;
  2398. if (!linkspace) {
  2399. if (_alloc_linkspace(ois)) {
  2400. pr_err("omap_hwmod: could not allocate link space\n");
  2401. return -ENOMEM;
  2402. }
  2403. }
  2404. i = 0;
  2405. do {
  2406. r = _register_link(ois[i]);
  2407. WARN(r && r != -EEXIST,
  2408. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2409. ois[i]->master->name, ois[i]->slave->name, r);
  2410. } while (ois[++i]);
  2411. return 0;
  2412. }
  2413. /**
  2414. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2415. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2416. *
  2417. * If the hwmod data corresponding to the MPU subsystem IP block
  2418. * hasn't been initialized and set up yet, do so now. This must be
  2419. * done first since sleep dependencies may be added from other hwmods
  2420. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2421. * return value.
  2422. */
  2423. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2424. {
  2425. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2426. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2427. __func__, MPU_INITIATOR_NAME);
  2428. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2429. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2430. }
  2431. /**
  2432. * omap_hwmod_setup_one - set up a single hwmod
  2433. * @oh_name: const char * name of the already-registered hwmod to set up
  2434. *
  2435. * Initialize and set up a single hwmod. Intended to be used for a
  2436. * small number of early devices, such as the timer IP blocks used for
  2437. * the scheduler clock. Must be called after omap2_clk_init().
  2438. * Resolves the struct clk names to struct clk pointers for each
  2439. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2440. * -EINVAL upon error or 0 upon success.
  2441. */
  2442. int __init omap_hwmod_setup_one(const char *oh_name)
  2443. {
  2444. struct omap_hwmod *oh;
  2445. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2446. oh = _lookup(oh_name);
  2447. if (!oh) {
  2448. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2449. return -EINVAL;
  2450. }
  2451. _ensure_mpu_hwmod_is_setup(oh);
  2452. _init(oh, NULL);
  2453. _setup(oh, NULL);
  2454. return 0;
  2455. }
  2456. /**
  2457. * omap_hwmod_setup_all - set up all registered IP blocks
  2458. *
  2459. * Initialize and set up all IP blocks registered with the hwmod code.
  2460. * Must be called after omap2_clk_init(). Resolves the struct clk
  2461. * names to struct clk pointers for each registered omap_hwmod. Also
  2462. * calls _setup() on each hwmod. Returns 0 upon success.
  2463. */
  2464. static int __init omap_hwmod_setup_all(void)
  2465. {
  2466. _ensure_mpu_hwmod_is_setup(NULL);
  2467. omap_hwmod_for_each(_init, NULL);
  2468. omap_hwmod_for_each(_setup, NULL);
  2469. return 0;
  2470. }
  2471. core_initcall(omap_hwmod_setup_all);
  2472. /**
  2473. * omap_hwmod_enable - enable an omap_hwmod
  2474. * @oh: struct omap_hwmod *
  2475. *
  2476. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2477. * Returns -EINVAL on error or passes along the return value from _enable().
  2478. */
  2479. int omap_hwmod_enable(struct omap_hwmod *oh)
  2480. {
  2481. int r;
  2482. unsigned long flags;
  2483. if (!oh)
  2484. return -EINVAL;
  2485. spin_lock_irqsave(&oh->_lock, flags);
  2486. r = _enable(oh);
  2487. spin_unlock_irqrestore(&oh->_lock, flags);
  2488. return r;
  2489. }
  2490. /**
  2491. * omap_hwmod_idle - idle an omap_hwmod
  2492. * @oh: struct omap_hwmod *
  2493. *
  2494. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2495. * Returns -EINVAL on error or passes along the return value from _idle().
  2496. */
  2497. int omap_hwmod_idle(struct omap_hwmod *oh)
  2498. {
  2499. unsigned long flags;
  2500. if (!oh)
  2501. return -EINVAL;
  2502. spin_lock_irqsave(&oh->_lock, flags);
  2503. _idle(oh);
  2504. spin_unlock_irqrestore(&oh->_lock, flags);
  2505. return 0;
  2506. }
  2507. /**
  2508. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2509. * @oh: struct omap_hwmod *
  2510. *
  2511. * Shutdown an omap_hwmod @oh. Intended to be called by
  2512. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2513. * the return value from _shutdown().
  2514. */
  2515. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2516. {
  2517. unsigned long flags;
  2518. if (!oh)
  2519. return -EINVAL;
  2520. spin_lock_irqsave(&oh->_lock, flags);
  2521. _shutdown(oh);
  2522. spin_unlock_irqrestore(&oh->_lock, flags);
  2523. return 0;
  2524. }
  2525. /**
  2526. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2527. * @oh: struct omap_hwmod *oh
  2528. *
  2529. * Intended to be called by the omap_device code.
  2530. */
  2531. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2532. {
  2533. unsigned long flags;
  2534. spin_lock_irqsave(&oh->_lock, flags);
  2535. _enable_clocks(oh);
  2536. spin_unlock_irqrestore(&oh->_lock, flags);
  2537. return 0;
  2538. }
  2539. /**
  2540. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2541. * @oh: struct omap_hwmod *oh
  2542. *
  2543. * Intended to be called by the omap_device code.
  2544. */
  2545. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2546. {
  2547. unsigned long flags;
  2548. spin_lock_irqsave(&oh->_lock, flags);
  2549. _disable_clocks(oh);
  2550. spin_unlock_irqrestore(&oh->_lock, flags);
  2551. return 0;
  2552. }
  2553. /**
  2554. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2555. * @oh: struct omap_hwmod *oh
  2556. *
  2557. * Intended to be called by drivers and core code when all posted
  2558. * writes to a device must complete before continuing further
  2559. * execution (for example, after clearing some device IRQSTATUS
  2560. * register bits)
  2561. *
  2562. * XXX what about targets with multiple OCP threads?
  2563. */
  2564. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2565. {
  2566. BUG_ON(!oh);
  2567. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2568. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2569. oh->name);
  2570. return;
  2571. }
  2572. /*
  2573. * Forces posted writes to complete on the OCP thread handling
  2574. * register writes
  2575. */
  2576. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2577. }
  2578. /**
  2579. * omap_hwmod_reset - reset the hwmod
  2580. * @oh: struct omap_hwmod *
  2581. *
  2582. * Under some conditions, a driver may wish to reset the entire device.
  2583. * Called from omap_device code. Returns -EINVAL on error or passes along
  2584. * the return value from _reset().
  2585. */
  2586. int omap_hwmod_reset(struct omap_hwmod *oh)
  2587. {
  2588. int r;
  2589. unsigned long flags;
  2590. if (!oh)
  2591. return -EINVAL;
  2592. spin_lock_irqsave(&oh->_lock, flags);
  2593. r = _reset(oh);
  2594. spin_unlock_irqrestore(&oh->_lock, flags);
  2595. return r;
  2596. }
  2597. /*
  2598. * IP block data retrieval functions
  2599. */
  2600. /**
  2601. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2602. * @oh: struct omap_hwmod *
  2603. * @res: pointer to the first element of an array of struct resource to fill
  2604. *
  2605. * Count the number of struct resource array elements necessary to
  2606. * contain omap_hwmod @oh resources. Intended to be called by code
  2607. * that registers omap_devices. Intended to be used to determine the
  2608. * size of a dynamically-allocated struct resource array, before
  2609. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2610. * resource array elements needed.
  2611. *
  2612. * XXX This code is not optimized. It could attempt to merge adjacent
  2613. * resource IDs.
  2614. *
  2615. */
  2616. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2617. {
  2618. struct omap_hwmod_ocp_if *os;
  2619. struct list_head *p;
  2620. int ret;
  2621. int i = 0;
  2622. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2623. p = oh->slave_ports.next;
  2624. while (i < oh->slaves_cnt) {
  2625. os = _fetch_next_ocp_if(&p, &i);
  2626. ret += _count_ocp_if_addr_spaces(os);
  2627. }
  2628. return ret;
  2629. }
  2630. /**
  2631. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2632. * @oh: struct omap_hwmod *
  2633. * @res: pointer to the first element of an array of struct resource to fill
  2634. *
  2635. * Fill the struct resource array @res with resource data from the
  2636. * omap_hwmod @oh. Intended to be called by code that registers
  2637. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2638. * number of array elements filled.
  2639. */
  2640. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2641. {
  2642. struct omap_hwmod_ocp_if *os;
  2643. struct list_head *p;
  2644. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2645. int r = 0;
  2646. /* For each IRQ, DMA, memory area, fill in array.*/
  2647. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2648. for (i = 0; i < mpu_irqs_cnt; i++) {
  2649. (res + r)->name = (oh->mpu_irqs + i)->name;
  2650. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2651. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2652. (res + r)->flags = IORESOURCE_IRQ;
  2653. r++;
  2654. }
  2655. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2656. for (i = 0; i < sdma_reqs_cnt; i++) {
  2657. (res + r)->name = (oh->sdma_reqs + i)->name;
  2658. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2659. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2660. (res + r)->flags = IORESOURCE_DMA;
  2661. r++;
  2662. }
  2663. p = oh->slave_ports.next;
  2664. i = 0;
  2665. while (i < oh->slaves_cnt) {
  2666. os = _fetch_next_ocp_if(&p, &i);
  2667. addr_cnt = _count_ocp_if_addr_spaces(os);
  2668. for (j = 0; j < addr_cnt; j++) {
  2669. (res + r)->name = (os->addr + j)->name;
  2670. (res + r)->start = (os->addr + j)->pa_start;
  2671. (res + r)->end = (os->addr + j)->pa_end;
  2672. (res + r)->flags = IORESOURCE_MEM;
  2673. r++;
  2674. }
  2675. }
  2676. return r;
  2677. }
  2678. /**
  2679. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2680. * @oh: struct omap_hwmod * to operate on
  2681. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2682. * @name: pointer to the name of the data to fetch (optional)
  2683. * @rsrc: pointer to a struct resource, allocated by the caller
  2684. *
  2685. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2686. * data for the IP block pointed to by @oh. The data will be filled
  2687. * into a struct resource record pointed to by @rsrc. The struct
  2688. * resource must be allocated by the caller. When @name is non-null,
  2689. * the data associated with the matching entry in the IRQ/SDMA/address
  2690. * space hwmod data arrays will be returned. If @name is null, the
  2691. * first array entry will be returned. Data order is not meaningful
  2692. * in hwmod data, so callers are strongly encouraged to use a non-null
  2693. * @name whenever possible to avoid unpredictable effects if hwmod
  2694. * data is later added that causes data ordering to change. This
  2695. * function is only intended for use by OMAP core code. Device
  2696. * drivers should not call this function - the appropriate bus-related
  2697. * data accessor functions should be used instead. Returns 0 upon
  2698. * success or a negative error code upon error.
  2699. */
  2700. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2701. const char *name, struct resource *rsrc)
  2702. {
  2703. int r;
  2704. unsigned int irq, dma;
  2705. u32 pa_start, pa_end;
  2706. if (!oh || !rsrc)
  2707. return -EINVAL;
  2708. if (type == IORESOURCE_IRQ) {
  2709. r = _get_mpu_irq_by_name(oh, name, &irq);
  2710. if (r)
  2711. return r;
  2712. rsrc->start = irq;
  2713. rsrc->end = irq;
  2714. } else if (type == IORESOURCE_DMA) {
  2715. r = _get_sdma_req_by_name(oh, name, &dma);
  2716. if (r)
  2717. return r;
  2718. rsrc->start = dma;
  2719. rsrc->end = dma;
  2720. } else if (type == IORESOURCE_MEM) {
  2721. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2722. if (r)
  2723. return r;
  2724. rsrc->start = pa_start;
  2725. rsrc->end = pa_end;
  2726. } else {
  2727. return -EINVAL;
  2728. }
  2729. rsrc->flags = type;
  2730. rsrc->name = name;
  2731. return 0;
  2732. }
  2733. /**
  2734. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2735. * @oh: struct omap_hwmod *
  2736. *
  2737. * Return the powerdomain pointer associated with the OMAP module
  2738. * @oh's main clock. If @oh does not have a main clk, return the
  2739. * powerdomain associated with the interface clock associated with the
  2740. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2741. * instead?) Returns NULL on error, or a struct powerdomain * on
  2742. * success.
  2743. */
  2744. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2745. {
  2746. struct clk *c;
  2747. struct omap_hwmod_ocp_if *oi;
  2748. if (!oh)
  2749. return NULL;
  2750. if (oh->_clk) {
  2751. c = oh->_clk;
  2752. } else {
  2753. oi = _find_mpu_rt_port(oh);
  2754. if (!oi)
  2755. return NULL;
  2756. c = oi->_clk;
  2757. }
  2758. if (!c->clkdm)
  2759. return NULL;
  2760. return c->clkdm->pwrdm.ptr;
  2761. }
  2762. /**
  2763. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2764. * @oh: struct omap_hwmod *
  2765. *
  2766. * Returns the virtual address corresponding to the beginning of the
  2767. * module's register target, in the address range that is intended to
  2768. * be used by the MPU. Returns the virtual address upon success or NULL
  2769. * upon error.
  2770. */
  2771. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2772. {
  2773. if (!oh)
  2774. return NULL;
  2775. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2776. return NULL;
  2777. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2778. return NULL;
  2779. return oh->_mpu_rt_va;
  2780. }
  2781. /**
  2782. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2783. * @oh: struct omap_hwmod *
  2784. * @init_oh: struct omap_hwmod * (initiator)
  2785. *
  2786. * Add a sleep dependency between the initiator @init_oh and @oh.
  2787. * Intended to be called by DSP/Bridge code via platform_data for the
  2788. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2789. * code needs to add/del initiator dependencies dynamically
  2790. * before/after accessing a device. Returns the return value from
  2791. * _add_initiator_dep().
  2792. *
  2793. * XXX Keep a usecount in the clockdomain code
  2794. */
  2795. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2796. struct omap_hwmod *init_oh)
  2797. {
  2798. return _add_initiator_dep(oh, init_oh);
  2799. }
  2800. /*
  2801. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2802. * for context save/restore operations?
  2803. */
  2804. /**
  2805. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2806. * @oh: struct omap_hwmod *
  2807. * @init_oh: struct omap_hwmod * (initiator)
  2808. *
  2809. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2810. * Intended to be called by DSP/Bridge code via platform_data for the
  2811. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2812. * code needs to add/del initiator dependencies dynamically
  2813. * before/after accessing a device. Returns the return value from
  2814. * _del_initiator_dep().
  2815. *
  2816. * XXX Keep a usecount in the clockdomain code
  2817. */
  2818. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2819. struct omap_hwmod *init_oh)
  2820. {
  2821. return _del_initiator_dep(oh, init_oh);
  2822. }
  2823. /**
  2824. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2825. * @oh: struct omap_hwmod *
  2826. *
  2827. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2828. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2829. * this IP block if it has dynamic mux entries. Eventually this
  2830. * should set PRCM wakeup registers to cause the PRCM to receive
  2831. * wakeup events from the module. Does not set any wakeup routing
  2832. * registers beyond this point - if the module is to wake up any other
  2833. * module or subsystem, that must be set separately. Called by
  2834. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2835. */
  2836. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2837. {
  2838. unsigned long flags;
  2839. u32 v;
  2840. spin_lock_irqsave(&oh->_lock, flags);
  2841. if (oh->class->sysc &&
  2842. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2843. v = oh->_sysc_cache;
  2844. _enable_wakeup(oh, &v);
  2845. _write_sysconfig(v, oh);
  2846. }
  2847. _set_idle_ioring_wakeup(oh, true);
  2848. spin_unlock_irqrestore(&oh->_lock, flags);
  2849. return 0;
  2850. }
  2851. /**
  2852. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2853. * @oh: struct omap_hwmod *
  2854. *
  2855. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2856. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2857. * events for this IP block if it has dynamic mux entries. Eventually
  2858. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2859. * wakeup events from the module. Does not set any wakeup routing
  2860. * registers beyond this point - if the module is to wake up any other
  2861. * module or subsystem, that must be set separately. Called by
  2862. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2863. */
  2864. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2865. {
  2866. unsigned long flags;
  2867. u32 v;
  2868. spin_lock_irqsave(&oh->_lock, flags);
  2869. if (oh->class->sysc &&
  2870. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2871. v = oh->_sysc_cache;
  2872. _disable_wakeup(oh, &v);
  2873. _write_sysconfig(v, oh);
  2874. }
  2875. _set_idle_ioring_wakeup(oh, false);
  2876. spin_unlock_irqrestore(&oh->_lock, flags);
  2877. return 0;
  2878. }
  2879. /**
  2880. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2881. * contained in the hwmod module.
  2882. * @oh: struct omap_hwmod *
  2883. * @name: name of the reset line to lookup and assert
  2884. *
  2885. * Some IP like dsp, ipu or iva contain processor that require
  2886. * an HW reset line to be assert / deassert in order to enable fully
  2887. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2888. * yet supported on this OMAP; otherwise, passes along the return value
  2889. * from _assert_hardreset().
  2890. */
  2891. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2892. {
  2893. int ret;
  2894. unsigned long flags;
  2895. if (!oh)
  2896. return -EINVAL;
  2897. spin_lock_irqsave(&oh->_lock, flags);
  2898. ret = _assert_hardreset(oh, name);
  2899. spin_unlock_irqrestore(&oh->_lock, flags);
  2900. return ret;
  2901. }
  2902. /**
  2903. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2904. * contained in the hwmod module.
  2905. * @oh: struct omap_hwmod *
  2906. * @name: name of the reset line to look up and deassert
  2907. *
  2908. * Some IP like dsp, ipu or iva contain processor that require
  2909. * an HW reset line to be assert / deassert in order to enable fully
  2910. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2911. * yet supported on this OMAP; otherwise, passes along the return value
  2912. * from _deassert_hardreset().
  2913. */
  2914. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2915. {
  2916. int ret;
  2917. unsigned long flags;
  2918. if (!oh)
  2919. return -EINVAL;
  2920. spin_lock_irqsave(&oh->_lock, flags);
  2921. ret = _deassert_hardreset(oh, name);
  2922. spin_unlock_irqrestore(&oh->_lock, flags);
  2923. return ret;
  2924. }
  2925. /**
  2926. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2927. * contained in the hwmod module
  2928. * @oh: struct omap_hwmod *
  2929. * @name: name of the reset line to look up and read
  2930. *
  2931. * Return the current state of the hwmod @oh's reset line named @name:
  2932. * returns -EINVAL upon parameter error or if this operation
  2933. * is unsupported on the current OMAP; otherwise, passes along the return
  2934. * value from _read_hardreset().
  2935. */
  2936. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2937. {
  2938. int ret;
  2939. unsigned long flags;
  2940. if (!oh)
  2941. return -EINVAL;
  2942. spin_lock_irqsave(&oh->_lock, flags);
  2943. ret = _read_hardreset(oh, name);
  2944. spin_unlock_irqrestore(&oh->_lock, flags);
  2945. return ret;
  2946. }
  2947. /**
  2948. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2949. * @classname: struct omap_hwmod_class name to search for
  2950. * @fn: callback function pointer to call for each hwmod in class @classname
  2951. * @user: arbitrary context data to pass to the callback function
  2952. *
  2953. * For each omap_hwmod of class @classname, call @fn.
  2954. * If the callback function returns something other than
  2955. * zero, the iterator is terminated, and the callback function's return
  2956. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2957. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2958. */
  2959. int omap_hwmod_for_each_by_class(const char *classname,
  2960. int (*fn)(struct omap_hwmod *oh,
  2961. void *user),
  2962. void *user)
  2963. {
  2964. struct omap_hwmod *temp_oh;
  2965. int ret = 0;
  2966. if (!classname || !fn)
  2967. return -EINVAL;
  2968. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2969. __func__, classname);
  2970. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2971. if (!strcmp(temp_oh->class->name, classname)) {
  2972. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2973. __func__, temp_oh->name);
  2974. ret = (*fn)(temp_oh, user);
  2975. if (ret)
  2976. break;
  2977. }
  2978. }
  2979. if (ret)
  2980. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2981. __func__, ret);
  2982. return ret;
  2983. }
  2984. /**
  2985. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2986. * @oh: struct omap_hwmod *
  2987. * @state: state that _setup() should leave the hwmod in
  2988. *
  2989. * Sets the hwmod state that @oh will enter at the end of _setup()
  2990. * (called by omap_hwmod_setup_*()). See also the documentation
  2991. * for _setup_postsetup(), above. Returns 0 upon success or
  2992. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2993. * in the wrong state.
  2994. */
  2995. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2996. {
  2997. int ret;
  2998. unsigned long flags;
  2999. if (!oh)
  3000. return -EINVAL;
  3001. if (state != _HWMOD_STATE_DISABLED &&
  3002. state != _HWMOD_STATE_ENABLED &&
  3003. state != _HWMOD_STATE_IDLE)
  3004. return -EINVAL;
  3005. spin_lock_irqsave(&oh->_lock, flags);
  3006. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3007. ret = -EINVAL;
  3008. goto ohsps_unlock;
  3009. }
  3010. oh->_postsetup_state = state;
  3011. ret = 0;
  3012. ohsps_unlock:
  3013. spin_unlock_irqrestore(&oh->_lock, flags);
  3014. return ret;
  3015. }
  3016. /**
  3017. * omap_hwmod_get_context_loss_count - get lost context count
  3018. * @oh: struct omap_hwmod *
  3019. *
  3020. * Query the powerdomain of of @oh to get the context loss
  3021. * count for this device.
  3022. *
  3023. * Returns the context loss count of the powerdomain assocated with @oh
  3024. * upon success, or zero if no powerdomain exists for @oh.
  3025. */
  3026. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3027. {
  3028. struct powerdomain *pwrdm;
  3029. int ret = 0;
  3030. pwrdm = omap_hwmod_get_pwrdm(oh);
  3031. if (pwrdm)
  3032. ret = pwrdm_get_context_loss_count(pwrdm);
  3033. return ret;
  3034. }
  3035. /**
  3036. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3037. * @oh: struct omap_hwmod *
  3038. *
  3039. * Prevent the hwmod @oh from being reset during the setup process.
  3040. * Intended for use by board-*.c files on boards with devices that
  3041. * cannot tolerate being reset. Must be called before the hwmod has
  3042. * been set up. Returns 0 upon success or negative error code upon
  3043. * failure.
  3044. */
  3045. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3046. {
  3047. if (!oh)
  3048. return -EINVAL;
  3049. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3050. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3051. oh->name);
  3052. return -EINVAL;
  3053. }
  3054. oh->flags |= HWMOD_INIT_NO_RESET;
  3055. return 0;
  3056. }
  3057. /**
  3058. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3059. * @oh: struct omap_hwmod * containing hwmod mux entries
  3060. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3061. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3062. *
  3063. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3064. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3065. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3066. * this function is not called for a given pad_idx, then the ISR
  3067. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3068. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3069. * the _dynamic or wakeup_ entry: if there are other entries not
  3070. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3071. * entries are NOT COUNTED in the dynamic pad index. This function
  3072. * must be called separately for each pad that requires its interrupt
  3073. * to be re-routed this way. Returns -EINVAL if there is an argument
  3074. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3075. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3076. *
  3077. * XXX This function interface is fragile. Rather than using array
  3078. * indexes, which are subject to unpredictable change, it should be
  3079. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3080. * pad records.
  3081. */
  3082. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3083. {
  3084. int nr_irqs;
  3085. might_sleep();
  3086. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3087. pad_idx >= oh->mux->nr_pads_dynamic)
  3088. return -EINVAL;
  3089. /* Check the number of available mpu_irqs */
  3090. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3091. ;
  3092. if (irq_idx >= nr_irqs)
  3093. return -EINVAL;
  3094. if (!oh->mux->irqs) {
  3095. /* XXX What frees this? */
  3096. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3097. GFP_KERNEL);
  3098. if (!oh->mux->irqs)
  3099. return -ENOMEM;
  3100. }
  3101. oh->mux->irqs[pad_idx] = irq_idx;
  3102. return 0;
  3103. }
  3104. /**
  3105. * omap_hwmod_init - initialize the hwmod code
  3106. *
  3107. * Sets up some function pointers needed by the hwmod code to operate on the
  3108. * currently-booted SoC. Intended to be called once during kernel init
  3109. * before any hwmods are registered. No return value.
  3110. */
  3111. void __init omap_hwmod_init(void)
  3112. {
  3113. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  3114. soc_ops.wait_target_ready = _omap2_wait_target_ready;
  3115. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3116. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3117. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3118. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3119. soc_ops.enable_module = _omap4_enable_module;
  3120. soc_ops.disable_module = _omap4_disable_module;
  3121. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3122. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3123. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3124. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3125. soc_ops.init_clkdm = _init_clkdm;
  3126. } else {
  3127. WARN(1, "omap_hwmod: unknown SoC type\n");
  3128. }
  3129. inited = true;
  3130. }
  3131. /**
  3132. * omap_hwmod_get_main_clk - get pointer to main clock name
  3133. * @oh: struct omap_hwmod *
  3134. *
  3135. * Returns the main clock name assocated with @oh upon success,
  3136. * or NULL if @oh is NULL.
  3137. */
  3138. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3139. {
  3140. if (!oh)
  3141. return NULL;
  3142. return oh->main_clk;
  3143. }