board-omap3evm.c 21 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-omap3evm.c
  3. *
  4. * Copyright (C) 2008 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-3430sdp.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/err.h>
  19. #include <linux/clk.h>
  20. #include <linux/gpio.h>
  21. #include <linux/input.h>
  22. #include <linux/input/matrix_keypad.h>
  23. #include <linux/leds.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/mtd/mtd.h>
  26. #include <linux/mtd/partitions.h>
  27. #include <linux/mtd/nand.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/spi/ads7846.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/usb/otg.h>
  32. #include <linux/smsc911x.h>
  33. #include <linux/wl12xx.h>
  34. #include <linux/regulator/fixed.h>
  35. #include <linux/regulator/machine.h>
  36. #include <linux/mmc/host.h>
  37. #include <linux/export.h>
  38. #include <mach/hardware.h>
  39. #include <asm/mach-types.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach/map.h>
  42. #include <plat/board.h>
  43. #include <plat/usb.h>
  44. #include <plat/nand.h>
  45. #include "common.h"
  46. #include <plat/mcspi.h>
  47. #include <video/omapdss.h>
  48. #include <video/omap-panel-tfp410.h>
  49. #include "mux.h"
  50. #include "sdram-micron-mt46h32m32lf-6.h"
  51. #include "hsmmc.h"
  52. #include "common-board-devices.h"
  53. #define OMAP3_EVM_EHCI_VBUS 22
  54. #define OMAP3_EVM_EHCI_SELECT 61
  55. #define OMAP3EVM_ETHR_START 0x2c000000
  56. #define OMAP3EVM_ETHR_SIZE 1024
  57. #define OMAP3EVM_ETHR_ID_REV 0x50
  58. #define OMAP3EVM_ETHR_GPIO_IRQ 176
  59. #define OMAP3EVM_SMSC911X_CS 5
  60. /*
  61. * Eth Reset signal
  62. * 64 = Generation 1 (<=RevD)
  63. * 7 = Generation 2 (>=RevE)
  64. */
  65. #define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
  66. #define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
  67. static u8 omap3_evm_version;
  68. u8 get_omap3_evm_rev(void)
  69. {
  70. return omap3_evm_version;
  71. }
  72. EXPORT_SYMBOL(get_omap3_evm_rev);
  73. static void __init omap3_evm_get_revision(void)
  74. {
  75. void __iomem *ioaddr;
  76. unsigned int smsc_id;
  77. /* Ethernet PHY ID is stored at ID_REV register */
  78. ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
  79. if (!ioaddr)
  80. return;
  81. smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
  82. iounmap(ioaddr);
  83. switch (smsc_id) {
  84. /*SMSC9115 chipset*/
  85. case 0x01150000:
  86. omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
  87. break;
  88. /*SMSC 9220 chipset*/
  89. case 0x92200000:
  90. default:
  91. omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
  92. }
  93. }
  94. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  95. #include <plat/gpmc-smsc911x.h>
  96. static struct omap_smsc911x_platform_data smsc911x_cfg = {
  97. .cs = OMAP3EVM_SMSC911X_CS,
  98. .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
  99. .gpio_reset = -EINVAL,
  100. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  101. };
  102. static inline void __init omap3evm_init_smsc911x(void)
  103. {
  104. /* Configure ethernet controller reset gpio */
  105. if (cpu_is_omap3430()) {
  106. if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
  107. smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
  108. else
  109. smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
  110. }
  111. gpmc_smsc911x_init(&smsc911x_cfg);
  112. }
  113. #else
  114. static inline void __init omap3evm_init_smsc911x(void) { return; }
  115. #endif
  116. /*
  117. * OMAP3EVM LCD Panel control signals
  118. */
  119. #define OMAP3EVM_LCD_PANEL_LR 2
  120. #define OMAP3EVM_LCD_PANEL_UD 3
  121. #define OMAP3EVM_LCD_PANEL_INI 152
  122. #define OMAP3EVM_LCD_PANEL_ENVDD 153
  123. #define OMAP3EVM_LCD_PANEL_QVGA 154
  124. #define OMAP3EVM_LCD_PANEL_RESB 155
  125. #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
  126. #define OMAP3EVM_DVI_PANEL_EN_GPIO 199
  127. static struct gpio omap3_evm_dss_gpios[] __initdata = {
  128. { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" },
  129. { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" },
  130. { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" },
  131. { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" },
  132. { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" },
  133. { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
  134. };
  135. static int lcd_enabled;
  136. static int dvi_enabled;
  137. static void __init omap3_evm_display_init(void)
  138. {
  139. int r;
  140. r = gpio_request_array(omap3_evm_dss_gpios,
  141. ARRAY_SIZE(omap3_evm_dss_gpios));
  142. if (r)
  143. printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
  144. }
  145. static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
  146. {
  147. if (dvi_enabled) {
  148. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  149. return -EINVAL;
  150. }
  151. gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
  152. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  153. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
  154. else
  155. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
  156. lcd_enabled = 1;
  157. return 0;
  158. }
  159. static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
  160. {
  161. gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
  162. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  163. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
  164. else
  165. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
  166. lcd_enabled = 0;
  167. }
  168. static struct omap_dss_device omap3_evm_lcd_device = {
  169. .name = "lcd",
  170. .driver_name = "sharp_ls_panel",
  171. .type = OMAP_DISPLAY_TYPE_DPI,
  172. .phy.dpi.data_lines = 18,
  173. .platform_enable = omap3_evm_enable_lcd,
  174. .platform_disable = omap3_evm_disable_lcd,
  175. };
  176. static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
  177. {
  178. return 0;
  179. }
  180. static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
  181. {
  182. }
  183. static struct omap_dss_device omap3_evm_tv_device = {
  184. .name = "tv",
  185. .driver_name = "venc",
  186. .type = OMAP_DISPLAY_TYPE_VENC,
  187. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  188. .platform_enable = omap3_evm_enable_tv,
  189. .platform_disable = omap3_evm_disable_tv,
  190. };
  191. static struct tfp410_platform_data dvi_panel = {
  192. .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
  193. };
  194. static struct omap_dss_device omap3_evm_dvi_device = {
  195. .name = "dvi",
  196. .type = OMAP_DISPLAY_TYPE_DPI,
  197. .driver_name = "tfp410",
  198. .data = &dvi_panel,
  199. .phy.dpi.data_lines = 24,
  200. };
  201. static struct omap_dss_device *omap3_evm_dss_devices[] = {
  202. &omap3_evm_lcd_device,
  203. &omap3_evm_tv_device,
  204. &omap3_evm_dvi_device,
  205. };
  206. static struct omap_dss_board_info omap3_evm_dss_data = {
  207. .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
  208. .devices = omap3_evm_dss_devices,
  209. .default_device = &omap3_evm_lcd_device,
  210. };
  211. static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
  212. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  213. };
  214. static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
  215. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  216. };
  217. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  218. static struct regulator_init_data omap3evm_vmmc1 = {
  219. .constraints = {
  220. .min_uV = 1850000,
  221. .max_uV = 3150000,
  222. .valid_modes_mask = REGULATOR_MODE_NORMAL
  223. | REGULATOR_MODE_STANDBY,
  224. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  225. | REGULATOR_CHANGE_MODE
  226. | REGULATOR_CHANGE_STATUS,
  227. },
  228. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
  229. .consumer_supplies = omap3evm_vmmc1_supply,
  230. };
  231. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  232. static struct regulator_init_data omap3evm_vsim = {
  233. .constraints = {
  234. .min_uV = 1800000,
  235. .max_uV = 3000000,
  236. .valid_modes_mask = REGULATOR_MODE_NORMAL
  237. | REGULATOR_MODE_STANDBY,
  238. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  239. | REGULATOR_CHANGE_MODE
  240. | REGULATOR_CHANGE_STATUS,
  241. },
  242. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
  243. .consumer_supplies = omap3evm_vsim_supply,
  244. };
  245. static struct omap2_hsmmc_info mmc[] = {
  246. {
  247. .mmc = 1,
  248. .caps = MMC_CAP_4_BIT_DATA,
  249. .gpio_cd = -EINVAL,
  250. .gpio_wp = 63,
  251. .deferred = true,
  252. },
  253. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  254. {
  255. .name = "wl1271",
  256. .mmc = 2,
  257. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
  258. .gpio_wp = -EINVAL,
  259. .gpio_cd = -EINVAL,
  260. .nonremovable = true,
  261. },
  262. #endif
  263. {} /* Terminator */
  264. };
  265. static struct gpio_led gpio_leds[] = {
  266. {
  267. .name = "omap3evm::ledb",
  268. /* normally not visible (board underside) */
  269. .default_trigger = "default-on",
  270. .gpio = -EINVAL, /* gets replaced */
  271. .active_low = true,
  272. },
  273. };
  274. static struct gpio_led_platform_data gpio_led_info = {
  275. .leds = gpio_leds,
  276. .num_leds = ARRAY_SIZE(gpio_leds),
  277. };
  278. static struct platform_device leds_gpio = {
  279. .name = "leds-gpio",
  280. .id = -1,
  281. .dev = {
  282. .platform_data = &gpio_led_info,
  283. },
  284. };
  285. static int omap3evm_twl_gpio_setup(struct device *dev,
  286. unsigned gpio, unsigned ngpio)
  287. {
  288. int r, lcd_bl_en;
  289. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  290. mmc[0].gpio_cd = gpio + 0;
  291. omap_hsmmc_late_init(mmc);
  292. /*
  293. * Most GPIOs are for USB OTG. Some are mostly sent to
  294. * the P2 connector; notably LEDA for the LCD backlight.
  295. */
  296. /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
  297. lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
  298. GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
  299. r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
  300. if (r)
  301. printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
  302. /* gpio + 7 == DVI Enable */
  303. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
  304. /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
  305. gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
  306. platform_device_register(&leds_gpio);
  307. /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
  308. * for starting USB tranceiver
  309. */
  310. #ifdef CONFIG_TWL4030_CORE
  311. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
  312. u8 val;
  313. twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
  314. val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
  315. twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
  316. }
  317. #endif
  318. return 0;
  319. }
  320. static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
  321. .gpio_base = OMAP_MAX_GPIO_LINES,
  322. .irq_base = TWL4030_GPIO_IRQ_BASE,
  323. .irq_end = TWL4030_GPIO_IRQ_END,
  324. .use_leds = true,
  325. .setup = omap3evm_twl_gpio_setup,
  326. };
  327. static uint32_t board_keymap[] = {
  328. KEY(0, 0, KEY_LEFT),
  329. KEY(0, 1, KEY_DOWN),
  330. KEY(0, 2, KEY_ENTER),
  331. KEY(0, 3, KEY_M),
  332. KEY(1, 0, KEY_RIGHT),
  333. KEY(1, 1, KEY_UP),
  334. KEY(1, 2, KEY_I),
  335. KEY(1, 3, KEY_N),
  336. KEY(2, 0, KEY_A),
  337. KEY(2, 1, KEY_E),
  338. KEY(2, 2, KEY_J),
  339. KEY(2, 3, KEY_O),
  340. KEY(3, 0, KEY_B),
  341. KEY(3, 1, KEY_F),
  342. KEY(3, 2, KEY_K),
  343. KEY(3, 3, KEY_P)
  344. };
  345. static struct matrix_keymap_data board_map_data = {
  346. .keymap = board_keymap,
  347. .keymap_size = ARRAY_SIZE(board_keymap),
  348. };
  349. static struct twl4030_keypad_data omap3evm_kp_data = {
  350. .keymap_data = &board_map_data,
  351. .rows = 4,
  352. .cols = 4,
  353. .rep = 1,
  354. };
  355. /* ads7846 on SPI */
  356. static struct regulator_consumer_supply omap3evm_vio_supply[] = {
  357. REGULATOR_SUPPLY("vcc", "spi1.0"),
  358. };
  359. /* VIO for ads7846 */
  360. static struct regulator_init_data omap3evm_vio = {
  361. .constraints = {
  362. .min_uV = 1800000,
  363. .max_uV = 1800000,
  364. .apply_uV = true,
  365. .valid_modes_mask = REGULATOR_MODE_NORMAL
  366. | REGULATOR_MODE_STANDBY,
  367. .valid_ops_mask = REGULATOR_CHANGE_MODE
  368. | REGULATOR_CHANGE_STATUS,
  369. },
  370. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
  371. .consumer_supplies = omap3evm_vio_supply,
  372. };
  373. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  374. #define OMAP3EVM_WLAN_PMENA_GPIO (150)
  375. #define OMAP3EVM_WLAN_IRQ_GPIO (149)
  376. static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
  377. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  378. };
  379. /* VMMC2 for driving the WL12xx module */
  380. static struct regulator_init_data omap3evm_vmmc2 = {
  381. .constraints = {
  382. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  383. },
  384. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
  385. .consumer_supplies = omap3evm_vmmc2_supply,
  386. };
  387. static struct fixed_voltage_config omap3evm_vwlan = {
  388. .supply_name = "vwl1271",
  389. .microvolts = 1800000, /* 1.80V */
  390. .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
  391. .startup_delay = 70000, /* 70ms */
  392. .enable_high = 1,
  393. .enabled_at_boot = 0,
  394. .init_data = &omap3evm_vmmc2,
  395. };
  396. static struct platform_device omap3evm_wlan_regulator = {
  397. .name = "reg-fixed-voltage",
  398. .id = 1,
  399. .dev = {
  400. .platform_data = &omap3evm_vwlan,
  401. },
  402. };
  403. struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
  404. .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
  405. };
  406. #endif
  407. /* VAUX2 for USB */
  408. static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
  409. REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
  410. REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
  411. REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
  412. REGULATOR_SUPPLY("vaux2", NULL),
  413. };
  414. static struct regulator_init_data omap3evm_vaux2 = {
  415. .constraints = {
  416. .min_uV = 2800000,
  417. .max_uV = 2800000,
  418. .apply_uV = true,
  419. .valid_modes_mask = REGULATOR_MODE_NORMAL
  420. | REGULATOR_MODE_STANDBY,
  421. .valid_ops_mask = REGULATOR_CHANGE_MODE
  422. | REGULATOR_CHANGE_STATUS,
  423. },
  424. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
  425. .consumer_supplies = omap3evm_vaux2_supplies,
  426. };
  427. static struct twl4030_platform_data omap3evm_twldata = {
  428. /* platform_data for children goes here */
  429. .keypad = &omap3evm_kp_data,
  430. .gpio = &omap3evm_gpio_data,
  431. .vio = &omap3evm_vio,
  432. .vmmc1 = &omap3evm_vmmc1,
  433. .vsim = &omap3evm_vsim,
  434. };
  435. static int __init omap3_evm_i2c_init(void)
  436. {
  437. omap3_pmic_get_config(&omap3evm_twldata,
  438. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
  439. TWL_COMMON_PDATA_AUDIO,
  440. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  441. omap3evm_twldata.vdac->constraints.apply_uV = true;
  442. omap3evm_twldata.vpll2->constraints.apply_uV = true;
  443. omap3_pmic_init("twl4030", &omap3evm_twldata);
  444. omap_register_i2c_bus(2, 400, NULL, 0);
  445. omap_register_i2c_bus(3, 400, NULL, 0);
  446. return 0;
  447. }
  448. static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
  449. };
  450. static struct usbhs_omap_board_data usbhs_bdata __initdata = {
  451. .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
  452. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  453. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  454. .phy_reset = true,
  455. /* PHY reset GPIO will be runtime programmed based on EVM version */
  456. .reset_gpio_port[0] = -EINVAL,
  457. .reset_gpio_port[1] = -EINVAL,
  458. .reset_gpio_port[2] = -EINVAL
  459. };
  460. #ifdef CONFIG_OMAP_MUX
  461. static struct omap_board_mux omap35x_board_mux[] __initdata = {
  462. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
  463. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  464. OMAP_PIN_OFF_WAKEUPENABLE),
  465. OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  466. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  467. OMAP_PIN_OFF_WAKEUPENABLE),
  468. OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  469. OMAP_PIN_OFF_NONE),
  470. OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  471. OMAP_PIN_OFF_NONE),
  472. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  473. /* WLAN IRQ - GPIO 149 */
  474. OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  475. /* WLAN POWER ENABLE - GPIO 150 */
  476. OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  477. /* MMC2 SDIO pin muxes for WL12xx */
  478. OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  479. OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  480. OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  481. OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  482. OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  483. OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  484. #endif
  485. { .reg_offset = OMAP_MUX_TERMINATOR },
  486. };
  487. static struct omap_board_mux omap36x_board_mux[] __initdata = {
  488. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
  489. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  490. OMAP_PIN_OFF_WAKEUPENABLE),
  491. OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  492. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  493. OMAP_PIN_OFF_WAKEUPENABLE),
  494. /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
  495. OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  496. OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  497. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  498. OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  499. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  500. OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  501. OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  502. OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  503. OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  504. OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  505. OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  506. OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  507. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  508. /* WLAN IRQ - GPIO 149 */
  509. OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  510. /* WLAN POWER ENABLE - GPIO 150 */
  511. OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  512. /* MMC2 SDIO pin muxes for WL12xx */
  513. OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  514. OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  515. OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  516. OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  517. OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  518. OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  519. #endif
  520. { .reg_offset = OMAP_MUX_TERMINATOR },
  521. };
  522. #else
  523. #define omap35x_board_mux NULL
  524. #define omap36x_board_mux NULL
  525. #endif
  526. static struct omap_musb_board_data musb_board_data = {
  527. .interface_type = MUSB_INTERFACE_ULPI,
  528. .mode = MUSB_OTG,
  529. .power = 100,
  530. };
  531. static struct gpio omap3_evm_ehci_gpios[] __initdata = {
  532. { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
  533. { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
  534. };
  535. static void __init omap3_evm_wl12xx_init(void)
  536. {
  537. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  538. int ret;
  539. /* WL12xx WLAN Init */
  540. omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
  541. ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
  542. if (ret)
  543. pr_err("error setting wl12xx data: %d\n", ret);
  544. ret = platform_device_register(&omap3evm_wlan_regulator);
  545. if (ret)
  546. pr_err("error registering wl12xx device: %d\n", ret);
  547. #endif
  548. }
  549. static struct regulator_consumer_supply dummy_supplies[] = {
  550. REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
  551. REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
  552. };
  553. static struct mtd_partition omap3evm_nand_partitions[] = {
  554. /* All the partition sizes are listed in terms of NAND block size */
  555. {
  556. .name = "X-Loader",
  557. .offset = 0,
  558. .size = 4*(SZ_128K),
  559. .mask_flags = MTD_WRITEABLE
  560. },
  561. {
  562. .name = "U-Boot",
  563. .offset = MTDPART_OFS_APPEND,
  564. .size = 14*(SZ_128K),
  565. .mask_flags = MTD_WRITEABLE
  566. },
  567. {
  568. .name = "U-Boot Env",
  569. .offset = MTDPART_OFS_APPEND,
  570. .size = 2*(SZ_128K)
  571. },
  572. {
  573. .name = "Kernel",
  574. .offset = MTDPART_OFS_APPEND,
  575. .size = 40*(SZ_128K)
  576. },
  577. {
  578. .name = "File system",
  579. .size = MTDPART_SIZ_FULL,
  580. .offset = MTDPART_OFS_APPEND,
  581. },
  582. };
  583. static void __init omap3_evm_init(void)
  584. {
  585. struct omap_board_mux *obm;
  586. omap3_evm_get_revision();
  587. regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  588. obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
  589. omap3_mux_init(obm, OMAP_PACKAGE_CBB);
  590. omap_board_config = omap3_evm_config;
  591. omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
  592. omap_mux_init_gpio(63, OMAP_PIN_INPUT);
  593. omap_hsmmc_init(mmc);
  594. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  595. omap3evm_twldata.vaux2 = &omap3evm_vaux2;
  596. omap3_evm_i2c_init();
  597. omap_display_init(&omap3_evm_dss_data);
  598. omap_serial_init();
  599. omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
  600. /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
  601. usb_nop_xceiv_register();
  602. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
  603. /* enable EHCI VBUS using GPIO22 */
  604. omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
  605. /* Select EHCI port on main board */
  606. omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
  607. OMAP_PIN_INPUT_PULLUP);
  608. gpio_request_array(omap3_evm_ehci_gpios,
  609. ARRAY_SIZE(omap3_evm_ehci_gpios));
  610. /* setup EHCI phy reset config */
  611. omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
  612. usbhs_bdata.reset_gpio_port[1] = 21;
  613. /* EVM REV >= E can supply 500mA with EXTVBUS programming */
  614. musb_board_data.power = 500;
  615. musb_board_data.extvbus = 1;
  616. } else {
  617. /* setup EHCI phy reset on MDC */
  618. omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
  619. usbhs_bdata.reset_gpio_port[1] = 135;
  620. }
  621. usb_musb_init(&musb_board_data);
  622. usbhs_init(&usbhs_bdata);
  623. omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions,
  624. ARRAY_SIZE(omap3evm_nand_partitions));
  625. omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
  626. omap3evm_init_smsc911x();
  627. omap3_evm_display_init();
  628. omap3_evm_wl12xx_init();
  629. }
  630. MACHINE_START(OMAP3EVM, "OMAP3 EVM")
  631. /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
  632. .atag_offset = 0x100,
  633. .reserve = omap_reserve,
  634. .map_io = omap3_map_io,
  635. .init_early = omap35xx_init_early,
  636. .init_irq = omap3_init_irq,
  637. .handle_irq = omap3_intc_handle_irq,
  638. .init_machine = omap3_evm_init,
  639. .init_late = omap35xx_init_late,
  640. .timer = &omap3_timer,
  641. .restart = omap_prcm_restart,
  642. MACHINE_END