board-3430sdp.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <plat/mcspi.h>
  31. #include <plat/board.h>
  32. #include <plat/usb.h>
  33. #include "common.h"
  34. #include <plat/dma.h>
  35. #include <plat/gpmc.h>
  36. #include <video/omapdss.h>
  37. #include <video/omap-panel-tfp410.h>
  38. #include <plat/gpmc-smc91x.h>
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #include "common-board-devices.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. static uint32_t board_keymap[] = {
  53. KEY(0, 0, KEY_LEFT),
  54. KEY(0, 1, KEY_RIGHT),
  55. KEY(0, 2, KEY_A),
  56. KEY(0, 3, KEY_B),
  57. KEY(0, 4, KEY_C),
  58. KEY(1, 0, KEY_DOWN),
  59. KEY(1, 1, KEY_UP),
  60. KEY(1, 2, KEY_E),
  61. KEY(1, 3, KEY_F),
  62. KEY(1, 4, KEY_G),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_I),
  65. KEY(2, 2, KEY_J),
  66. KEY(2, 3, KEY_K),
  67. KEY(2, 4, KEY_3),
  68. KEY(3, 0, KEY_M),
  69. KEY(3, 1, KEY_N),
  70. KEY(3, 2, KEY_O),
  71. KEY(3, 3, KEY_P),
  72. KEY(3, 4, KEY_Q),
  73. KEY(4, 0, KEY_R),
  74. KEY(4, 1, KEY_4),
  75. KEY(4, 2, KEY_T),
  76. KEY(4, 3, KEY_U),
  77. KEY(4, 4, KEY_D),
  78. KEY(5, 0, KEY_V),
  79. KEY(5, 1, KEY_W),
  80. KEY(5, 2, KEY_L),
  81. KEY(5, 3, KEY_S),
  82. KEY(5, 4, KEY_H),
  83. 0
  84. };
  85. static struct matrix_keymap_data board_map_data = {
  86. .keymap = board_keymap,
  87. .keymap_size = ARRAY_SIZE(board_keymap),
  88. };
  89. static struct twl4030_keypad_data sdp3430_kp_data = {
  90. .keymap_data = &board_map_data,
  91. .rows = 5,
  92. .cols = 6,
  93. .rep = 1,
  94. };
  95. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  96. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  97. static struct gpio sdp3430_dss_gpios[] __initdata = {
  98. {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
  99. {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
  100. };
  101. static void __init sdp3430_display_init(void)
  102. {
  103. int r;
  104. r = gpio_request_array(sdp3430_dss_gpios,
  105. ARRAY_SIZE(sdp3430_dss_gpios));
  106. if (r)
  107. printk(KERN_ERR "failed to get LCD control GPIOs\n");
  108. }
  109. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  110. {
  111. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
  112. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
  113. return 0;
  114. }
  115. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  116. {
  117. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
  118. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
  119. }
  120. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  121. {
  122. return 0;
  123. }
  124. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  125. {
  126. }
  127. static struct omap_dss_device sdp3430_lcd_device = {
  128. .name = "lcd",
  129. .driver_name = "sharp_ls_panel",
  130. .type = OMAP_DISPLAY_TYPE_DPI,
  131. .phy.dpi.data_lines = 16,
  132. .platform_enable = sdp3430_panel_enable_lcd,
  133. .platform_disable = sdp3430_panel_disable_lcd,
  134. };
  135. static struct tfp410_platform_data dvi_panel = {
  136. .power_down_gpio = -1,
  137. };
  138. static struct omap_dss_device sdp3430_dvi_device = {
  139. .name = "dvi",
  140. .type = OMAP_DISPLAY_TYPE_DPI,
  141. .driver_name = "tfp410",
  142. .data = &dvi_panel,
  143. .phy.dpi.data_lines = 24,
  144. };
  145. static struct omap_dss_device sdp3430_tv_device = {
  146. .name = "tv",
  147. .driver_name = "venc",
  148. .type = OMAP_DISPLAY_TYPE_VENC,
  149. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  150. .platform_enable = sdp3430_panel_enable_tv,
  151. .platform_disable = sdp3430_panel_disable_tv,
  152. };
  153. static struct omap_dss_device *sdp3430_dss_devices[] = {
  154. &sdp3430_lcd_device,
  155. &sdp3430_dvi_device,
  156. &sdp3430_tv_device,
  157. };
  158. static struct omap_dss_board_info sdp3430_dss_data = {
  159. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  160. .devices = sdp3430_dss_devices,
  161. .default_device = &sdp3430_lcd_device,
  162. };
  163. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  164. };
  165. static struct omap2_hsmmc_info mmc[] = {
  166. {
  167. .mmc = 1,
  168. /* 8 bits (default) requires S6.3 == ON,
  169. * so the SIM card isn't used; else 4 bits.
  170. */
  171. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  172. .gpio_wp = 4,
  173. .deferred = true,
  174. },
  175. {
  176. .mmc = 2,
  177. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  178. .gpio_wp = 7,
  179. .deferred = true,
  180. },
  181. {} /* Terminator */
  182. };
  183. static int sdp3430_twl_gpio_setup(struct device *dev,
  184. unsigned gpio, unsigned ngpio)
  185. {
  186. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  187. * gpio + 1 is "mmc1_cd" (input/IRQ)
  188. */
  189. mmc[0].gpio_cd = gpio + 0;
  190. mmc[1].gpio_cd = gpio + 1;
  191. omap_hsmmc_late_init(mmc);
  192. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  193. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  194. /* gpio + 15 is "sub_lcd_nRST" (output) */
  195. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  196. return 0;
  197. }
  198. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  199. .gpio_base = OMAP_MAX_GPIO_LINES,
  200. .irq_base = TWL4030_GPIO_IRQ_BASE,
  201. .irq_end = TWL4030_GPIO_IRQ_END,
  202. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  203. | BIT(16) | BIT(17),
  204. .setup = sdp3430_twl_gpio_setup,
  205. };
  206. /* regulator consumer mappings */
  207. /* ads7846 on SPI */
  208. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  209. REGULATOR_SUPPLY("vcc", "spi1.0"),
  210. };
  211. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  212. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  213. };
  214. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  215. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  216. };
  217. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  218. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  219. };
  220. /*
  221. * Apply all the fixed voltages since most versions of U-Boot
  222. * don't bother with that initialization.
  223. */
  224. /* VAUX1 for mainboard (irda and sub-lcd) */
  225. static struct regulator_init_data sdp3430_vaux1 = {
  226. .constraints = {
  227. .min_uV = 2800000,
  228. .max_uV = 2800000,
  229. .apply_uV = true,
  230. .valid_modes_mask = REGULATOR_MODE_NORMAL
  231. | REGULATOR_MODE_STANDBY,
  232. .valid_ops_mask = REGULATOR_CHANGE_MODE
  233. | REGULATOR_CHANGE_STATUS,
  234. },
  235. };
  236. /* VAUX2 for camera module */
  237. static struct regulator_init_data sdp3430_vaux2 = {
  238. .constraints = {
  239. .min_uV = 2800000,
  240. .max_uV = 2800000,
  241. .apply_uV = true,
  242. .valid_modes_mask = REGULATOR_MODE_NORMAL
  243. | REGULATOR_MODE_STANDBY,
  244. .valid_ops_mask = REGULATOR_CHANGE_MODE
  245. | REGULATOR_CHANGE_STATUS,
  246. },
  247. };
  248. /* VAUX3 for LCD board */
  249. static struct regulator_init_data sdp3430_vaux3 = {
  250. .constraints = {
  251. .min_uV = 2800000,
  252. .max_uV = 2800000,
  253. .apply_uV = true,
  254. .valid_modes_mask = REGULATOR_MODE_NORMAL
  255. | REGULATOR_MODE_STANDBY,
  256. .valid_ops_mask = REGULATOR_CHANGE_MODE
  257. | REGULATOR_CHANGE_STATUS,
  258. },
  259. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  260. .consumer_supplies = sdp3430_vaux3_supplies,
  261. };
  262. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  263. static struct regulator_init_data sdp3430_vaux4 = {
  264. .constraints = {
  265. .min_uV = 1800000,
  266. .max_uV = 1800000,
  267. .apply_uV = true,
  268. .valid_modes_mask = REGULATOR_MODE_NORMAL
  269. | REGULATOR_MODE_STANDBY,
  270. .valid_ops_mask = REGULATOR_CHANGE_MODE
  271. | REGULATOR_CHANGE_STATUS,
  272. },
  273. };
  274. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  275. static struct regulator_init_data sdp3430_vmmc1 = {
  276. .constraints = {
  277. .min_uV = 1850000,
  278. .max_uV = 3150000,
  279. .valid_modes_mask = REGULATOR_MODE_NORMAL
  280. | REGULATOR_MODE_STANDBY,
  281. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  282. | REGULATOR_CHANGE_MODE
  283. | REGULATOR_CHANGE_STATUS,
  284. },
  285. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  286. .consumer_supplies = sdp3430_vmmc1_supplies,
  287. };
  288. /* VMMC2 for MMC2 card */
  289. static struct regulator_init_data sdp3430_vmmc2 = {
  290. .constraints = {
  291. .min_uV = 1850000,
  292. .max_uV = 1850000,
  293. .apply_uV = true,
  294. .valid_modes_mask = REGULATOR_MODE_NORMAL
  295. | REGULATOR_MODE_STANDBY,
  296. .valid_ops_mask = REGULATOR_CHANGE_MODE
  297. | REGULATOR_CHANGE_STATUS,
  298. },
  299. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  300. .consumer_supplies = sdp3430_vmmc2_supplies,
  301. };
  302. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  303. static struct regulator_init_data sdp3430_vsim = {
  304. .constraints = {
  305. .min_uV = 1800000,
  306. .max_uV = 3000000,
  307. .valid_modes_mask = REGULATOR_MODE_NORMAL
  308. | REGULATOR_MODE_STANDBY,
  309. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  310. | REGULATOR_CHANGE_MODE
  311. | REGULATOR_CHANGE_STATUS,
  312. },
  313. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  314. .consumer_supplies = sdp3430_vsim_supplies,
  315. };
  316. static struct twl4030_platform_data sdp3430_twldata = {
  317. /* platform_data for children goes here */
  318. .gpio = &sdp3430_gpio_data,
  319. .keypad = &sdp3430_kp_data,
  320. .vaux1 = &sdp3430_vaux1,
  321. .vaux2 = &sdp3430_vaux2,
  322. .vaux3 = &sdp3430_vaux3,
  323. .vaux4 = &sdp3430_vaux4,
  324. .vmmc1 = &sdp3430_vmmc1,
  325. .vmmc2 = &sdp3430_vmmc2,
  326. .vsim = &sdp3430_vsim,
  327. };
  328. static int __init omap3430_i2c_init(void)
  329. {
  330. /* i2c1 for PMIC only */
  331. omap3_pmic_get_config(&sdp3430_twldata,
  332. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  333. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  334. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  335. sdp3430_twldata.vdac->constraints.apply_uV = true;
  336. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  337. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  338. omap3_pmic_init("twl4030", &sdp3430_twldata);
  339. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  340. omap_register_i2c_bus(2, 400, NULL, 0);
  341. /* i2c3 on display connector (for DVI, tfp410) */
  342. omap_register_i2c_bus(3, 400, NULL, 0);
  343. return 0;
  344. }
  345. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  346. static struct omap_smc91x_platform_data board_smc91x_data = {
  347. .cs = 3,
  348. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  349. IORESOURCE_IRQ_LOWLEVEL,
  350. };
  351. static void __init board_smc91x_init(void)
  352. {
  353. if (omap_rev() > OMAP3430_REV_ES1_0)
  354. board_smc91x_data.gpio_irq = 6;
  355. else
  356. board_smc91x_data.gpio_irq = 29;
  357. gpmc_smc91x_init(&board_smc91x_data);
  358. }
  359. #else
  360. static inline void board_smc91x_init(void)
  361. {
  362. }
  363. #endif
  364. static void enable_board_wakeup_source(void)
  365. {
  366. /* T2 interrupt line (keypad) */
  367. omap_mux_init_signal("sys_nirq",
  368. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  369. }
  370. static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
  371. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  372. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  373. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  374. .phy_reset = true,
  375. .reset_gpio_port[0] = 57,
  376. .reset_gpio_port[1] = 61,
  377. .reset_gpio_port[2] = -EINVAL
  378. };
  379. #ifdef CONFIG_OMAP_MUX
  380. static struct omap_board_mux board_mux[] __initdata = {
  381. { .reg_offset = OMAP_MUX_TERMINATOR },
  382. };
  383. #else
  384. #define board_mux NULL
  385. #endif
  386. /*
  387. * SDP3430 V2 Board CS organization
  388. * Different from SDP3430 V1. Now 4 switches used to specify CS
  389. *
  390. * See also the Switch S8 settings in the comments.
  391. */
  392. static char chip_sel_3430[][GPMC_CS_NUM] = {
  393. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  394. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  395. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  396. };
  397. static struct mtd_partition sdp_nor_partitions[] = {
  398. /* bootloader (U-Boot, etc) in first sector */
  399. {
  400. .name = "Bootloader-NOR",
  401. .offset = 0,
  402. .size = SZ_256K,
  403. .mask_flags = MTD_WRITEABLE, /* force read-only */
  404. },
  405. /* bootloader params in the next sector */
  406. {
  407. .name = "Params-NOR",
  408. .offset = MTDPART_OFS_APPEND,
  409. .size = SZ_256K,
  410. .mask_flags = 0,
  411. },
  412. /* kernel */
  413. {
  414. .name = "Kernel-NOR",
  415. .offset = MTDPART_OFS_APPEND,
  416. .size = SZ_2M,
  417. .mask_flags = 0
  418. },
  419. /* file system */
  420. {
  421. .name = "Filesystem-NOR",
  422. .offset = MTDPART_OFS_APPEND,
  423. .size = MTDPART_SIZ_FULL,
  424. .mask_flags = 0
  425. }
  426. };
  427. static struct mtd_partition sdp_onenand_partitions[] = {
  428. {
  429. .name = "X-Loader-OneNAND",
  430. .offset = 0,
  431. .size = 4 * (64 * 2048),
  432. .mask_flags = MTD_WRITEABLE /* force read-only */
  433. },
  434. {
  435. .name = "U-Boot-OneNAND",
  436. .offset = MTDPART_OFS_APPEND,
  437. .size = 2 * (64 * 2048),
  438. .mask_flags = MTD_WRITEABLE /* force read-only */
  439. },
  440. {
  441. .name = "U-Boot Environment-OneNAND",
  442. .offset = MTDPART_OFS_APPEND,
  443. .size = 1 * (64 * 2048),
  444. },
  445. {
  446. .name = "Kernel-OneNAND",
  447. .offset = MTDPART_OFS_APPEND,
  448. .size = 16 * (64 * 2048),
  449. },
  450. {
  451. .name = "File System-OneNAND",
  452. .offset = MTDPART_OFS_APPEND,
  453. .size = MTDPART_SIZ_FULL,
  454. },
  455. };
  456. static struct mtd_partition sdp_nand_partitions[] = {
  457. /* All the partition sizes are listed in terms of NAND block size */
  458. {
  459. .name = "X-Loader-NAND",
  460. .offset = 0,
  461. .size = 4 * (64 * 2048),
  462. .mask_flags = MTD_WRITEABLE, /* force read-only */
  463. },
  464. {
  465. .name = "U-Boot-NAND",
  466. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  467. .size = 10 * (64 * 2048),
  468. .mask_flags = MTD_WRITEABLE, /* force read-only */
  469. },
  470. {
  471. .name = "Boot Env-NAND",
  472. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  473. .size = 6 * (64 * 2048),
  474. },
  475. {
  476. .name = "Kernel-NAND",
  477. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  478. .size = 40 * (64 * 2048),
  479. },
  480. {
  481. .name = "File System - NAND",
  482. .size = MTDPART_SIZ_FULL,
  483. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  484. },
  485. };
  486. static struct flash_partitions sdp_flash_partitions[] = {
  487. {
  488. .parts = sdp_nor_partitions,
  489. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  490. },
  491. {
  492. .parts = sdp_onenand_partitions,
  493. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  494. },
  495. {
  496. .parts = sdp_nand_partitions,
  497. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  498. },
  499. };
  500. static void __init omap_3430sdp_init(void)
  501. {
  502. int gpio_pendown;
  503. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  504. omap_board_config = sdp3430_config;
  505. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  506. omap_hsmmc_init(mmc);
  507. omap3430_i2c_init();
  508. omap_display_init(&sdp3430_dss_data);
  509. if (omap_rev() > OMAP3430_REV_ES1_0)
  510. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  511. else
  512. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  513. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  514. omap_serial_init();
  515. omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
  516. usb_musb_init(NULL);
  517. board_smc91x_init();
  518. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  519. sdp3430_display_init();
  520. enable_board_wakeup_source();
  521. usbhs_init(&usbhs_bdata);
  522. }
  523. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  524. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  525. .atag_offset = 0x100,
  526. .reserve = omap_reserve,
  527. .map_io = omap3_map_io,
  528. .init_early = omap3430_init_early,
  529. .init_irq = omap3_init_irq,
  530. .handle_irq = omap3_intc_handle_irq,
  531. .init_machine = omap_3430sdp_init,
  532. .init_late = omap3430_init_late,
  533. .timer = &omap3_timer,
  534. .restart = omap_prcm_restart,
  535. MACHINE_END