lcd_dma.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447
  1. /*
  2. * linux/arch/arm/mach-omap1/lcd_dma.c
  3. *
  4. * Extracted from arch/arm/plat-omap/dma.c
  5. * Copyright (C) 2003 - 2008 Nokia Corporation
  6. * Author: Juha Yrjölä <juha.yrjola@nokia.com>
  7. * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
  8. * Graphics DMA and LCD DMA graphics tranformations
  9. * by Imre Deak <imre.deak@nokia.com>
  10. * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
  11. * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
  12. * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
  13. *
  14. * Copyright (C) 2009 Texas Instruments
  15. * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  16. *
  17. * Support functions for the OMAP internal DMA channels.
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License version 2 as
  21. * published by the Free Software Foundation.
  22. *
  23. */
  24. #include <linux/module.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/io.h>
  28. #include <plat/dma.h>
  29. #include <mach/hardware.h>
  30. #include <mach/lcdc.h>
  31. int omap_lcd_dma_running(void)
  32. {
  33. /*
  34. * On OMAP1510, internal LCD controller will start the transfer
  35. * when it gets enabled, so assume DMA running if LCD enabled.
  36. */
  37. if (cpu_is_omap15xx())
  38. if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
  39. return 1;
  40. /* Check if LCD DMA is running */
  41. if (cpu_is_omap16xx())
  42. if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
  43. return 1;
  44. return 0;
  45. }
  46. static struct lcd_dma_info {
  47. spinlock_t lock;
  48. int reserved;
  49. void (*callback)(u16 status, void *data);
  50. void *cb_data;
  51. int active;
  52. unsigned long addr;
  53. int rotate, data_type, xres, yres;
  54. int vxres;
  55. int mirror;
  56. int xscale, yscale;
  57. int ext_ctrl;
  58. int src_port;
  59. int single_transfer;
  60. } lcd_dma;
  61. void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
  62. int data_type)
  63. {
  64. lcd_dma.addr = addr;
  65. lcd_dma.data_type = data_type;
  66. lcd_dma.xres = fb_xres;
  67. lcd_dma.yres = fb_yres;
  68. }
  69. EXPORT_SYMBOL(omap_set_lcd_dma_b1);
  70. void omap_set_lcd_dma_ext_controller(int external)
  71. {
  72. lcd_dma.ext_ctrl = external;
  73. }
  74. EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller);
  75. void omap_set_lcd_dma_single_transfer(int single)
  76. {
  77. lcd_dma.single_transfer = single;
  78. }
  79. EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
  80. void omap_set_lcd_dma_b1_rotation(int rotate)
  81. {
  82. if (cpu_is_omap15xx()) {
  83. printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
  84. BUG();
  85. return;
  86. }
  87. lcd_dma.rotate = rotate;
  88. }
  89. EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
  90. void omap_set_lcd_dma_b1_mirror(int mirror)
  91. {
  92. if (cpu_is_omap15xx()) {
  93. printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
  94. BUG();
  95. }
  96. lcd_dma.mirror = mirror;
  97. }
  98. EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
  99. void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
  100. {
  101. if (cpu_is_omap15xx()) {
  102. printk(KERN_ERR "DMA virtual resolution is not supported "
  103. "in 1510 mode\n");
  104. BUG();
  105. }
  106. lcd_dma.vxres = vxres;
  107. }
  108. EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
  109. void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
  110. {
  111. if (cpu_is_omap15xx()) {
  112. printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
  113. BUG();
  114. }
  115. lcd_dma.xscale = xscale;
  116. lcd_dma.yscale = yscale;
  117. }
  118. EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale);
  119. static void set_b1_regs(void)
  120. {
  121. unsigned long top, bottom;
  122. int es;
  123. u16 w;
  124. unsigned long en, fn;
  125. long ei, fi;
  126. unsigned long vxres;
  127. unsigned int xscale, yscale;
  128. switch (lcd_dma.data_type) {
  129. case OMAP_DMA_DATA_TYPE_S8:
  130. es = 1;
  131. break;
  132. case OMAP_DMA_DATA_TYPE_S16:
  133. es = 2;
  134. break;
  135. case OMAP_DMA_DATA_TYPE_S32:
  136. es = 4;
  137. break;
  138. default:
  139. BUG();
  140. return;
  141. }
  142. vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres;
  143. xscale = lcd_dma.xscale ? lcd_dma.xscale : 1;
  144. yscale = lcd_dma.yscale ? lcd_dma.yscale : 1;
  145. BUG_ON(vxres < lcd_dma.xres);
  146. #define PIXADDR(x, y) (lcd_dma.addr + \
  147. ((y) * vxres * yscale + (x) * xscale) * es)
  148. #define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1)
  149. switch (lcd_dma.rotate) {
  150. case 0:
  151. if (!lcd_dma.mirror) {
  152. top = PIXADDR(0, 0);
  153. bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
  154. /* 1510 DMA requires the bottom address to be 2 more
  155. * than the actual last memory access location. */
  156. if (cpu_is_omap15xx() &&
  157. lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
  158. bottom += 2;
  159. ei = PIXSTEP(0, 0, 1, 0);
  160. fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1);
  161. } else {
  162. top = PIXADDR(lcd_dma.xres - 1, 0);
  163. bottom = PIXADDR(0, lcd_dma.yres - 1);
  164. ei = PIXSTEP(1, 0, 0, 0);
  165. fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1);
  166. }
  167. en = lcd_dma.xres;
  168. fn = lcd_dma.yres;
  169. break;
  170. case 90:
  171. if (!lcd_dma.mirror) {
  172. top = PIXADDR(0, lcd_dma.yres - 1);
  173. bottom = PIXADDR(lcd_dma.xres - 1, 0);
  174. ei = PIXSTEP(0, 1, 0, 0);
  175. fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1);
  176. } else {
  177. top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
  178. bottom = PIXADDR(0, 0);
  179. ei = PIXSTEP(0, 1, 0, 0);
  180. fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1);
  181. }
  182. en = lcd_dma.yres;
  183. fn = lcd_dma.xres;
  184. break;
  185. case 180:
  186. if (!lcd_dma.mirror) {
  187. top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
  188. bottom = PIXADDR(0, 0);
  189. ei = PIXSTEP(1, 0, 0, 0);
  190. fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0);
  191. } else {
  192. top = PIXADDR(0, lcd_dma.yres - 1);
  193. bottom = PIXADDR(lcd_dma.xres - 1, 0);
  194. ei = PIXSTEP(0, 0, 1, 0);
  195. fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0);
  196. }
  197. en = lcd_dma.xres;
  198. fn = lcd_dma.yres;
  199. break;
  200. case 270:
  201. if (!lcd_dma.mirror) {
  202. top = PIXADDR(lcd_dma.xres - 1, 0);
  203. bottom = PIXADDR(0, lcd_dma.yres - 1);
  204. ei = PIXSTEP(0, 0, 0, 1);
  205. fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0);
  206. } else {
  207. top = PIXADDR(0, 0);
  208. bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
  209. ei = PIXSTEP(0, 0, 0, 1);
  210. fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0);
  211. }
  212. en = lcd_dma.yres;
  213. fn = lcd_dma.xres;
  214. break;
  215. default:
  216. BUG();
  217. return; /* Suppress warning about uninitialized vars */
  218. }
  219. if (cpu_is_omap15xx()) {
  220. omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
  221. omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
  222. omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
  223. omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L);
  224. return;
  225. }
  226. /* 1610 regs */
  227. omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U);
  228. omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L);
  229. omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U);
  230. omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L);
  231. omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1);
  232. omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1);
  233. w = omap_readw(OMAP1610_DMA_LCD_CSDP);
  234. w &= ~0x03;
  235. w |= lcd_dma.data_type;
  236. omap_writew(w, OMAP1610_DMA_LCD_CSDP);
  237. w = omap_readw(OMAP1610_DMA_LCD_CTRL);
  238. /* Always set the source port as SDRAM for now*/
  239. w &= ~(0x03 << 6);
  240. if (lcd_dma.callback != NULL)
  241. w |= 1 << 1; /* Block interrupt enable */
  242. else
  243. w &= ~(1 << 1);
  244. omap_writew(w, OMAP1610_DMA_LCD_CTRL);
  245. if (!(lcd_dma.rotate || lcd_dma.mirror ||
  246. lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale))
  247. return;
  248. w = omap_readw(OMAP1610_DMA_LCD_CCR);
  249. /* Set the double-indexed addressing mode */
  250. w |= (0x03 << 12);
  251. omap_writew(w, OMAP1610_DMA_LCD_CCR);
  252. omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1);
  253. omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U);
  254. omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
  255. }
  256. static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
  257. {
  258. u16 w;
  259. w = omap_readw(OMAP1610_DMA_LCD_CTRL);
  260. if (unlikely(!(w & (1 << 3)))) {
  261. printk(KERN_WARNING "Spurious LCD DMA IRQ\n");
  262. return IRQ_NONE;
  263. }
  264. /* Ack the IRQ */
  265. w |= (1 << 3);
  266. omap_writew(w, OMAP1610_DMA_LCD_CTRL);
  267. lcd_dma.active = 0;
  268. if (lcd_dma.callback != NULL)
  269. lcd_dma.callback(w, lcd_dma.cb_data);
  270. return IRQ_HANDLED;
  271. }
  272. int omap_request_lcd_dma(void (*callback)(u16 status, void *data),
  273. void *data)
  274. {
  275. spin_lock_irq(&lcd_dma.lock);
  276. if (lcd_dma.reserved) {
  277. spin_unlock_irq(&lcd_dma.lock);
  278. printk(KERN_ERR "LCD DMA channel already reserved\n");
  279. BUG();
  280. return -EBUSY;
  281. }
  282. lcd_dma.reserved = 1;
  283. spin_unlock_irq(&lcd_dma.lock);
  284. lcd_dma.callback = callback;
  285. lcd_dma.cb_data = data;
  286. lcd_dma.active = 0;
  287. lcd_dma.single_transfer = 0;
  288. lcd_dma.rotate = 0;
  289. lcd_dma.vxres = 0;
  290. lcd_dma.mirror = 0;
  291. lcd_dma.xscale = 0;
  292. lcd_dma.yscale = 0;
  293. lcd_dma.ext_ctrl = 0;
  294. lcd_dma.src_port = 0;
  295. return 0;
  296. }
  297. EXPORT_SYMBOL(omap_request_lcd_dma);
  298. void omap_free_lcd_dma(void)
  299. {
  300. spin_lock(&lcd_dma.lock);
  301. if (!lcd_dma.reserved) {
  302. spin_unlock(&lcd_dma.lock);
  303. printk(KERN_ERR "LCD DMA is not reserved\n");
  304. BUG();
  305. return;
  306. }
  307. if (!cpu_is_omap15xx())
  308. omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
  309. OMAP1610_DMA_LCD_CCR);
  310. lcd_dma.reserved = 0;
  311. spin_unlock(&lcd_dma.lock);
  312. }
  313. EXPORT_SYMBOL(omap_free_lcd_dma);
  314. void omap_enable_lcd_dma(void)
  315. {
  316. u16 w;
  317. /*
  318. * Set the Enable bit only if an external controller is
  319. * connected. Otherwise the OMAP internal controller will
  320. * start the transfer when it gets enabled.
  321. */
  322. if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
  323. return;
  324. w = omap_readw(OMAP1610_DMA_LCD_CTRL);
  325. w |= 1 << 8;
  326. omap_writew(w, OMAP1610_DMA_LCD_CTRL);
  327. lcd_dma.active = 1;
  328. w = omap_readw(OMAP1610_DMA_LCD_CCR);
  329. w |= 1 << 7;
  330. omap_writew(w, OMAP1610_DMA_LCD_CCR);
  331. }
  332. EXPORT_SYMBOL(omap_enable_lcd_dma);
  333. void omap_setup_lcd_dma(void)
  334. {
  335. BUG_ON(lcd_dma.active);
  336. if (!cpu_is_omap15xx()) {
  337. /* Set some reasonable defaults */
  338. omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
  339. omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
  340. omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
  341. }
  342. set_b1_regs();
  343. if (!cpu_is_omap15xx()) {
  344. u16 w;
  345. w = omap_readw(OMAP1610_DMA_LCD_CCR);
  346. /*
  347. * If DMA was already active set the end_prog bit to have
  348. * the programmed register set loaded into the active
  349. * register set.
  350. */
  351. w |= 1 << 11; /* End_prog */
  352. if (!lcd_dma.single_transfer)
  353. w |= (3 << 8); /* Auto_init, repeat */
  354. omap_writew(w, OMAP1610_DMA_LCD_CCR);
  355. }
  356. }
  357. EXPORT_SYMBOL(omap_setup_lcd_dma);
  358. void omap_stop_lcd_dma(void)
  359. {
  360. u16 w;
  361. lcd_dma.active = 0;
  362. if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
  363. return;
  364. w = omap_readw(OMAP1610_DMA_LCD_CCR);
  365. w &= ~(1 << 7);
  366. omap_writew(w, OMAP1610_DMA_LCD_CCR);
  367. w = omap_readw(OMAP1610_DMA_LCD_CTRL);
  368. w &= ~(1 << 8);
  369. omap_writew(w, OMAP1610_DMA_LCD_CTRL);
  370. }
  371. EXPORT_SYMBOL(omap_stop_lcd_dma);
  372. static int __init omap_init_lcd_dma(void)
  373. {
  374. int r;
  375. if (!cpu_class_is_omap1())
  376. return -ENODEV;
  377. if (cpu_is_omap16xx()) {
  378. u16 w;
  379. /* this would prevent OMAP sleep */
  380. w = omap_readw(OMAP1610_DMA_LCD_CTRL);
  381. w &= ~(1 << 8);
  382. omap_writew(w, OMAP1610_DMA_LCD_CTRL);
  383. }
  384. spin_lock_init(&lcd_dma.lock);
  385. r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
  386. "LCD DMA", NULL);
  387. if (r != 0)
  388. printk(KERN_ERR "unable to request IRQ for LCD DMA "
  389. "(error %d)\n", r);
  390. return r;
  391. }
  392. arch_initcall(omap_init_lcd_dma);