imx51-dt.c 3.3 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/of_irq.h>
  14. #include <linux/of_platform.h>
  15. #include <linux/pinctrl/machine.h>
  16. #include <asm/mach/arch.h>
  17. #include <asm/mach/time.h>
  18. #include <mach/common.h>
  19. #include <mach/mx51.h>
  20. /*
  21. * Lookup table for attaching a specific name and platform_data pointer to
  22. * devices as they get created by of_platform_populate(). Ideally this table
  23. * would not exist, but the current clock implementation depends on some devices
  24. * having a specific name.
  25. */
  26. static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
  27. OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
  28. OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
  29. OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
  30. OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
  31. OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
  32. OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
  33. OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
  34. OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
  35. OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
  36. OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
  37. OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
  38. OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
  39. OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
  40. OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
  41. OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
  42. { /* sentinel */ }
  43. };
  44. static const struct of_device_id imx51_iomuxc_of_match[] __initconst = {
  45. { .compatible = "fsl,imx51-iomuxc-babbage", .data = imx51_babbage_common_init, },
  46. { /* sentinel */ }
  47. };
  48. static void __init imx51_dt_init(void)
  49. {
  50. struct device_node *node;
  51. const struct of_device_id *of_id;
  52. void (*func)(void);
  53. pinctrl_provide_dummies();
  54. node = of_find_matching_node(NULL, imx51_iomuxc_of_match);
  55. if (node) {
  56. of_id = of_match_node(imx51_iomuxc_of_match, node);
  57. func = of_id->data;
  58. func();
  59. of_node_put(node);
  60. }
  61. of_platform_populate(NULL, of_default_bus_match_table,
  62. imx51_auxdata_lookup, NULL);
  63. }
  64. static void __init imx51_timer_init(void)
  65. {
  66. mx51_clocks_init_dt();
  67. }
  68. static struct sys_timer imx51_timer = {
  69. .init = imx51_timer_init,
  70. };
  71. static const char *imx51_dt_board_compat[] __initdata = {
  72. "fsl,imx51-babbage",
  73. "fsl,imx51",
  74. NULL
  75. };
  76. DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
  77. .map_io = mx51_map_io,
  78. .init_early = imx51_init_early,
  79. .init_irq = mx51_init_irq,
  80. .handle_irq = imx51_handle_irq,
  81. .timer = &imx51_timer,
  82. .init_machine = imx51_dt_init,
  83. .init_late = imx51_init_late,
  84. .dt_compat = imx51_dt_board_compat,
  85. .restart = mxc_restart,
  86. MACHINE_END