clk-gate2.c 2.7 KB

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  1. /*
  2. * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
  3. * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Gated clock implementation
  10. */
  11. #include <linux/clk-provider.h>
  12. #include <linux/module.h>
  13. #include <linux/slab.h>
  14. #include <linux/io.h>
  15. #include <linux/err.h>
  16. #include <linux/string.h>
  17. /**
  18. * DOC: basic gatable clock which can gate and ungate it's ouput
  19. *
  20. * Traits of this clock:
  21. * prepare - clk_(un)prepare only ensures parent is (un)prepared
  22. * enable - clk_enable and clk_disable are functional & control gating
  23. * rate - inherits rate from parent. No clk_set_rate support
  24. * parent - fixed parent. No clk_set_parent support
  25. */
  26. #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
  27. static int clk_gate2_enable(struct clk_hw *hw)
  28. {
  29. struct clk_gate *gate = to_clk_gate(hw);
  30. u32 reg;
  31. unsigned long flags = 0;
  32. if (gate->lock)
  33. spin_lock_irqsave(gate->lock, flags);
  34. reg = readl(gate->reg);
  35. reg |= 3 << gate->bit_idx;
  36. writel(reg, gate->reg);
  37. if (gate->lock)
  38. spin_unlock_irqrestore(gate->lock, flags);
  39. return 0;
  40. }
  41. static void clk_gate2_disable(struct clk_hw *hw)
  42. {
  43. struct clk_gate *gate = to_clk_gate(hw);
  44. u32 reg;
  45. unsigned long flags = 0;
  46. if (gate->lock)
  47. spin_lock_irqsave(gate->lock, flags);
  48. reg = readl(gate->reg);
  49. reg &= ~(3 << gate->bit_idx);
  50. writel(reg, gate->reg);
  51. if (gate->lock)
  52. spin_unlock_irqrestore(gate->lock, flags);
  53. }
  54. static int clk_gate2_is_enabled(struct clk_hw *hw)
  55. {
  56. u32 reg;
  57. struct clk_gate *gate = to_clk_gate(hw);
  58. reg = readl(gate->reg);
  59. if (((reg >> gate->bit_idx) & 3) == 3)
  60. return 1;
  61. return 0;
  62. }
  63. static struct clk_ops clk_gate2_ops = {
  64. .enable = clk_gate2_enable,
  65. .disable = clk_gate2_disable,
  66. .is_enabled = clk_gate2_is_enabled,
  67. };
  68. struct clk *clk_register_gate2(struct device *dev, const char *name,
  69. const char *parent_name, unsigned long flags,
  70. void __iomem *reg, u8 bit_idx,
  71. u8 clk_gate2_flags, spinlock_t *lock)
  72. {
  73. struct clk_gate *gate;
  74. struct clk *clk;
  75. struct clk_init_data init;
  76. gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
  77. if (!gate)
  78. return ERR_PTR(-ENOMEM);
  79. /* struct clk_gate assignments */
  80. gate->reg = reg;
  81. gate->bit_idx = bit_idx;
  82. gate->flags = clk_gate2_flags;
  83. gate->lock = lock;
  84. init.name = name;
  85. init.ops = &clk_gate2_ops;
  86. init.flags = flags;
  87. init.parent_names = parent_name ? &parent_name : NULL;
  88. init.num_parents = parent_name ? 1 : 0;
  89. gate->hw.init = &init;
  90. clk = clk_register(dev, &gate->hw);
  91. if (IS_ERR(clk))
  92. kfree(clk);
  93. return clk;
  94. }