setup.c 26 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/export.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/kexec.h>
  23. #include <linux/of_fdt.h>
  24. #include <linux/root_dev.h>
  25. #include <linux/cpu.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/smp.h>
  28. #include <linux/fs.h>
  29. #include <linux/proc_fs.h>
  30. #include <linux/memblock.h>
  31. #include <linux/bug.h>
  32. #include <linux/compiler.h>
  33. #include <linux/sort.h>
  34. #include <asm/unified.h>
  35. #include <asm/cp15.h>
  36. #include <asm/cpu.h>
  37. #include <asm/cputype.h>
  38. #include <asm/elf.h>
  39. #include <asm/procinfo.h>
  40. #include <asm/sections.h>
  41. #include <asm/setup.h>
  42. #include <asm/smp_plat.h>
  43. #include <asm/mach-types.h>
  44. #include <asm/cacheflush.h>
  45. #include <asm/cachetype.h>
  46. #include <asm/tlbflush.h>
  47. #include <asm/prom.h>
  48. #include <asm/mach/arch.h>
  49. #include <asm/mach/irq.h>
  50. #include <asm/mach/time.h>
  51. #include <asm/system_info.h>
  52. #include <asm/system_misc.h>
  53. #include <asm/traps.h>
  54. #include <asm/unwind.h>
  55. #include <asm/memblock.h>
  56. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  57. #include "compat.h"
  58. #endif
  59. #include "atags.h"
  60. #include "tcm.h"
  61. #ifndef MEM_SIZE
  62. #define MEM_SIZE (16*1024*1024)
  63. #endif
  64. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  65. char fpe_type[8];
  66. static int __init fpe_setup(char *line)
  67. {
  68. memcpy(fpe_type, line, 8);
  69. return 1;
  70. }
  71. __setup("fpe=", fpe_setup);
  72. #endif
  73. extern void paging_init(struct machine_desc *desc);
  74. extern void sanity_check_meminfo(void);
  75. extern void reboot_setup(char *str);
  76. extern void setup_dma_zone(struct machine_desc *desc);
  77. unsigned int processor_id;
  78. EXPORT_SYMBOL(processor_id);
  79. unsigned int __machine_arch_type __read_mostly;
  80. EXPORT_SYMBOL(__machine_arch_type);
  81. unsigned int cacheid __read_mostly;
  82. EXPORT_SYMBOL(cacheid);
  83. unsigned int __atags_pointer __initdata;
  84. unsigned int system_rev;
  85. EXPORT_SYMBOL(system_rev);
  86. unsigned int system_serial_low;
  87. EXPORT_SYMBOL(system_serial_low);
  88. unsigned int system_serial_high;
  89. EXPORT_SYMBOL(system_serial_high);
  90. unsigned int elf_hwcap __read_mostly;
  91. EXPORT_SYMBOL(elf_hwcap);
  92. #ifdef MULTI_CPU
  93. struct processor processor __read_mostly;
  94. #endif
  95. #ifdef MULTI_TLB
  96. struct cpu_tlb_fns cpu_tlb __read_mostly;
  97. #endif
  98. #ifdef MULTI_USER
  99. struct cpu_user_fns cpu_user __read_mostly;
  100. #endif
  101. #ifdef MULTI_CACHE
  102. struct cpu_cache_fns cpu_cache __read_mostly;
  103. #endif
  104. #ifdef CONFIG_OUTER_CACHE
  105. struct outer_cache_fns outer_cache __read_mostly;
  106. EXPORT_SYMBOL(outer_cache);
  107. #endif
  108. /*
  109. * Cached cpu_architecture() result for use by assembler code.
  110. * C code should use the cpu_architecture() function instead of accessing this
  111. * variable directly.
  112. */
  113. int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
  114. struct stack {
  115. u32 irq[3];
  116. u32 abt[3];
  117. u32 und[3];
  118. } ____cacheline_aligned;
  119. static struct stack stacks[NR_CPUS];
  120. char elf_platform[ELF_PLATFORM_SIZE];
  121. EXPORT_SYMBOL(elf_platform);
  122. static const char *cpu_name;
  123. static const char *machine_name;
  124. static char __initdata cmd_line[COMMAND_LINE_SIZE];
  125. struct machine_desc *machine_desc __initdata;
  126. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  127. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  128. #define ENDIANNESS ((char)endian_test.l)
  129. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  130. /*
  131. * Standard memory resources
  132. */
  133. static struct resource mem_res[] = {
  134. {
  135. .name = "Video RAM",
  136. .start = 0,
  137. .end = 0,
  138. .flags = IORESOURCE_MEM
  139. },
  140. {
  141. .name = "Kernel code",
  142. .start = 0,
  143. .end = 0,
  144. .flags = IORESOURCE_MEM
  145. },
  146. {
  147. .name = "Kernel data",
  148. .start = 0,
  149. .end = 0,
  150. .flags = IORESOURCE_MEM
  151. }
  152. };
  153. #define video_ram mem_res[0]
  154. #define kernel_code mem_res[1]
  155. #define kernel_data mem_res[2]
  156. static struct resource io_res[] = {
  157. {
  158. .name = "reserved",
  159. .start = 0x3bc,
  160. .end = 0x3be,
  161. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  162. },
  163. {
  164. .name = "reserved",
  165. .start = 0x378,
  166. .end = 0x37f,
  167. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  168. },
  169. {
  170. .name = "reserved",
  171. .start = 0x278,
  172. .end = 0x27f,
  173. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  174. }
  175. };
  176. #define lp0 io_res[0]
  177. #define lp1 io_res[1]
  178. #define lp2 io_res[2]
  179. static const char *proc_arch[] = {
  180. "undefined/unknown",
  181. "3",
  182. "4",
  183. "4T",
  184. "5",
  185. "5T",
  186. "5TE",
  187. "5TEJ",
  188. "6TEJ",
  189. "7",
  190. "?(11)",
  191. "?(12)",
  192. "?(13)",
  193. "?(14)",
  194. "?(15)",
  195. "?(16)",
  196. "?(17)",
  197. };
  198. static int __get_cpu_architecture(void)
  199. {
  200. int cpu_arch;
  201. if ((read_cpuid_id() & 0x0008f000) == 0) {
  202. cpu_arch = CPU_ARCH_UNKNOWN;
  203. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  204. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  205. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  206. cpu_arch = (read_cpuid_id() >> 16) & 7;
  207. if (cpu_arch)
  208. cpu_arch += CPU_ARCH_ARMv3;
  209. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  210. unsigned int mmfr0;
  211. /* Revised CPUID format. Read the Memory Model Feature
  212. * Register 0 and check for VMSAv7 or PMSAv7 */
  213. asm("mrc p15, 0, %0, c0, c1, 4"
  214. : "=r" (mmfr0));
  215. if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
  216. (mmfr0 & 0x000000f0) >= 0x00000030)
  217. cpu_arch = CPU_ARCH_ARMv7;
  218. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  219. (mmfr0 & 0x000000f0) == 0x00000020)
  220. cpu_arch = CPU_ARCH_ARMv6;
  221. else
  222. cpu_arch = CPU_ARCH_UNKNOWN;
  223. } else
  224. cpu_arch = CPU_ARCH_UNKNOWN;
  225. return cpu_arch;
  226. }
  227. int __pure cpu_architecture(void)
  228. {
  229. BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
  230. return __cpu_architecture;
  231. }
  232. static int cpu_has_aliasing_icache(unsigned int arch)
  233. {
  234. int aliasing_icache;
  235. unsigned int id_reg, num_sets, line_size;
  236. /* PIPT caches never alias. */
  237. if (icache_is_pipt())
  238. return 0;
  239. /* arch specifies the register format */
  240. switch (arch) {
  241. case CPU_ARCH_ARMv7:
  242. asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
  243. : /* No output operands */
  244. : "r" (1));
  245. isb();
  246. asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
  247. : "=r" (id_reg));
  248. line_size = 4 << ((id_reg & 0x7) + 2);
  249. num_sets = ((id_reg >> 13) & 0x7fff) + 1;
  250. aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
  251. break;
  252. case CPU_ARCH_ARMv6:
  253. aliasing_icache = read_cpuid_cachetype() & (1 << 11);
  254. break;
  255. default:
  256. /* I-cache aliases will be handled by D-cache aliasing code */
  257. aliasing_icache = 0;
  258. }
  259. return aliasing_icache;
  260. }
  261. static void __init cacheid_init(void)
  262. {
  263. unsigned int cachetype = read_cpuid_cachetype();
  264. unsigned int arch = cpu_architecture();
  265. if (arch >= CPU_ARCH_ARMv6) {
  266. if ((cachetype & (7 << 29)) == 4 << 29) {
  267. /* ARMv7 register format */
  268. arch = CPU_ARCH_ARMv7;
  269. cacheid = CACHEID_VIPT_NONALIASING;
  270. switch (cachetype & (3 << 14)) {
  271. case (1 << 14):
  272. cacheid |= CACHEID_ASID_TAGGED;
  273. break;
  274. case (3 << 14):
  275. cacheid |= CACHEID_PIPT;
  276. break;
  277. }
  278. } else {
  279. arch = CPU_ARCH_ARMv6;
  280. if (cachetype & (1 << 23))
  281. cacheid = CACHEID_VIPT_ALIASING;
  282. else
  283. cacheid = CACHEID_VIPT_NONALIASING;
  284. }
  285. if (cpu_has_aliasing_icache(arch))
  286. cacheid |= CACHEID_VIPT_I_ALIASING;
  287. } else {
  288. cacheid = CACHEID_VIVT;
  289. }
  290. printk("CPU: %s data cache, %s instruction cache\n",
  291. cache_is_vivt() ? "VIVT" :
  292. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  293. cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
  294. cache_is_vivt() ? "VIVT" :
  295. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  296. icache_is_vipt_aliasing() ? "VIPT aliasing" :
  297. icache_is_pipt() ? "PIPT" :
  298. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  299. }
  300. /*
  301. * These functions re-use the assembly code in head.S, which
  302. * already provide the required functionality.
  303. */
  304. extern struct proc_info_list *lookup_processor_type(unsigned int);
  305. void __init early_print(const char *str, ...)
  306. {
  307. extern void printascii(const char *);
  308. char buf[256];
  309. va_list ap;
  310. va_start(ap, str);
  311. vsnprintf(buf, sizeof(buf), str, ap);
  312. va_end(ap);
  313. #ifdef CONFIG_DEBUG_LL
  314. printascii(buf);
  315. #endif
  316. printk("%s", buf);
  317. }
  318. static void __init feat_v6_fixup(void)
  319. {
  320. int id = read_cpuid_id();
  321. if ((id & 0xff0f0000) != 0x41070000)
  322. return;
  323. /*
  324. * HWCAP_TLS is available only on 1136 r1p0 and later,
  325. * see also kuser_get_tls_init.
  326. */
  327. if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
  328. elf_hwcap &= ~HWCAP_TLS;
  329. }
  330. /*
  331. * cpu_init - initialise one CPU.
  332. *
  333. * cpu_init sets up the per-CPU stacks.
  334. */
  335. void cpu_init(void)
  336. {
  337. unsigned int cpu = smp_processor_id();
  338. struct stack *stk = &stacks[cpu];
  339. if (cpu >= NR_CPUS) {
  340. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  341. BUG();
  342. }
  343. cpu_proc_init();
  344. /*
  345. * Define the placement constraint for the inline asm directive below.
  346. * In Thumb-2, msr with an immediate value is not allowed.
  347. */
  348. #ifdef CONFIG_THUMB2_KERNEL
  349. #define PLC "r"
  350. #else
  351. #define PLC "I"
  352. #endif
  353. /*
  354. * setup stacks for re-entrant exception handlers
  355. */
  356. __asm__ (
  357. "msr cpsr_c, %1\n\t"
  358. "add r14, %0, %2\n\t"
  359. "mov sp, r14\n\t"
  360. "msr cpsr_c, %3\n\t"
  361. "add r14, %0, %4\n\t"
  362. "mov sp, r14\n\t"
  363. "msr cpsr_c, %5\n\t"
  364. "add r14, %0, %6\n\t"
  365. "mov sp, r14\n\t"
  366. "msr cpsr_c, %7"
  367. :
  368. : "r" (stk),
  369. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  370. "I" (offsetof(struct stack, irq[0])),
  371. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  372. "I" (offsetof(struct stack, abt[0])),
  373. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  374. "I" (offsetof(struct stack, und[0])),
  375. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  376. : "r14");
  377. }
  378. int __cpu_logical_map[NR_CPUS];
  379. void __init smp_setup_processor_id(void)
  380. {
  381. int i;
  382. u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
  383. cpu_logical_map(0) = cpu;
  384. for (i = 1; i < NR_CPUS; ++i)
  385. cpu_logical_map(i) = i == cpu ? 0 : i;
  386. printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
  387. }
  388. static void __init setup_processor(void)
  389. {
  390. struct proc_info_list *list;
  391. /*
  392. * locate processor in the list of supported processor
  393. * types. The linker builds this table for us from the
  394. * entries in arch/arm/mm/proc-*.S
  395. */
  396. list = lookup_processor_type(read_cpuid_id());
  397. if (!list) {
  398. printk("CPU configuration botched (ID %08x), unable "
  399. "to continue.\n", read_cpuid_id());
  400. while (1);
  401. }
  402. cpu_name = list->cpu_name;
  403. __cpu_architecture = __get_cpu_architecture();
  404. #ifdef MULTI_CPU
  405. processor = *list->proc;
  406. #endif
  407. #ifdef MULTI_TLB
  408. cpu_tlb = *list->tlb;
  409. #endif
  410. #ifdef MULTI_USER
  411. cpu_user = *list->user;
  412. #endif
  413. #ifdef MULTI_CACHE
  414. cpu_cache = *list->cache;
  415. #endif
  416. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  417. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  418. proc_arch[cpu_architecture()], cr_alignment);
  419. snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
  420. list->arch_name, ENDIANNESS);
  421. snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
  422. list->elf_name, ENDIANNESS);
  423. elf_hwcap = list->elf_hwcap;
  424. #ifndef CONFIG_ARM_THUMB
  425. elf_hwcap &= ~HWCAP_THUMB;
  426. #endif
  427. feat_v6_fixup();
  428. cacheid_init();
  429. cpu_init();
  430. }
  431. void __init dump_machine_table(void)
  432. {
  433. struct machine_desc *p;
  434. early_print("Available machine support:\n\nID (hex)\tNAME\n");
  435. for_each_machine_desc(p)
  436. early_print("%08x\t%s\n", p->nr, p->name);
  437. early_print("\nPlease check your kernel config and/or bootloader.\n");
  438. while (true)
  439. /* can't use cpu_relax() here as it may require MMU setup */;
  440. }
  441. int __init arm_add_memory(phys_addr_t start, phys_addr_t size)
  442. {
  443. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  444. if (meminfo.nr_banks >= NR_BANKS) {
  445. printk(KERN_CRIT "NR_BANKS too low, "
  446. "ignoring memory at 0x%08llx\n", (long long)start);
  447. return -EINVAL;
  448. }
  449. /*
  450. * Ensure that start/size are aligned to a page boundary.
  451. * Size is appropriately rounded down, start is rounded up.
  452. */
  453. size -= start & ~PAGE_MASK;
  454. bank->start = PAGE_ALIGN(start);
  455. #ifndef CONFIG_LPAE
  456. if (bank->start + size < bank->start) {
  457. printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
  458. "32-bit physical address space\n", (long long)start);
  459. /*
  460. * To ensure bank->start + bank->size is representable in
  461. * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
  462. * This means we lose a page after masking.
  463. */
  464. size = ULONG_MAX - bank->start;
  465. }
  466. #endif
  467. bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
  468. /*
  469. * Check whether this memory region has non-zero size or
  470. * invalid node number.
  471. */
  472. if (bank->size == 0)
  473. return -EINVAL;
  474. meminfo.nr_banks++;
  475. return 0;
  476. }
  477. /*
  478. * Pick out the memory size. We look for mem=size@start,
  479. * where start and size are "size[KkMm]"
  480. */
  481. static int __init early_mem(char *p)
  482. {
  483. static int usermem __initdata = 0;
  484. phys_addr_t size;
  485. phys_addr_t start;
  486. char *endp;
  487. /*
  488. * If the user specifies memory size, we
  489. * blow away any automatically generated
  490. * size.
  491. */
  492. if (usermem == 0) {
  493. usermem = 1;
  494. meminfo.nr_banks = 0;
  495. }
  496. start = PHYS_OFFSET;
  497. size = memparse(p, &endp);
  498. if (*endp == '@')
  499. start = memparse(endp + 1, NULL);
  500. arm_add_memory(start, size);
  501. return 0;
  502. }
  503. early_param("mem", early_mem);
  504. static void __init
  505. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  506. {
  507. #ifdef CONFIG_BLK_DEV_RAM
  508. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  509. rd_image_start = image_start;
  510. rd_prompt = prompt;
  511. rd_doload = doload;
  512. if (rd_sz)
  513. rd_size = rd_sz;
  514. #endif
  515. }
  516. static void __init request_standard_resources(struct machine_desc *mdesc)
  517. {
  518. struct memblock_region *region;
  519. struct resource *res;
  520. kernel_code.start = virt_to_phys(_text);
  521. kernel_code.end = virt_to_phys(_etext - 1);
  522. kernel_data.start = virt_to_phys(_sdata);
  523. kernel_data.end = virt_to_phys(_end - 1);
  524. for_each_memblock(memory, region) {
  525. res = alloc_bootmem_low(sizeof(*res));
  526. res->name = "System RAM";
  527. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  528. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  529. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  530. request_resource(&iomem_resource, res);
  531. if (kernel_code.start >= res->start &&
  532. kernel_code.end <= res->end)
  533. request_resource(res, &kernel_code);
  534. if (kernel_data.start >= res->start &&
  535. kernel_data.end <= res->end)
  536. request_resource(res, &kernel_data);
  537. }
  538. if (mdesc->video_start) {
  539. video_ram.start = mdesc->video_start;
  540. video_ram.end = mdesc->video_end;
  541. request_resource(&iomem_resource, &video_ram);
  542. }
  543. /*
  544. * Some machines don't have the possibility of ever
  545. * possessing lp0, lp1 or lp2
  546. */
  547. if (mdesc->reserve_lp0)
  548. request_resource(&ioport_resource, &lp0);
  549. if (mdesc->reserve_lp1)
  550. request_resource(&ioport_resource, &lp1);
  551. if (mdesc->reserve_lp2)
  552. request_resource(&ioport_resource, &lp2);
  553. }
  554. /*
  555. * Tag parsing.
  556. *
  557. * This is the new way of passing data to the kernel at boot time. Rather
  558. * than passing a fixed inflexible structure to the kernel, we pass a list
  559. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  560. * tag for the list to be recognised (to distinguish the tagged list from
  561. * a param_struct). The list is terminated with a zero-length tag (this tag
  562. * is not parsed in any way).
  563. */
  564. static int __init parse_tag_core(const struct tag *tag)
  565. {
  566. if (tag->hdr.size > 2) {
  567. if ((tag->u.core.flags & 1) == 0)
  568. root_mountflags &= ~MS_RDONLY;
  569. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  570. }
  571. return 0;
  572. }
  573. __tagtable(ATAG_CORE, parse_tag_core);
  574. static int __init parse_tag_mem32(const struct tag *tag)
  575. {
  576. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  577. }
  578. __tagtable(ATAG_MEM, parse_tag_mem32);
  579. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  580. struct screen_info screen_info = {
  581. .orig_video_lines = 30,
  582. .orig_video_cols = 80,
  583. .orig_video_mode = 0,
  584. .orig_video_ega_bx = 0,
  585. .orig_video_isVGA = 1,
  586. .orig_video_points = 8
  587. };
  588. static int __init parse_tag_videotext(const struct tag *tag)
  589. {
  590. screen_info.orig_x = tag->u.videotext.x;
  591. screen_info.orig_y = tag->u.videotext.y;
  592. screen_info.orig_video_page = tag->u.videotext.video_page;
  593. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  594. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  595. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  596. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  597. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  598. screen_info.orig_video_points = tag->u.videotext.video_points;
  599. return 0;
  600. }
  601. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  602. #endif
  603. static int __init parse_tag_ramdisk(const struct tag *tag)
  604. {
  605. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  606. (tag->u.ramdisk.flags & 2) == 0,
  607. tag->u.ramdisk.start, tag->u.ramdisk.size);
  608. return 0;
  609. }
  610. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  611. static int __init parse_tag_serialnr(const struct tag *tag)
  612. {
  613. system_serial_low = tag->u.serialnr.low;
  614. system_serial_high = tag->u.serialnr.high;
  615. return 0;
  616. }
  617. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  618. static int __init parse_tag_revision(const struct tag *tag)
  619. {
  620. system_rev = tag->u.revision.rev;
  621. return 0;
  622. }
  623. __tagtable(ATAG_REVISION, parse_tag_revision);
  624. static int __init parse_tag_cmdline(const struct tag *tag)
  625. {
  626. #if defined(CONFIG_CMDLINE_EXTEND)
  627. strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
  628. strlcat(default_command_line, tag->u.cmdline.cmdline,
  629. COMMAND_LINE_SIZE);
  630. #elif defined(CONFIG_CMDLINE_FORCE)
  631. pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
  632. #else
  633. strlcpy(default_command_line, tag->u.cmdline.cmdline,
  634. COMMAND_LINE_SIZE);
  635. #endif
  636. return 0;
  637. }
  638. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  639. /*
  640. * Scan the tag table for this tag, and call its parse function.
  641. * The tag table is built by the linker from all the __tagtable
  642. * declarations.
  643. */
  644. static int __init parse_tag(const struct tag *tag)
  645. {
  646. extern struct tagtable __tagtable_begin, __tagtable_end;
  647. struct tagtable *t;
  648. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  649. if (tag->hdr.tag == t->tag) {
  650. t->parse(tag);
  651. break;
  652. }
  653. return t < &__tagtable_end;
  654. }
  655. /*
  656. * Parse all tags in the list, checking both the global and architecture
  657. * specific tag tables.
  658. */
  659. static void __init parse_tags(const struct tag *t)
  660. {
  661. for (; t->hdr.size; t = tag_next(t))
  662. if (!parse_tag(t))
  663. printk(KERN_WARNING
  664. "Ignoring unrecognised tag 0x%08x\n",
  665. t->hdr.tag);
  666. }
  667. /*
  668. * This holds our defaults.
  669. */
  670. static struct init_tags {
  671. struct tag_header hdr1;
  672. struct tag_core core;
  673. struct tag_header hdr2;
  674. struct tag_mem32 mem;
  675. struct tag_header hdr3;
  676. } init_tags __initdata = {
  677. { tag_size(tag_core), ATAG_CORE },
  678. { 1, PAGE_SIZE, 0xff },
  679. { tag_size(tag_mem32), ATAG_MEM },
  680. { MEM_SIZE },
  681. { 0, ATAG_NONE }
  682. };
  683. static int __init customize_machine(void)
  684. {
  685. /* customizes platform devices, or adds new ones */
  686. if (machine_desc->init_machine)
  687. machine_desc->init_machine();
  688. return 0;
  689. }
  690. arch_initcall(customize_machine);
  691. static int __init init_machine_late(void)
  692. {
  693. if (machine_desc->init_late)
  694. machine_desc->init_late();
  695. return 0;
  696. }
  697. late_initcall(init_machine_late);
  698. #ifdef CONFIG_KEXEC
  699. static inline unsigned long long get_total_mem(void)
  700. {
  701. unsigned long total;
  702. total = max_low_pfn - min_low_pfn;
  703. return total << PAGE_SHIFT;
  704. }
  705. /**
  706. * reserve_crashkernel() - reserves memory are for crash kernel
  707. *
  708. * This function reserves memory area given in "crashkernel=" kernel command
  709. * line parameter. The memory reserved is used by a dump capture kernel when
  710. * primary kernel is crashing.
  711. */
  712. static void __init reserve_crashkernel(void)
  713. {
  714. unsigned long long crash_size, crash_base;
  715. unsigned long long total_mem;
  716. int ret;
  717. total_mem = get_total_mem();
  718. ret = parse_crashkernel(boot_command_line, total_mem,
  719. &crash_size, &crash_base);
  720. if (ret)
  721. return;
  722. ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
  723. if (ret < 0) {
  724. printk(KERN_WARNING "crashkernel reservation failed - "
  725. "memory is in use (0x%lx)\n", (unsigned long)crash_base);
  726. return;
  727. }
  728. printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
  729. "for crashkernel (System RAM: %ldMB)\n",
  730. (unsigned long)(crash_size >> 20),
  731. (unsigned long)(crash_base >> 20),
  732. (unsigned long)(total_mem >> 20));
  733. crashk_res.start = crash_base;
  734. crashk_res.end = crash_base + crash_size - 1;
  735. insert_resource(&iomem_resource, &crashk_res);
  736. }
  737. #else
  738. static inline void reserve_crashkernel(void) {}
  739. #endif /* CONFIG_KEXEC */
  740. static void __init squash_mem_tags(struct tag *tag)
  741. {
  742. for (; tag->hdr.size; tag = tag_next(tag))
  743. if (tag->hdr.tag == ATAG_MEM)
  744. tag->hdr.tag = ATAG_NONE;
  745. }
  746. static struct machine_desc * __init setup_machine_tags(unsigned int nr)
  747. {
  748. struct tag *tags = (struct tag *)&init_tags;
  749. struct machine_desc *mdesc = NULL, *p;
  750. char *from = default_command_line;
  751. init_tags.mem.start = PHYS_OFFSET;
  752. /*
  753. * locate machine in the list of supported machines.
  754. */
  755. for_each_machine_desc(p)
  756. if (nr == p->nr) {
  757. printk("Machine: %s\n", p->name);
  758. mdesc = p;
  759. break;
  760. }
  761. if (!mdesc) {
  762. early_print("\nError: unrecognized/unsupported machine ID"
  763. " (r1 = 0x%08x).\n\n", nr);
  764. dump_machine_table(); /* does not return */
  765. }
  766. if (__atags_pointer)
  767. tags = phys_to_virt(__atags_pointer);
  768. else if (mdesc->atag_offset)
  769. tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
  770. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  771. /*
  772. * If we have the old style parameters, convert them to
  773. * a tag list.
  774. */
  775. if (tags->hdr.tag != ATAG_CORE)
  776. convert_to_tag_list(tags);
  777. #endif
  778. if (tags->hdr.tag != ATAG_CORE) {
  779. #if defined(CONFIG_OF)
  780. /*
  781. * If CONFIG_OF is set, then assume this is a reasonably
  782. * modern system that should pass boot parameters
  783. */
  784. early_print("Warning: Neither atags nor dtb found\n");
  785. #endif
  786. tags = (struct tag *)&init_tags;
  787. }
  788. if (mdesc->fixup)
  789. mdesc->fixup(tags, &from, &meminfo);
  790. if (tags->hdr.tag == ATAG_CORE) {
  791. if (meminfo.nr_banks != 0)
  792. squash_mem_tags(tags);
  793. save_atags(tags);
  794. parse_tags(tags);
  795. }
  796. /* parse_early_param needs a boot_command_line */
  797. strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  798. return mdesc;
  799. }
  800. static int __init meminfo_cmp(const void *_a, const void *_b)
  801. {
  802. const struct membank *a = _a, *b = _b;
  803. long cmp = bank_pfn_start(a) - bank_pfn_start(b);
  804. return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
  805. }
  806. void __init setup_arch(char **cmdline_p)
  807. {
  808. struct machine_desc *mdesc;
  809. setup_processor();
  810. mdesc = setup_machine_fdt(__atags_pointer);
  811. if (!mdesc)
  812. mdesc = setup_machine_tags(machine_arch_type);
  813. machine_desc = mdesc;
  814. machine_name = mdesc->name;
  815. setup_dma_zone(mdesc);
  816. if (mdesc->restart_mode)
  817. reboot_setup(&mdesc->restart_mode);
  818. init_mm.start_code = (unsigned long) _text;
  819. init_mm.end_code = (unsigned long) _etext;
  820. init_mm.end_data = (unsigned long) _edata;
  821. init_mm.brk = (unsigned long) _end;
  822. /* populate cmd_line too for later use, preserving boot_command_line */
  823. strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
  824. *cmdline_p = cmd_line;
  825. parse_early_param();
  826. sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
  827. sanity_check_meminfo();
  828. arm_memblock_init(&meminfo, mdesc);
  829. paging_init(mdesc);
  830. request_standard_resources(mdesc);
  831. if (mdesc->restart)
  832. arm_pm_restart = mdesc->restart;
  833. unflatten_device_tree();
  834. #ifdef CONFIG_SMP
  835. if (is_smp())
  836. smp_init_cpus();
  837. #endif
  838. reserve_crashkernel();
  839. tcm_init();
  840. #ifdef CONFIG_MULTI_IRQ_HANDLER
  841. handle_arch_irq = mdesc->handle_irq;
  842. #endif
  843. #ifdef CONFIG_VT
  844. #if defined(CONFIG_VGA_CONSOLE)
  845. conswitchp = &vga_con;
  846. #elif defined(CONFIG_DUMMY_CONSOLE)
  847. conswitchp = &dummy_con;
  848. #endif
  849. #endif
  850. if (mdesc->init_early)
  851. mdesc->init_early();
  852. }
  853. static int __init topology_init(void)
  854. {
  855. int cpu;
  856. for_each_possible_cpu(cpu) {
  857. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  858. cpuinfo->cpu.hotpluggable = 1;
  859. register_cpu(&cpuinfo->cpu, cpu);
  860. }
  861. return 0;
  862. }
  863. subsys_initcall(topology_init);
  864. #ifdef CONFIG_HAVE_PROC_CPU
  865. static int __init proc_cpu_init(void)
  866. {
  867. struct proc_dir_entry *res;
  868. res = proc_mkdir("cpu", NULL);
  869. if (!res)
  870. return -ENOMEM;
  871. return 0;
  872. }
  873. fs_initcall(proc_cpu_init);
  874. #endif
  875. static const char *hwcap_str[] = {
  876. "swp",
  877. "half",
  878. "thumb",
  879. "26bit",
  880. "fastmult",
  881. "fpa",
  882. "vfp",
  883. "edsp",
  884. "java",
  885. "iwmmxt",
  886. "crunch",
  887. "thumbee",
  888. "neon",
  889. "vfpv3",
  890. "vfpv3d16",
  891. "tls",
  892. "vfpv4",
  893. "idiva",
  894. "idivt",
  895. NULL
  896. };
  897. static int c_show(struct seq_file *m, void *v)
  898. {
  899. int i;
  900. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  901. cpu_name, read_cpuid_id() & 15, elf_platform);
  902. #if defined(CONFIG_SMP)
  903. for_each_online_cpu(i) {
  904. /*
  905. * glibc reads /proc/cpuinfo to determine the number of
  906. * online processors, looking for lines beginning with
  907. * "processor". Give glibc what it expects.
  908. */
  909. seq_printf(m, "processor\t: %d\n", i);
  910. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  911. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  912. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  913. }
  914. #else /* CONFIG_SMP */
  915. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  916. loops_per_jiffy / (500000/HZ),
  917. (loops_per_jiffy / (5000/HZ)) % 100);
  918. #endif
  919. /* dump out the processor features */
  920. seq_puts(m, "Features\t: ");
  921. for (i = 0; hwcap_str[i]; i++)
  922. if (elf_hwcap & (1 << i))
  923. seq_printf(m, "%s ", hwcap_str[i]);
  924. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  925. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  926. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  927. /* pre-ARM7 */
  928. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  929. } else {
  930. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  931. /* ARM7 */
  932. seq_printf(m, "CPU variant\t: 0x%02x\n",
  933. (read_cpuid_id() >> 16) & 127);
  934. } else {
  935. /* post-ARM7 */
  936. seq_printf(m, "CPU variant\t: 0x%x\n",
  937. (read_cpuid_id() >> 20) & 15);
  938. }
  939. seq_printf(m, "CPU part\t: 0x%03x\n",
  940. (read_cpuid_id() >> 4) & 0xfff);
  941. }
  942. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  943. seq_puts(m, "\n");
  944. seq_printf(m, "Hardware\t: %s\n", machine_name);
  945. seq_printf(m, "Revision\t: %04x\n", system_rev);
  946. seq_printf(m, "Serial\t\t: %08x%08x\n",
  947. system_serial_high, system_serial_low);
  948. return 0;
  949. }
  950. static void *c_start(struct seq_file *m, loff_t *pos)
  951. {
  952. return *pos < 1 ? (void *)1 : NULL;
  953. }
  954. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  955. {
  956. ++*pos;
  957. return NULL;
  958. }
  959. static void c_stop(struct seq_file *m, void *v)
  960. {
  961. }
  962. const struct seq_operations cpuinfo_op = {
  963. .start = c_start,
  964. .next = c_next,
  965. .stop = c_stop,
  966. .show = c_show
  967. };