vexpress-v2m.dtsi 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211
  1. /*
  2. * ARM Ltd. Versatile Express
  3. *
  4. * Motherboard Express uATX
  5. * V2M-P1
  6. *
  7. * HBI-0190D
  8. *
  9. * Original memory map ("Legacy memory map" in the board's
  10. * Technical Reference Manual)
  11. *
  12. * WARNING! The hardware described in this file is independent from the
  13. * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
  14. * correspondence between the two configurations.
  15. *
  16. * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
  17. * CHANGES TO vexpress-v2m-rs1.dtsi!
  18. */
  19. / {
  20. aliases {
  21. arm,v2m_timer = &v2m_timer01;
  22. };
  23. motherboard {
  24. compatible = "simple-bus";
  25. #address-cells = <2>; /* SMB chipselect number and offset */
  26. #size-cells = <1>;
  27. #interrupt-cells = <1>;
  28. flash@0,00000000 {
  29. compatible = "arm,vexpress-flash", "cfi-flash";
  30. reg = <0 0x00000000 0x04000000>,
  31. <1 0x00000000 0x04000000>;
  32. bank-width = <4>;
  33. };
  34. psram@2,00000000 {
  35. compatible = "arm,vexpress-psram", "mtd-ram";
  36. reg = <2 0x00000000 0x02000000>;
  37. bank-width = <4>;
  38. };
  39. vram@3,00000000 {
  40. compatible = "arm,vexpress-vram";
  41. reg = <3 0x00000000 0x00800000>;
  42. };
  43. ethernet@3,02000000 {
  44. compatible = "smsc,lan9118", "smsc,lan9115";
  45. reg = <3 0x02000000 0x10000>;
  46. interrupts = <15>;
  47. phy-mode = "mii";
  48. reg-io-width = <4>;
  49. smsc,irq-active-high;
  50. smsc,irq-push-pull;
  51. vdd33a-supply = <&v2m_fixed_3v3>;
  52. vddvario-supply = <&v2m_fixed_3v3>;
  53. };
  54. usb@3,03000000 {
  55. compatible = "nxp,usb-isp1761";
  56. reg = <3 0x03000000 0x20000>;
  57. interrupts = <16>;
  58. port1-otg;
  59. };
  60. iofpga@7,00000000 {
  61. compatible = "arm,amba-bus", "simple-bus";
  62. #address-cells = <1>;
  63. #size-cells = <1>;
  64. ranges = <0 7 0 0x20000>;
  65. sysreg@00000 {
  66. compatible = "arm,vexpress-sysreg";
  67. reg = <0x00000 0x1000>;
  68. };
  69. sysctl@01000 {
  70. compatible = "arm,sp810", "arm,primecell";
  71. reg = <0x01000 0x1000>;
  72. };
  73. /* PCI-E I2C bus */
  74. v2m_i2c_pcie: i2c@02000 {
  75. compatible = "arm,versatile-i2c";
  76. reg = <0x02000 0x1000>;
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. pcie-switch@60 {
  80. compatible = "idt,89hpes32h8";
  81. reg = <0x60>;
  82. };
  83. };
  84. aaci@04000 {
  85. compatible = "arm,pl041", "arm,primecell";
  86. reg = <0x04000 0x1000>;
  87. interrupts = <11>;
  88. };
  89. mmci@05000 {
  90. compatible = "arm,pl180", "arm,primecell";
  91. reg = <0x05000 0x1000>;
  92. interrupts = <9 10>;
  93. };
  94. kmi@06000 {
  95. compatible = "arm,pl050", "arm,primecell";
  96. reg = <0x06000 0x1000>;
  97. interrupts = <12>;
  98. };
  99. kmi@07000 {
  100. compatible = "arm,pl050", "arm,primecell";
  101. reg = <0x07000 0x1000>;
  102. interrupts = <13>;
  103. };
  104. v2m_serial0: uart@09000 {
  105. compatible = "arm,pl011", "arm,primecell";
  106. reg = <0x09000 0x1000>;
  107. interrupts = <5>;
  108. };
  109. v2m_serial1: uart@0a000 {
  110. compatible = "arm,pl011", "arm,primecell";
  111. reg = <0x0a000 0x1000>;
  112. interrupts = <6>;
  113. };
  114. v2m_serial2: uart@0b000 {
  115. compatible = "arm,pl011", "arm,primecell";
  116. reg = <0x0b000 0x1000>;
  117. interrupts = <7>;
  118. };
  119. v2m_serial3: uart@0c000 {
  120. compatible = "arm,pl011", "arm,primecell";
  121. reg = <0x0c000 0x1000>;
  122. interrupts = <8>;
  123. };
  124. wdt@0f000 {
  125. compatible = "arm,sp805", "arm,primecell";
  126. reg = <0x0f000 0x1000>;
  127. interrupts = <0>;
  128. };
  129. v2m_timer01: timer@11000 {
  130. compatible = "arm,sp804", "arm,primecell";
  131. reg = <0x11000 0x1000>;
  132. interrupts = <2>;
  133. };
  134. v2m_timer23: timer@12000 {
  135. compatible = "arm,sp804", "arm,primecell";
  136. reg = <0x12000 0x1000>;
  137. interrupts = <3>;
  138. };
  139. /* DVI I2C bus */
  140. v2m_i2c_dvi: i2c@16000 {
  141. compatible = "arm,versatile-i2c";
  142. reg = <0x16000 0x1000>;
  143. #address-cells = <1>;
  144. #size-cells = <0>;
  145. dvi-transmitter@39 {
  146. compatible = "sil,sii9022-tpi", "sil,sii9022";
  147. reg = <0x39>;
  148. };
  149. dvi-transmitter@60 {
  150. compatible = "sil,sii9022-cpi", "sil,sii9022";
  151. reg = <0x60>;
  152. };
  153. };
  154. rtc@17000 {
  155. compatible = "arm,pl031", "arm,primecell";
  156. reg = <0x17000 0x1000>;
  157. interrupts = <4>;
  158. };
  159. compact-flash@1a000 {
  160. compatible = "arm,vexpress-cf", "ata-generic";
  161. reg = <0x1a000 0x100
  162. 0x1a100 0xf00>;
  163. reg-shift = <2>;
  164. };
  165. clcd@1f000 {
  166. compatible = "arm,pl111", "arm,primecell";
  167. reg = <0x1f000 0x1000>;
  168. interrupts = <14>;
  169. };
  170. };
  171. v2m_fixed_3v3: fixedregulator@0 {
  172. compatible = "regulator-fixed";
  173. regulator-name = "3V3";
  174. regulator-min-microvolt = <3300000>;
  175. regulator-max-microvolt = <3300000>;
  176. regulator-always-on;
  177. };
  178. };
  179. };