tegra20-seaboard.dts 11 KB

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  1. /dts-v1/;
  2. /include/ "tegra20.dtsi"
  3. / {
  4. model = "NVIDIA Seaboard";
  5. compatible = "nvidia,seaboard", "nvidia,tegra20";
  6. memory {
  7. reg = <0x00000000 0x40000000>;
  8. };
  9. pinmux {
  10. pinctrl-names = "default";
  11. pinctrl-0 = <&state_default>;
  12. state_default: pinmux {
  13. ata {
  14. nvidia,pins = "ata";
  15. nvidia,function = "ide";
  16. };
  17. atb {
  18. nvidia,pins = "atb", "gma", "gme";
  19. nvidia,function = "sdio4";
  20. };
  21. atc {
  22. nvidia,pins = "atc";
  23. nvidia,function = "nand";
  24. };
  25. atd {
  26. nvidia,pins = "atd", "ate", "gmb", "spia",
  27. "spib", "spic";
  28. nvidia,function = "gmi";
  29. };
  30. cdev1 {
  31. nvidia,pins = "cdev1";
  32. nvidia,function = "plla_out";
  33. };
  34. cdev2 {
  35. nvidia,pins = "cdev2";
  36. nvidia,function = "pllp_out4";
  37. };
  38. crtp {
  39. nvidia,pins = "crtp", "lm1";
  40. nvidia,function = "crt";
  41. };
  42. csus {
  43. nvidia,pins = "csus";
  44. nvidia,function = "vi_sensor_clk";
  45. };
  46. dap1 {
  47. nvidia,pins = "dap1";
  48. nvidia,function = "dap1";
  49. };
  50. dap2 {
  51. nvidia,pins = "dap2";
  52. nvidia,function = "dap2";
  53. };
  54. dap3 {
  55. nvidia,pins = "dap3";
  56. nvidia,function = "dap3";
  57. };
  58. dap4 {
  59. nvidia,pins = "dap4";
  60. nvidia,function = "dap4";
  61. };
  62. dta {
  63. nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  64. nvidia,function = "vi";
  65. };
  66. dtf {
  67. nvidia,pins = "dtf";
  68. nvidia,function = "i2c3";
  69. };
  70. gmc {
  71. nvidia,pins = "gmc";
  72. nvidia,function = "uartd";
  73. };
  74. gmd {
  75. nvidia,pins = "gmd";
  76. nvidia,function = "sflash";
  77. };
  78. gpu {
  79. nvidia,pins = "gpu";
  80. nvidia,function = "pwm";
  81. };
  82. gpu7 {
  83. nvidia,pins = "gpu7";
  84. nvidia,function = "rtck";
  85. };
  86. gpv {
  87. nvidia,pins = "gpv", "slxa", "slxk";
  88. nvidia,function = "pcie";
  89. };
  90. hdint {
  91. nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
  92. "lsck", "lsda";
  93. nvidia,function = "hdmi";
  94. };
  95. i2cp {
  96. nvidia,pins = "i2cp";
  97. nvidia,function = "i2cp";
  98. };
  99. irrx {
  100. nvidia,pins = "irrx", "irtx";
  101. nvidia,function = "uartb";
  102. };
  103. kbca {
  104. nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
  105. "kbce", "kbcf";
  106. nvidia,function = "kbc";
  107. };
  108. lcsn {
  109. nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
  110. "lsdi", "lvp0";
  111. nvidia,function = "rsvd4";
  112. };
  113. ld0 {
  114. nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
  115. "ld5", "ld6", "ld7", "ld8", "ld9",
  116. "ld10", "ld11", "ld12", "ld13", "ld14",
  117. "ld15", "ld16", "ld17", "ldi", "lhp0",
  118. "lhp1", "lhp2", "lhs", "lpp", "lsc0",
  119. "lspi", "lvp1", "lvs";
  120. nvidia,function = "displaya";
  121. };
  122. owc {
  123. nvidia,pins = "owc", "spdi", "spdo", "uac";
  124. nvidia,function = "rsvd2";
  125. };
  126. pmc {
  127. nvidia,pins = "pmc";
  128. nvidia,function = "pwr_on";
  129. };
  130. rm {
  131. nvidia,pins = "rm";
  132. nvidia,function = "i2c1";
  133. };
  134. sdb {
  135. nvidia,pins = "sdb", "sdc", "sdd";
  136. nvidia,function = "sdio3";
  137. };
  138. sdio1 {
  139. nvidia,pins = "sdio1";
  140. nvidia,function = "sdio1";
  141. };
  142. slxc {
  143. nvidia,pins = "slxc", "slxd";
  144. nvidia,function = "spdif";
  145. };
  146. spid {
  147. nvidia,pins = "spid", "spie", "spif";
  148. nvidia,function = "spi1";
  149. };
  150. spig {
  151. nvidia,pins = "spig", "spih";
  152. nvidia,function = "spi2_alt";
  153. };
  154. uaa {
  155. nvidia,pins = "uaa", "uab", "uda";
  156. nvidia,function = "ulpi";
  157. };
  158. uad {
  159. nvidia,pins = "uad";
  160. nvidia,function = "irda";
  161. };
  162. uca {
  163. nvidia,pins = "uca", "ucb";
  164. nvidia,function = "uartc";
  165. };
  166. conf_ata {
  167. nvidia,pins = "ata", "atb", "atc", "atd",
  168. "cdev1", "cdev2", "dap1", "dap2",
  169. "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
  170. "gme", "gpu", "gpu7", "i2cp", "irrx",
  171. "irtx", "pta", "rm", "sdc", "sdd",
  172. "slxd", "slxk", "spdi", "spdo", "uac",
  173. "uad", "uca", "ucb", "uda";
  174. nvidia,pull = <0>;
  175. nvidia,tristate = <0>;
  176. };
  177. conf_ate {
  178. nvidia,pins = "ate", "csus", "dap3",
  179. "gpv", "owc", "slxc", "spib", "spid",
  180. "spie";
  181. nvidia,pull = <0>;
  182. nvidia,tristate = <1>;
  183. };
  184. conf_ck32 {
  185. nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
  186. "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
  187. nvidia,pull = <0>;
  188. };
  189. conf_crtp {
  190. nvidia,pins = "crtp", "gmb", "slxa", "spia",
  191. "spig", "spih";
  192. nvidia,pull = <2>;
  193. nvidia,tristate = <1>;
  194. };
  195. conf_dta {
  196. nvidia,pins = "dta", "dtb", "dtc", "dtd";
  197. nvidia,pull = <1>;
  198. nvidia,tristate = <0>;
  199. };
  200. conf_dte {
  201. nvidia,pins = "dte", "spif";
  202. nvidia,pull = <1>;
  203. nvidia,tristate = <1>;
  204. };
  205. conf_hdint {
  206. nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
  207. "lpw1", "lsc1", "lsck", "lsda", "lsdi",
  208. "lvp0";
  209. nvidia,tristate = <1>;
  210. };
  211. conf_kbca {
  212. nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
  213. "kbce", "kbcf", "sdio1", "spic", "uaa",
  214. "uab";
  215. nvidia,pull = <2>;
  216. nvidia,tristate = <0>;
  217. };
  218. conf_lc {
  219. nvidia,pins = "lc", "ls";
  220. nvidia,pull = <2>;
  221. };
  222. conf_ld0 {
  223. nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
  224. "ld5", "ld6", "ld7", "ld8", "ld9",
  225. "ld10", "ld11", "ld12", "ld13", "ld14",
  226. "ld15", "ld16", "ld17", "ldi", "lhp0",
  227. "lhp1", "lhp2", "lhs", "lm0", "lpp",
  228. "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
  229. "lvs", "pmc", "sdb";
  230. nvidia,tristate = <0>;
  231. };
  232. conf_ld17_0 {
  233. nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
  234. "ld23_22";
  235. nvidia,pull = <1>;
  236. };
  237. drive_sdio1 {
  238. nvidia,pins = "drive_sdio1";
  239. nvidia,high-speed-mode = <0>;
  240. nvidia,schmitt = <0>;
  241. nvidia,low-power-mode = <3>;
  242. nvidia,pull-down-strength = <31>;
  243. nvidia,pull-up-strength = <31>;
  244. nvidia,slew-rate-rising = <3>;
  245. nvidia,slew-rate-falling = <3>;
  246. };
  247. };
  248. state_i2cmux_ddc: pinmux_i2cmux_ddc {
  249. ddc {
  250. nvidia,pins = "ddc";
  251. nvidia,function = "i2c2";
  252. };
  253. pta {
  254. nvidia,pins = "pta";
  255. nvidia,function = "rsvd4";
  256. };
  257. };
  258. state_i2cmux_pta: pinmux_i2cmux_pta {
  259. ddc {
  260. nvidia,pins = "ddc";
  261. nvidia,function = "rsvd4";
  262. };
  263. pta {
  264. nvidia,pins = "pta";
  265. nvidia,function = "i2c2";
  266. };
  267. };
  268. state_i2cmux_idle: pinmux_i2cmux_idle {
  269. ddc {
  270. nvidia,pins = "ddc";
  271. nvidia,function = "rsvd4";
  272. };
  273. pta {
  274. nvidia,pins = "pta";
  275. nvidia,function = "rsvd4";
  276. };
  277. };
  278. };
  279. i2s@70002800 {
  280. status = "okay";
  281. };
  282. serial@70006300 {
  283. status = "okay";
  284. clock-frequency = <216000000>;
  285. };
  286. i2c@7000c000 {
  287. status = "okay";
  288. clock-frequency = <400000>;
  289. wm8903: wm8903@1a {
  290. compatible = "wlf,wm8903";
  291. reg = <0x1a>;
  292. interrupt-parent = <&gpio>;
  293. interrupts = <187 0x04>;
  294. gpio-controller;
  295. #gpio-cells = <2>;
  296. micdet-cfg = <0>;
  297. micdet-delay = <100>;
  298. gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
  299. };
  300. /* ALS and proximity sensor */
  301. isl29018@44 {
  302. compatible = "isil,isl29018";
  303. reg = <0x44>;
  304. interrupt-parent = <&gpio>;
  305. interrupts = <202 0x04>; /* GPIO PZ2 */
  306. };
  307. gyrometer@68 {
  308. compatible = "invn,mpu3050";
  309. reg = <0x68>;
  310. interrupt-parent = <&gpio>;
  311. interrupts = <204 0x04>; /* gpio PZ4 */
  312. };
  313. };
  314. i2c@7000c400 {
  315. status = "okay";
  316. clock-frequency = <100000>;
  317. };
  318. i2cmux {
  319. compatible = "i2c-mux-pinctrl";
  320. #address-cells = <1>;
  321. #size-cells = <0>;
  322. i2c-parent = <&{/i2c@7000c400}>;
  323. pinctrl-names = "ddc", "pta", "idle";
  324. pinctrl-0 = <&state_i2cmux_ddc>;
  325. pinctrl-1 = <&state_i2cmux_pta>;
  326. pinctrl-2 = <&state_i2cmux_idle>;
  327. i2c@0 {
  328. reg = <0>;
  329. #address-cells = <1>;
  330. #size-cells = <0>;
  331. };
  332. i2c@1 {
  333. reg = <1>;
  334. #address-cells = <1>;
  335. #size-cells = <0>;
  336. smart-battery@b {
  337. compatible = "ti,bq20z75", "smart-battery-1.1";
  338. reg = <0xb>;
  339. ti,i2c-retry-count = <2>;
  340. ti,poll-retry-count = <10>;
  341. };
  342. };
  343. };
  344. i2c@7000c500 {
  345. status = "okay";
  346. clock-frequency = <400000>;
  347. };
  348. i2c@7000d000 {
  349. status = "okay";
  350. clock-frequency = <400000>;
  351. temperature-sensor@4c {
  352. compatible = "nct1008";
  353. reg = <0x4c>;
  354. };
  355. magnetometer@c {
  356. compatible = "ak8975";
  357. reg = <0xc>;
  358. interrupt-parent = <&gpio>;
  359. interrupts = <109 0x04>; /* gpio PN5 */
  360. };
  361. };
  362. memory-controller@0x7000f400 {
  363. emc-table@190000 {
  364. reg = <190000>;
  365. compatible = "nvidia,tegra20-emc-table";
  366. clock-frequency = <190000>;
  367. nvidia,emc-registers = <0x0000000c 0x00000026
  368. 0x00000009 0x00000003 0x00000004 0x00000004
  369. 0x00000002 0x0000000c 0x00000003 0x00000003
  370. 0x00000002 0x00000001 0x00000004 0x00000005
  371. 0x00000004 0x00000009 0x0000000d 0x0000059f
  372. 0x00000000 0x00000003 0x00000003 0x00000003
  373. 0x00000003 0x00000001 0x0000000b 0x000000c8
  374. 0x00000003 0x00000007 0x00000004 0x0000000f
  375. 0x00000002 0x00000000 0x00000000 0x00000002
  376. 0x00000000 0x00000000 0x00000083 0xa06204ae
  377. 0x007dc010 0x00000000 0x00000000 0x00000000
  378. 0x00000000 0x00000000 0x00000000 0x00000000>;
  379. };
  380. emc-table@380000 {
  381. reg = <380000>;
  382. compatible = "nvidia,tegra20-emc-table";
  383. clock-frequency = <380000>;
  384. nvidia,emc-registers = <0x00000017 0x0000004b
  385. 0x00000012 0x00000006 0x00000004 0x00000005
  386. 0x00000003 0x0000000c 0x00000006 0x00000006
  387. 0x00000003 0x00000001 0x00000004 0x00000005
  388. 0x00000004 0x00000009 0x0000000d 0x00000b5f
  389. 0x00000000 0x00000003 0x00000003 0x00000006
  390. 0x00000006 0x00000001 0x00000011 0x000000c8
  391. 0x00000003 0x0000000e 0x00000007 0x0000000f
  392. 0x00000002 0x00000000 0x00000000 0x00000002
  393. 0x00000000 0x00000000 0x00000083 0xe044048b
  394. 0x007d8010 0x00000000 0x00000000 0x00000000
  395. 0x00000000 0x00000000 0x00000000 0x00000000>;
  396. };
  397. };
  398. usb@c5000000 {
  399. status = "okay";
  400. nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
  401. dr_mode = "otg";
  402. };
  403. usb@c5004000 {
  404. status = "okay";
  405. nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
  406. };
  407. usb@c5008000 {
  408. status = "okay";
  409. };
  410. sdhci@c8000400 {
  411. status = "okay";
  412. cd-gpios = <&gpio 69 0>; /* gpio PI5 */
  413. wp-gpios = <&gpio 57 0>; /* gpio PH1 */
  414. power-gpios = <&gpio 70 0>; /* gpio PI6 */
  415. bus-width = <4>;
  416. };
  417. sdhci@c8000600 {
  418. status = "okay";
  419. bus-width = <8>;
  420. };
  421. gpio-keys {
  422. compatible = "gpio-keys";
  423. power {
  424. label = "Power";
  425. gpios = <&gpio 170 1>; /* gpio PV2, active low */
  426. linux,code = <116>; /* KEY_POWER */
  427. gpio-key,wakeup;
  428. };
  429. lid {
  430. label = "Lid";
  431. gpios = <&gpio 23 0>; /* gpio PC7 */
  432. linux,input-type = <5>; /* EV_SW */
  433. linux,code = <0>; /* SW_LID */
  434. debounce-interval = <1>;
  435. gpio-key,wakeup;
  436. };
  437. };
  438. sound {
  439. compatible = "nvidia,tegra-audio-wm8903-seaboard",
  440. "nvidia,tegra-audio-wm8903";
  441. nvidia,model = "NVIDIA Tegra Seaboard";
  442. nvidia,audio-routing =
  443. "Headphone Jack", "HPOUTR",
  444. "Headphone Jack", "HPOUTL",
  445. "Int Spk", "ROP",
  446. "Int Spk", "RON",
  447. "Int Spk", "LOP",
  448. "Int Spk", "LON",
  449. "Mic Jack", "MICBIAS",
  450. "IN1R", "Mic Jack";
  451. nvidia,i2s-controller = <&tegra_i2s1>;
  452. nvidia,audio-codec = <&wm8903>;
  453. nvidia,spkr-en-gpios = <&wm8903 2 0>;
  454. nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
  455. };
  456. };