tegra20-harmony.dts 7.0 KB

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  1. /dts-v1/;
  2. /include/ "tegra20.dtsi"
  3. / {
  4. model = "NVIDIA Tegra2 Harmony evaluation board";
  5. compatible = "nvidia,harmony", "nvidia,tegra20";
  6. memory {
  7. reg = <0x00000000 0x40000000>;
  8. };
  9. pinmux {
  10. pinctrl-names = "default";
  11. pinctrl-0 = <&state_default>;
  12. state_default: pinmux {
  13. ata {
  14. nvidia,pins = "ata";
  15. nvidia,function = "ide";
  16. };
  17. atb {
  18. nvidia,pins = "atb", "gma", "gme";
  19. nvidia,function = "sdio4";
  20. };
  21. atc {
  22. nvidia,pins = "atc";
  23. nvidia,function = "nand";
  24. };
  25. atd {
  26. nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
  27. "spia", "spib", "spic";
  28. nvidia,function = "gmi";
  29. };
  30. cdev1 {
  31. nvidia,pins = "cdev1";
  32. nvidia,function = "plla_out";
  33. };
  34. cdev2 {
  35. nvidia,pins = "cdev2";
  36. nvidia,function = "pllp_out4";
  37. };
  38. crtp {
  39. nvidia,pins = "crtp";
  40. nvidia,function = "crt";
  41. };
  42. csus {
  43. nvidia,pins = "csus";
  44. nvidia,function = "vi_sensor_clk";
  45. };
  46. dap1 {
  47. nvidia,pins = "dap1";
  48. nvidia,function = "dap1";
  49. };
  50. dap2 {
  51. nvidia,pins = "dap2";
  52. nvidia,function = "dap2";
  53. };
  54. dap3 {
  55. nvidia,pins = "dap3";
  56. nvidia,function = "dap3";
  57. };
  58. dap4 {
  59. nvidia,pins = "dap4";
  60. nvidia,function = "dap4";
  61. };
  62. ddc {
  63. nvidia,pins = "ddc";
  64. nvidia,function = "i2c2";
  65. };
  66. dta {
  67. nvidia,pins = "dta", "dtd";
  68. nvidia,function = "sdio2";
  69. };
  70. dtb {
  71. nvidia,pins = "dtb", "dtc", "dte";
  72. nvidia,function = "rsvd1";
  73. };
  74. dtf {
  75. nvidia,pins = "dtf";
  76. nvidia,function = "i2c3";
  77. };
  78. gmc {
  79. nvidia,pins = "gmc";
  80. nvidia,function = "uartd";
  81. };
  82. gpu7 {
  83. nvidia,pins = "gpu7";
  84. nvidia,function = "rtck";
  85. };
  86. gpv {
  87. nvidia,pins = "gpv", "slxa", "slxk";
  88. nvidia,function = "pcie";
  89. };
  90. hdint {
  91. nvidia,pins = "hdint", "pta";
  92. nvidia,function = "hdmi";
  93. };
  94. i2cp {
  95. nvidia,pins = "i2cp";
  96. nvidia,function = "i2cp";
  97. };
  98. irrx {
  99. nvidia,pins = "irrx", "irtx";
  100. nvidia,function = "uarta";
  101. };
  102. kbca {
  103. nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
  104. "kbce", "kbcf";
  105. nvidia,function = "kbc";
  106. };
  107. lcsn {
  108. nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
  109. "ld3", "ld4", "ld5", "ld6", "ld7",
  110. "ld8", "ld9", "ld10", "ld11", "ld12",
  111. "ld13", "ld14", "ld15", "ld16", "ld17",
  112. "ldc", "ldi", "lhp0", "lhp1", "lhp2",
  113. "lhs", "lm0", "lm1", "lpp", "lpw0",
  114. "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
  115. "lsda", "lsdi", "lspi", "lvp0", "lvp1",
  116. "lvs";
  117. nvidia,function = "displaya";
  118. };
  119. owc {
  120. nvidia,pins = "owc", "spdi", "spdo", "uac";
  121. nvidia,function = "rsvd2";
  122. };
  123. pmc {
  124. nvidia,pins = "pmc";
  125. nvidia,function = "pwr_on";
  126. };
  127. rm {
  128. nvidia,pins = "rm";
  129. nvidia,function = "i2c1";
  130. };
  131. sdb {
  132. nvidia,pins = "sdb", "sdc", "sdd";
  133. nvidia,function = "pwm";
  134. };
  135. sdio1 {
  136. nvidia,pins = "sdio1";
  137. nvidia,function = "sdio1";
  138. };
  139. slxc {
  140. nvidia,pins = "slxc", "slxd";
  141. nvidia,function = "spdif";
  142. };
  143. spid {
  144. nvidia,pins = "spid", "spie", "spif";
  145. nvidia,function = "spi1";
  146. };
  147. spig {
  148. nvidia,pins = "spig", "spih";
  149. nvidia,function = "spi2_alt";
  150. };
  151. uaa {
  152. nvidia,pins = "uaa", "uab", "uda";
  153. nvidia,function = "ulpi";
  154. };
  155. uad {
  156. nvidia,pins = "uad";
  157. nvidia,function = "irda";
  158. };
  159. uca {
  160. nvidia,pins = "uca", "ucb";
  161. nvidia,function = "uartc";
  162. };
  163. conf_ata {
  164. nvidia,pins = "ata", "atb", "atc", "atd", "ate",
  165. "cdev1", "cdev2", "dap1", "dtb", "gma",
  166. "gmb", "gmc", "gmd", "gme", "gpu7",
  167. "gpv", "i2cp", "pta", "rm", "slxa",
  168. "slxk", "spia", "spib", "uac";
  169. nvidia,pull = <0>;
  170. nvidia,tristate = <0>;
  171. };
  172. conf_ck32 {
  173. nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
  174. "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
  175. nvidia,pull = <0>;
  176. };
  177. conf_csus {
  178. nvidia,pins = "csus", "spid", "spif";
  179. nvidia,pull = <1>;
  180. nvidia,tristate = <1>;
  181. };
  182. conf_crtp {
  183. nvidia,pins = "crtp", "dap2", "dap3", "dap4",
  184. "dtc", "dte", "dtf", "gpu", "sdio1",
  185. "slxc", "slxd", "spdi", "spdo", "spig",
  186. "uda";
  187. nvidia,pull = <0>;
  188. nvidia,tristate = <1>;
  189. };
  190. conf_ddc {
  191. nvidia,pins = "ddc", "dta", "dtd", "kbca",
  192. "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
  193. "sdc";
  194. nvidia,pull = <2>;
  195. nvidia,tristate = <0>;
  196. };
  197. conf_hdint {
  198. nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
  199. "lpw1", "lsc1", "lsck", "lsda", "lsdi",
  200. "lvp0", "owc", "sdb";
  201. nvidia,tristate = <1>;
  202. };
  203. conf_irrx {
  204. nvidia,pins = "irrx", "irtx", "sdd", "spic",
  205. "spie", "spih", "uaa", "uab", "uad",
  206. "uca", "ucb";
  207. nvidia,pull = <2>;
  208. nvidia,tristate = <1>;
  209. };
  210. conf_lc {
  211. nvidia,pins = "lc", "ls";
  212. nvidia,pull = <2>;
  213. };
  214. conf_ld0 {
  215. nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
  216. "ld5", "ld6", "ld7", "ld8", "ld9",
  217. "ld10", "ld11", "ld12", "ld13", "ld14",
  218. "ld15", "ld16", "ld17", "ldi", "lhp0",
  219. "lhp1", "lhp2", "lhs", "lm0", "lpp",
  220. "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
  221. "lvs", "pmc";
  222. nvidia,tristate = <0>;
  223. };
  224. conf_ld17_0 {
  225. nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
  226. "ld23_22";
  227. nvidia,pull = <1>;
  228. };
  229. };
  230. };
  231. i2s@70002800 {
  232. status = "okay";
  233. };
  234. serial@70006300 {
  235. status = "okay";
  236. clock-frequency = <216000000>;
  237. };
  238. i2c@7000c000 {
  239. status = "okay";
  240. clock-frequency = <400000>;
  241. wm8903: wm8903@1a {
  242. compatible = "wlf,wm8903";
  243. reg = <0x1a>;
  244. interrupt-parent = <&gpio>;
  245. interrupts = <187 0x04>;
  246. gpio-controller;
  247. #gpio-cells = <2>;
  248. micdet-cfg = <0>;
  249. micdet-delay = <100>;
  250. gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
  251. };
  252. };
  253. i2c@7000c400 {
  254. status = "okay";
  255. clock-frequency = <400000>;
  256. };
  257. i2c@7000c500 {
  258. status = "okay";
  259. clock-frequency = <400000>;
  260. };
  261. i2c@7000d000 {
  262. status = "okay";
  263. clock-frequency = <400000>;
  264. };
  265. pmc {
  266. nvidia,invert-interrupt;
  267. };
  268. usb@c5000000 {
  269. status = "okay";
  270. };
  271. usb@c5004000 {
  272. status = "okay";
  273. nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
  274. };
  275. usb@c5008000 {
  276. status = "okay";
  277. };
  278. sdhci@c8000200 {
  279. status = "okay";
  280. cd-gpios = <&gpio 69 0>; /* gpio PI5 */
  281. wp-gpios = <&gpio 57 0>; /* gpio PH1 */
  282. power-gpios = <&gpio 155 0>; /* gpio PT3 */
  283. bus-width = <4>;
  284. };
  285. sdhci@c8000600 {
  286. status = "okay";
  287. cd-gpios = <&gpio 58 0>; /* gpio PH2 */
  288. wp-gpios = <&gpio 59 0>; /* gpio PH3 */
  289. power-gpios = <&gpio 70 0>; /* gpio PI6 */
  290. bus-width = <8>;
  291. };
  292. sound {
  293. compatible = "nvidia,tegra-audio-wm8903-harmony",
  294. "nvidia,tegra-audio-wm8903";
  295. nvidia,model = "NVIDIA Tegra Harmony";
  296. nvidia,audio-routing =
  297. "Headphone Jack", "HPOUTR",
  298. "Headphone Jack", "HPOUTL",
  299. "Int Spk", "ROP",
  300. "Int Spk", "RON",
  301. "Int Spk", "LOP",
  302. "Int Spk", "LON",
  303. "Mic Jack", "MICBIAS",
  304. "IN1L", "Mic Jack";
  305. nvidia,i2s-controller = <&tegra_i2s1>;
  306. nvidia,audio-codec = <&wm8903>;
  307. nvidia,spkr-en-gpios = <&wm8903 2 0>;
  308. nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
  309. nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
  310. nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
  311. };
  312. };