spear600.dtsi 4.1 KB

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  1. /*
  2. * Copyright 2012 Stefan Roese <sr@denx.de>
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "st,spear600";
  14. cpus {
  15. cpu@0 {
  16. compatible = "arm,arm926ejs";
  17. };
  18. };
  19. memory {
  20. device_type = "memory";
  21. reg = <0 0x40000000>;
  22. };
  23. ahb {
  24. #address-cells = <1>;
  25. #size-cells = <1>;
  26. compatible = "simple-bus";
  27. ranges = <0xd0000000 0xd0000000 0x30000000>;
  28. vic0: interrupt-controller@f1100000 {
  29. compatible = "arm,pl190-vic";
  30. interrupt-controller;
  31. reg = <0xf1100000 0x1000>;
  32. #interrupt-cells = <1>;
  33. };
  34. vic1: interrupt-controller@f1000000 {
  35. compatible = "arm,pl190-vic";
  36. interrupt-controller;
  37. reg = <0xf1000000 0x1000>;
  38. #interrupt-cells = <1>;
  39. };
  40. dma@fc400000 {
  41. compatible = "arm,pl080", "arm,primecell";
  42. reg = <0xfc400000 0x1000>;
  43. interrupt-parent = <&vic1>;
  44. interrupts = <10>;
  45. status = "disabled";
  46. };
  47. gmac: ethernet@e0800000 {
  48. compatible = "st,spear600-gmac";
  49. reg = <0xe0800000 0x8000>;
  50. interrupt-parent = <&vic1>;
  51. interrupts = <24 23>;
  52. interrupt-names = "macirq", "eth_wake_irq";
  53. status = "disabled";
  54. };
  55. fsmc: flash@d1800000 {
  56. compatible = "st,spear600-fsmc-nand";
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. reg = <0xd1800000 0x1000 /* FSMC Register */
  60. 0xd2000000 0x4000>; /* NAND Base */
  61. reg-names = "fsmc_regs", "nand_data";
  62. st,ale-off = <0x20000>;
  63. st,cle-off = <0x10000>;
  64. status = "disabled";
  65. };
  66. smi: flash@fc000000 {
  67. compatible = "st,spear600-smi";
  68. #address-cells = <1>;
  69. #size-cells = <1>;
  70. reg = <0xfc000000 0x1000>;
  71. interrupt-parent = <&vic1>;
  72. interrupts = <12>;
  73. status = "disabled";
  74. };
  75. ehci@e1800000 {
  76. compatible = "st,spear600-ehci", "usb-ehci";
  77. reg = <0xe1800000 0x1000>;
  78. interrupt-parent = <&vic1>;
  79. interrupts = <27>;
  80. status = "disabled";
  81. };
  82. ehci@e2000000 {
  83. compatible = "st,spear600-ehci", "usb-ehci";
  84. reg = <0xe2000000 0x1000>;
  85. interrupt-parent = <&vic1>;
  86. interrupts = <29>;
  87. status = "disabled";
  88. };
  89. ohci@e1900000 {
  90. compatible = "st,spear600-ohci", "usb-ohci";
  91. reg = <0xe1900000 0x1000>;
  92. interrupt-parent = <&vic1>;
  93. interrupts = <26>;
  94. status = "disabled";
  95. };
  96. ohci@e2100000 {
  97. compatible = "st,spear600-ohci", "usb-ohci";
  98. reg = <0xe2100000 0x1000>;
  99. interrupt-parent = <&vic1>;
  100. interrupts = <28>;
  101. status = "disabled";
  102. };
  103. apb {
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. compatible = "simple-bus";
  107. ranges = <0xd0000000 0xd0000000 0x30000000>;
  108. serial@d0000000 {
  109. compatible = "arm,pl011", "arm,primecell";
  110. reg = <0xd0000000 0x1000>;
  111. interrupt-parent = <&vic0>;
  112. interrupts = <24>;
  113. status = "disabled";
  114. };
  115. serial@d0080000 {
  116. compatible = "arm,pl011", "arm,primecell";
  117. reg = <0xd0080000 0x1000>;
  118. interrupt-parent = <&vic0>;
  119. interrupts = <25>;
  120. status = "disabled";
  121. };
  122. /* local/cpu GPIO */
  123. gpio0: gpio@f0100000 {
  124. #gpio-cells = <2>;
  125. compatible = "arm,pl061", "arm,primecell";
  126. gpio-controller;
  127. reg = <0xf0100000 0x1000>;
  128. interrupt-parent = <&vic0>;
  129. interrupts = <18>;
  130. };
  131. /* basic GPIO */
  132. gpio1: gpio@fc980000 {
  133. #gpio-cells = <2>;
  134. compatible = "arm,pl061", "arm,primecell";
  135. gpio-controller;
  136. reg = <0xfc980000 0x1000>;
  137. interrupt-parent = <&vic1>;
  138. interrupts = <19>;
  139. };
  140. /* appl GPIO */
  141. gpio2: gpio@d8100000 {
  142. #gpio-cells = <2>;
  143. compatible = "arm,pl061", "arm,primecell";
  144. gpio-controller;
  145. reg = <0xd8100000 0x1000>;
  146. interrupt-parent = <&vic1>;
  147. interrupts = <4>;
  148. };
  149. i2c@d0200000 {
  150. #address-cells = <1>;
  151. #size-cells = <0>;
  152. compatible = "snps,designware-i2c";
  153. reg = <0xd0200000 0x1000>;
  154. interrupt-parent = <&vic0>;
  155. interrupts = <28>;
  156. status = "disabled";
  157. };
  158. timer@f0000000 {
  159. compatible = "st,spear-timer";
  160. reg = <0xf0000000 0x400>;
  161. interrupt-parent = <&vic0>;
  162. interrupts = <16>;
  163. };
  164. };
  165. };
  166. };