omap3.dtsi 4.4 KB

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  1. /*
  2. * Device Tree Source for OMAP3 SoC
  3. *
  4. * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. /include/ "skeleton.dtsi"
  11. / {
  12. compatible = "ti,omap3430", "ti,omap3";
  13. aliases {
  14. serial0 = &uart1;
  15. serial1 = &uart2;
  16. serial2 = &uart3;
  17. serial3 = &uart4;
  18. };
  19. cpus {
  20. cpu@0 {
  21. compatible = "arm,cortex-a8";
  22. };
  23. };
  24. /*
  25. * The soc node represents the soc top level view. It is uses for IPs
  26. * that are not memory mapped in the MPU view or for the MPU itself.
  27. */
  28. soc {
  29. compatible = "ti,omap-infra";
  30. mpu {
  31. compatible = "ti,omap3-mpu";
  32. ti,hwmods = "mpu";
  33. };
  34. iva {
  35. compatible = "ti,iva2.2";
  36. ti,hwmods = "iva";
  37. dsp {
  38. compatible = "ti,omap3-c64";
  39. };
  40. };
  41. };
  42. /*
  43. * XXX: Use a flat representation of the OMAP3 interconnect.
  44. * The real OMAP interconnect network is quite complex.
  45. * Since that will not bring real advantage to represent that in DT for
  46. * the moment, just use a fake OCP bus entry to represent the whole bus
  47. * hierarchy.
  48. */
  49. ocp {
  50. compatible = "simple-bus";
  51. #address-cells = <1>;
  52. #size-cells = <1>;
  53. ranges;
  54. ti,hwmods = "l3_main";
  55. intc: interrupt-controller@48200000 {
  56. compatible = "ti,omap2-intc";
  57. interrupt-controller;
  58. #interrupt-cells = <1>;
  59. ti,intc-size = <96>;
  60. reg = <0x48200000 0x1000>;
  61. };
  62. gpio1: gpio@48310000 {
  63. compatible = "ti,omap3-gpio";
  64. ti,hwmods = "gpio1";
  65. gpio-controller;
  66. #gpio-cells = <2>;
  67. interrupt-controller;
  68. #interrupt-cells = <1>;
  69. };
  70. gpio2: gpio@49050000 {
  71. compatible = "ti,omap3-gpio";
  72. ti,hwmods = "gpio2";
  73. gpio-controller;
  74. #gpio-cells = <2>;
  75. interrupt-controller;
  76. #interrupt-cells = <1>;
  77. };
  78. gpio3: gpio@49052000 {
  79. compatible = "ti,omap3-gpio";
  80. ti,hwmods = "gpio3";
  81. gpio-controller;
  82. #gpio-cells = <2>;
  83. interrupt-controller;
  84. #interrupt-cells = <1>;
  85. };
  86. gpio4: gpio@49054000 {
  87. compatible = "ti,omap3-gpio";
  88. ti,hwmods = "gpio4";
  89. gpio-controller;
  90. #gpio-cells = <2>;
  91. interrupt-controller;
  92. #interrupt-cells = <1>;
  93. };
  94. gpio5: gpio@49056000 {
  95. compatible = "ti,omap3-gpio";
  96. ti,hwmods = "gpio5";
  97. gpio-controller;
  98. #gpio-cells = <2>;
  99. interrupt-controller;
  100. #interrupt-cells = <1>;
  101. };
  102. gpio6: gpio@49058000 {
  103. compatible = "ti,omap3-gpio";
  104. ti,hwmods = "gpio6";
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. interrupt-controller;
  108. #interrupt-cells = <1>;
  109. };
  110. uart1: serial@4806a000 {
  111. compatible = "ti,omap3-uart";
  112. ti,hwmods = "uart1";
  113. clock-frequency = <48000000>;
  114. };
  115. uart2: serial@4806c000 {
  116. compatible = "ti,omap3-uart";
  117. ti,hwmods = "uart2";
  118. clock-frequency = <48000000>;
  119. };
  120. uart3: serial@49020000 {
  121. compatible = "ti,omap3-uart";
  122. ti,hwmods = "uart3";
  123. clock-frequency = <48000000>;
  124. };
  125. uart4: serial@49042000 {
  126. compatible = "ti,omap3-uart";
  127. ti,hwmods = "uart4";
  128. clock-frequency = <48000000>;
  129. };
  130. i2c1: i2c@48070000 {
  131. compatible = "ti,omap3-i2c";
  132. #address-cells = <1>;
  133. #size-cells = <0>;
  134. ti,hwmods = "i2c1";
  135. };
  136. i2c2: i2c@48072000 {
  137. compatible = "ti,omap3-i2c";
  138. #address-cells = <1>;
  139. #size-cells = <0>;
  140. ti,hwmods = "i2c2";
  141. };
  142. i2c3: i2c@48060000 {
  143. compatible = "ti,omap3-i2c";
  144. #address-cells = <1>;
  145. #size-cells = <0>;
  146. ti,hwmods = "i2c3";
  147. };
  148. mcspi1: spi@48098000 {
  149. compatible = "ti,omap2-mcspi";
  150. #address-cells = <1>;
  151. #size-cells = <0>;
  152. ti,hwmods = "mcspi1";
  153. ti,spi-num-cs = <4>;
  154. };
  155. mcspi2: spi@4809a000 {
  156. compatible = "ti,omap2-mcspi";
  157. #address-cells = <1>;
  158. #size-cells = <0>;
  159. ti,hwmods = "mcspi2";
  160. ti,spi-num-cs = <2>;
  161. };
  162. mcspi3: spi@480b8000 {
  163. compatible = "ti,omap2-mcspi";
  164. #address-cells = <1>;
  165. #size-cells = <0>;
  166. ti,hwmods = "mcspi3";
  167. ti,spi-num-cs = <2>;
  168. };
  169. mcspi4: spi@480ba000 {
  170. compatible = "ti,omap2-mcspi";
  171. #address-cells = <1>;
  172. #size-cells = <0>;
  173. ti,hwmods = "mcspi4";
  174. ti,spi-num-cs = <1>;
  175. };
  176. mmc1: mmc@4809c000 {
  177. compatible = "ti,omap3-hsmmc";
  178. ti,hwmods = "mmc1";
  179. ti,dual-volt;
  180. };
  181. mmc2: mmc@480b4000 {
  182. compatible = "ti,omap3-hsmmc";
  183. ti,hwmods = "mmc2";
  184. };
  185. mmc3: mmc@480ad000 {
  186. compatible = "ti,omap3-hsmmc";
  187. ti,hwmods = "mmc3";
  188. };
  189. wdt2: wdt@48314000 {
  190. compatible = "ti,omap3-wdt";
  191. ti,hwmods = "wd_timer2";
  192. };
  193. };
  194. };