imx53-evk.dts 2.2 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. /include/ "imx53.dtsi"
  14. / {
  15. model = "Freescale i.MX53 Evaluation Kit";
  16. compatible = "fsl,imx53-evk", "fsl,imx53";
  17. memory {
  18. reg = <0x70000000 0x80000000>;
  19. };
  20. soc {
  21. aips@50000000 { /* AIPS1 */
  22. spba@50000000 {
  23. esdhc@50004000 { /* ESDHC1 */
  24. cd-gpios = <&gpio3 13 0>;
  25. wp-gpios = <&gpio3 14 0>;
  26. status = "okay";
  27. };
  28. ecspi@50010000 { /* ECSPI1 */
  29. fsl,spi-num-chipselects = <2>;
  30. cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
  31. status = "okay";
  32. flash: at45db321d@1 {
  33. #address-cells = <1>;
  34. #size-cells = <1>;
  35. compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
  36. spi-max-frequency = <25000000>;
  37. reg = <1>;
  38. partition@0 {
  39. label = "U-Boot";
  40. reg = <0x0 0x40000>;
  41. read-only;
  42. };
  43. partition@40000 {
  44. label = "Kernel";
  45. reg = <0x40000 0x3c0000>;
  46. };
  47. };
  48. };
  49. esdhc@50020000 { /* ESDHC3 */
  50. cd-gpios = <&gpio3 11 0>;
  51. wp-gpios = <&gpio3 12 0>;
  52. status = "okay";
  53. };
  54. };
  55. wdog@53f98000 { /* WDOG1 */
  56. status = "okay";
  57. };
  58. iomuxc@53fa8000 {
  59. compatible = "fsl,imx53-iomuxc-evk";
  60. reg = <0x53fa8000 0x4000>;
  61. };
  62. uart1: serial@53fbc000 {
  63. status = "okay";
  64. };
  65. };
  66. aips@60000000 { /* AIPS2 */
  67. sdma@63fb0000 {
  68. fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
  69. };
  70. i2c@63fc4000 { /* I2C2 */
  71. status = "okay";
  72. pmic: mc13892@08 {
  73. compatible = "fsl,mc13892", "fsl,mc13xxx";
  74. reg = <0x08>;
  75. };
  76. codec: sgtl5000@0a {
  77. compatible = "fsl,sgtl5000";
  78. reg = <0x0a>;
  79. };
  80. };
  81. ethernet@63fec000 {
  82. phy-mode = "rmii";
  83. phy-reset-gpios = <&gpio7 6 0>;
  84. status = "okay";
  85. };
  86. };
  87. };
  88. leds {
  89. compatible = "gpio-leds";
  90. green {
  91. label = "Heartbeat";
  92. gpios = <&gpio7 7 0>;
  93. linux,default-trigger = "heartbeat";
  94. };
  95. };
  96. };