imx27.dtsi 4.9 KB

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  1. /*
  2. * Copyright 2012 Sascha Hauer, Pengutronix
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. aliases {
  14. serial0 = &uart1;
  15. serial1 = &uart2;
  16. serial2 = &uart3;
  17. serial3 = &uart4;
  18. serial4 = &uart5;
  19. serial5 = &uart6;
  20. };
  21. avic: avic-interrupt-controller@e0000000 {
  22. compatible = "fsl,imx27-avic", "fsl,avic";
  23. interrupt-controller;
  24. #interrupt-cells = <1>;
  25. reg = <0x10040000 0x1000>;
  26. };
  27. clocks {
  28. #address-cells = <1>;
  29. #size-cells = <0>;
  30. osc26m {
  31. compatible = "fsl,imx-osc26m", "fixed-clock";
  32. clock-frequency = <26000000>;
  33. };
  34. };
  35. soc {
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. compatible = "simple-bus";
  39. interrupt-parent = <&avic>;
  40. ranges;
  41. aipi@10000000 { /* AIPI1 */
  42. compatible = "fsl,aipi-bus", "simple-bus";
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. reg = <0x10000000 0x10000000>;
  46. ranges;
  47. wdog@10002000 {
  48. compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
  49. reg = <0x10002000 0x4000>;
  50. interrupts = <27>;
  51. status = "disabled";
  52. };
  53. uart1: serial@1000a000 {
  54. compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  55. reg = <0x1000a000 0x1000>;
  56. interrupts = <20>;
  57. status = "disabled";
  58. };
  59. uart2: serial@1000b000 {
  60. compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  61. reg = <0x1000b000 0x1000>;
  62. interrupts = <19>;
  63. status = "disabled";
  64. };
  65. uart3: serial@1000c000 {
  66. compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  67. reg = <0x1000c000 0x1000>;
  68. interrupts = <18>;
  69. status = "disabled";
  70. };
  71. uart4: serial@1000d000 {
  72. compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  73. reg = <0x1000d000 0x1000>;
  74. interrupts = <17>;
  75. status = "disabled";
  76. };
  77. cspi1: cspi@1000e000 {
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. compatible = "fsl,imx27-cspi";
  81. reg = <0x1000e000 0x1000>;
  82. interrupts = <16>;
  83. status = "disabled";
  84. };
  85. cspi2: cspi@1000f000 {
  86. #address-cells = <1>;
  87. #size-cells = <0>;
  88. compatible = "fsl,imx27-cspi";
  89. reg = <0x1000f000 0x1000>;
  90. interrupts = <15>;
  91. status = "disabled";
  92. };
  93. i2c1: i2c@10012000 {
  94. #address-cells = <1>;
  95. #size-cells = <0>;
  96. compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
  97. reg = <0x10012000 0x1000>;
  98. interrupts = <12>;
  99. status = "disabled";
  100. };
  101. gpio1: gpio@10015000 {
  102. compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
  103. reg = <0x10015000 0x100>;
  104. interrupts = <8>;
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. interrupt-controller;
  108. #interrupt-cells = <2>;
  109. };
  110. gpio2: gpio@10015100 {
  111. compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
  112. reg = <0x10015100 0x100>;
  113. interrupts = <8>;
  114. gpio-controller;
  115. #gpio-cells = <2>;
  116. interrupt-controller;
  117. #interrupt-cells = <2>;
  118. };
  119. gpio3: gpio@10015200 {
  120. compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
  121. reg = <0x10015200 0x100>;
  122. interrupts = <8>;
  123. gpio-controller;
  124. #gpio-cells = <2>;
  125. interrupt-controller;
  126. #interrupt-cells = <2>;
  127. };
  128. gpio4: gpio@10015300 {
  129. compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
  130. reg = <0x10015300 0x100>;
  131. interrupts = <8>;
  132. gpio-controller;
  133. #gpio-cells = <2>;
  134. interrupt-controller;
  135. #interrupt-cells = <2>;
  136. };
  137. gpio5: gpio@10015400 {
  138. compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
  139. reg = <0x10015400 0x100>;
  140. interrupts = <8>;
  141. gpio-controller;
  142. #gpio-cells = <2>;
  143. interrupt-controller;
  144. #interrupt-cells = <2>;
  145. };
  146. gpio6: gpio@10015500 {
  147. compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
  148. reg = <0x10015500 0x100>;
  149. interrupts = <8>;
  150. gpio-controller;
  151. #gpio-cells = <2>;
  152. interrupt-controller;
  153. #interrupt-cells = <2>;
  154. };
  155. cspi3: cspi@10017000 {
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. compatible = "fsl,imx27-cspi";
  159. reg = <0x10017000 0x1000>;
  160. interrupts = <6>;
  161. status = "disabled";
  162. };
  163. uart5: serial@1001b000 {
  164. compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  165. reg = <0x1001b000 0x1000>;
  166. interrupts = <49>;
  167. status = "disabled";
  168. };
  169. uart6: serial@1001c000 {
  170. compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  171. reg = <0x1001c000 0x1000>;
  172. interrupts = <48>;
  173. status = "disabled";
  174. };
  175. i2c2: i2c@1001d000 {
  176. #address-cells = <1>;
  177. #size-cells = <0>;
  178. compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
  179. reg = <0x1001d000 0x1000>;
  180. interrupts = <1>;
  181. status = "disabled";
  182. };
  183. fec: ethernet@1002b000 {
  184. compatible = "fsl,imx27-fec";
  185. reg = <0x1002b000 0x4000>;
  186. interrupts = <50>;
  187. status = "disabled";
  188. };
  189. };
  190. nand@d8000000 {
  191. #address-cells = <1>;
  192. #size-cells = <1>;
  193. compatible = "fsl,imx27-nand";
  194. reg = <0xd8000000 0x1000>;
  195. interrupts = <29>;
  196. status = "disabled";
  197. };
  198. };
  199. };