at91sam9x5.dtsi 6.4 KB

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  1. /*
  2. * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
  3. * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
  4. * AT91SAM9X25, AT91SAM9X35 SoC
  5. *
  6. * Copyright (C) 2012 Atmel,
  7. * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9x5 family SoC";
  14. compatible = "atmel,at91sam9x5";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. gpio0 = &pioA;
  22. gpio1 = &pioB;
  23. gpio2 = &pioC;
  24. gpio3 = &pioD;
  25. tcb0 = &tcb0;
  26. tcb1 = &tcb1;
  27. };
  28. cpus {
  29. cpu@0 {
  30. compatible = "arm,arm926ejs";
  31. };
  32. };
  33. memory {
  34. reg = <0x20000000 0x10000000>;
  35. };
  36. ahb {
  37. compatible = "simple-bus";
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. ranges;
  41. apb {
  42. compatible = "simple-bus";
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. ranges;
  46. aic: interrupt-controller@fffff000 {
  47. #interrupt-cells = <3>;
  48. compatible = "atmel,at91rm9200-aic";
  49. interrupt-controller;
  50. reg = <0xfffff000 0x200>;
  51. atmel,external-irqs = <31>;
  52. };
  53. ramc0: ramc@ffffe800 {
  54. compatible = "atmel,at91sam9g45-ddramc";
  55. reg = <0xffffe800 0x200>;
  56. };
  57. pmc: pmc@fffffc00 {
  58. compatible = "atmel,at91rm9200-pmc";
  59. reg = <0xfffffc00 0x100>;
  60. };
  61. rstc@fffffe00 {
  62. compatible = "atmel,at91sam9g45-rstc";
  63. reg = <0xfffffe00 0x10>;
  64. };
  65. shdwc@fffffe10 {
  66. compatible = "atmel,at91sam9x5-shdwc";
  67. reg = <0xfffffe10 0x10>;
  68. };
  69. pit: timer@fffffe30 {
  70. compatible = "atmel,at91sam9260-pit";
  71. reg = <0xfffffe30 0xf>;
  72. interrupts = <1 4 7>;
  73. };
  74. tcb0: timer@f8008000 {
  75. compatible = "atmel,at91sam9x5-tcb";
  76. reg = <0xf8008000 0x100>;
  77. interrupts = <17 4 0>;
  78. };
  79. tcb1: timer@f800c000 {
  80. compatible = "atmel,at91sam9x5-tcb";
  81. reg = <0xf800c000 0x100>;
  82. interrupts = <17 4 0>;
  83. };
  84. dma0: dma-controller@ffffec00 {
  85. compatible = "atmel,at91sam9g45-dma";
  86. reg = <0xffffec00 0x200>;
  87. interrupts = <20 4 0>;
  88. };
  89. dma1: dma-controller@ffffee00 {
  90. compatible = "atmel,at91sam9g45-dma";
  91. reg = <0xffffee00 0x200>;
  92. interrupts = <21 4 0>;
  93. };
  94. pioA: gpio@fffff400 {
  95. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  96. reg = <0xfffff400 0x100>;
  97. interrupts = <2 4 1>;
  98. #gpio-cells = <2>;
  99. gpio-controller;
  100. interrupt-controller;
  101. };
  102. pioB: gpio@fffff600 {
  103. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  104. reg = <0xfffff600 0x100>;
  105. interrupts = <2 4 1>;
  106. #gpio-cells = <2>;
  107. gpio-controller;
  108. interrupt-controller;
  109. };
  110. pioC: gpio@fffff800 {
  111. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  112. reg = <0xfffff800 0x100>;
  113. interrupts = <3 4 1>;
  114. #gpio-cells = <2>;
  115. gpio-controller;
  116. interrupt-controller;
  117. };
  118. pioD: gpio@fffffa00 {
  119. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  120. reg = <0xfffffa00 0x100>;
  121. interrupts = <3 4 1>;
  122. #gpio-cells = <2>;
  123. gpio-controller;
  124. interrupt-controller;
  125. };
  126. dbgu: serial@fffff200 {
  127. compatible = "atmel,at91sam9260-usart";
  128. reg = <0xfffff200 0x200>;
  129. interrupts = <1 4 7>;
  130. status = "disabled";
  131. };
  132. usart0: serial@f801c000 {
  133. compatible = "atmel,at91sam9260-usart";
  134. reg = <0xf801c000 0x200>;
  135. interrupts = <5 4 5>;
  136. atmel,use-dma-rx;
  137. atmel,use-dma-tx;
  138. status = "disabled";
  139. };
  140. usart1: serial@f8020000 {
  141. compatible = "atmel,at91sam9260-usart";
  142. reg = <0xf8020000 0x200>;
  143. interrupts = <6 4 5>;
  144. atmel,use-dma-rx;
  145. atmel,use-dma-tx;
  146. status = "disabled";
  147. };
  148. usart2: serial@f8024000 {
  149. compatible = "atmel,at91sam9260-usart";
  150. reg = <0xf8024000 0x200>;
  151. interrupts = <7 4 5>;
  152. atmel,use-dma-rx;
  153. atmel,use-dma-tx;
  154. status = "disabled";
  155. };
  156. macb0: ethernet@f802c000 {
  157. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  158. reg = <0xf802c000 0x100>;
  159. interrupts = <24 4 3>;
  160. status = "disabled";
  161. };
  162. macb1: ethernet@f8030000 {
  163. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  164. reg = <0xf8030000 0x100>;
  165. interrupts = <27 4 3>;
  166. status = "disabled";
  167. };
  168. adc0: adc@f804c000 {
  169. compatible = "atmel,at91sam9260-adc";
  170. reg = <0xf804c000 0x100>;
  171. interrupts = <19 4 0>;
  172. atmel,adc-use-external;
  173. atmel,adc-channels-used = <0xffff>;
  174. atmel,adc-vref = <3300>;
  175. atmel,adc-num-channels = <12>;
  176. atmel,adc-startup-time = <40>;
  177. atmel,adc-channel-base = <0x50>;
  178. atmel,adc-drdy-mask = <0x1000000>;
  179. atmel,adc-status-register = <0x30>;
  180. atmel,adc-trigger-register = <0xc0>;
  181. trigger@0 {
  182. trigger-name = "external-rising";
  183. trigger-value = <0x1>;
  184. trigger-external;
  185. };
  186. trigger@1 {
  187. trigger-name = "external-falling";
  188. trigger-value = <0x2>;
  189. trigger-external;
  190. };
  191. trigger@2 {
  192. trigger-name = "external-any";
  193. trigger-value = <0x3>;
  194. trigger-external;
  195. };
  196. trigger@3 {
  197. trigger-name = "continuous";
  198. trigger-value = <0x6>;
  199. };
  200. };
  201. };
  202. nand0: nand@40000000 {
  203. compatible = "atmel,at91rm9200-nand";
  204. #address-cells = <1>;
  205. #size-cells = <1>;
  206. reg = <0x40000000 0x10000000
  207. >;
  208. atmel,nand-addr-offset = <21>;
  209. atmel,nand-cmd-offset = <22>;
  210. gpios = <&pioD 5 0
  211. &pioD 4 0
  212. 0
  213. >;
  214. status = "disabled";
  215. };
  216. usb0: ohci@00600000 {
  217. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  218. reg = <0x00600000 0x100000>;
  219. interrupts = <22 4 2>;
  220. status = "disabled";
  221. };
  222. usb1: ehci@00700000 {
  223. compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  224. reg = <0x00700000 0x100000>;
  225. interrupts = <22 4 2>;
  226. status = "disabled";
  227. };
  228. };
  229. i2c@0 {
  230. compatible = "i2c-gpio";
  231. gpios = <&pioA 30 0 /* sda */
  232. &pioA 31 0 /* scl */
  233. >;
  234. i2c-gpio,sda-open-drain;
  235. i2c-gpio,scl-open-drain;
  236. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  237. #address-cells = <1>;
  238. #size-cells = <0>;
  239. status = "disabled";
  240. };
  241. i2c@1 {
  242. compatible = "i2c-gpio";
  243. gpios = <&pioC 0 0 /* sda */
  244. &pioC 1 0 /* scl */
  245. >;
  246. i2c-gpio,sda-open-drain;
  247. i2c-gpio,scl-open-drain;
  248. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  249. #address-cells = <1>;
  250. #size-cells = <0>;
  251. status = "disabled";
  252. };
  253. i2c@2 {
  254. compatible = "i2c-gpio";
  255. gpios = <&pioB 4 0 /* sda */
  256. &pioB 5 0 /* scl */
  257. >;
  258. i2c-gpio,sda-open-drain;
  259. i2c-gpio,scl-open-drain;
  260. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  261. #address-cells = <1>;
  262. #size-cells = <0>;
  263. status = "disabled";
  264. };
  265. };