at91sam9n12.dtsi 4.6 KB

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  1. /*
  2. * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
  3. *
  4. * Copyright (C) 2012 Atmel,
  5. * 2012 Hong Xu <hong.xu@atmel.com>
  6. *
  7. * Licensed under GPLv2 or later.
  8. */
  9. /include/ "skeleton.dtsi"
  10. / {
  11. model = "Atmel AT91SAM9N12 SoC";
  12. compatible = "atmel,at91sam9n12";
  13. interrupt-parent = <&aic>;
  14. aliases {
  15. serial0 = &dbgu;
  16. serial1 = &usart0;
  17. serial2 = &usart1;
  18. serial3 = &usart2;
  19. serial4 = &usart3;
  20. gpio0 = &pioA;
  21. gpio1 = &pioB;
  22. gpio2 = &pioC;
  23. gpio3 = &pioD;
  24. tcb0 = &tcb0;
  25. tcb1 = &tcb1;
  26. };
  27. cpus {
  28. cpu@0 {
  29. compatible = "arm,arm926ejs";
  30. };
  31. };
  32. memory {
  33. reg = <0x20000000 0x10000000>;
  34. };
  35. ahb {
  36. compatible = "simple-bus";
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. ranges;
  40. apb {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. ranges;
  45. aic: interrupt-controller@fffff000 {
  46. #interrupt-cells = <3>;
  47. compatible = "atmel,at91rm9200-aic";
  48. interrupt-controller;
  49. reg = <0xfffff000 0x200>;
  50. };
  51. ramc0: ramc@ffffe800 {
  52. compatible = "atmel,at91sam9g45-ddramc";
  53. reg = <0xffffe800 0x200>;
  54. };
  55. pmc: pmc@fffffc00 {
  56. compatible = "atmel,at91rm9200-pmc";
  57. reg = <0xfffffc00 0x100>;
  58. };
  59. rstc@fffffe00 {
  60. compatible = "atmel,at91sam9g45-rstc";
  61. reg = <0xfffffe00 0x10>;
  62. };
  63. pit: timer@fffffe30 {
  64. compatible = "atmel,at91sam9260-pit";
  65. reg = <0xfffffe30 0xf>;
  66. interrupts = <1 4 7>;
  67. };
  68. shdwc@fffffe10 {
  69. compatible = "atmel,at91sam9x5-shdwc";
  70. reg = <0xfffffe10 0x10>;
  71. };
  72. tcb0: timer@f8008000 {
  73. compatible = "atmel,at91sam9x5-tcb";
  74. reg = <0xf8008000 0x100>;
  75. interrupts = <17 4 0>;
  76. };
  77. tcb1: timer@f800c000 {
  78. compatible = "atmel,at91sam9x5-tcb";
  79. reg = <0xf800c000 0x100>;
  80. interrupts = <17 4 0>;
  81. };
  82. dma: dma-controller@ffffec00 {
  83. compatible = "atmel,at91sam9g45-dma";
  84. reg = <0xffffec00 0x200>;
  85. interrupts = <20 4 0>;
  86. };
  87. pioA: gpio@fffff400 {
  88. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  89. reg = <0xfffff400 0x100>;
  90. interrupts = <2 4 1>;
  91. #gpio-cells = <2>;
  92. gpio-controller;
  93. interrupt-controller;
  94. };
  95. pioB: gpio@fffff600 {
  96. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  97. reg = <0xfffff600 0x100>;
  98. interrupts = <2 4 1>;
  99. #gpio-cells = <2>;
  100. gpio-controller;
  101. interrupt-controller;
  102. };
  103. pioC: gpio@fffff800 {
  104. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  105. reg = <0xfffff800 0x100>;
  106. interrupts = <3 4 1>;
  107. #gpio-cells = <2>;
  108. gpio-controller;
  109. interrupt-controller;
  110. };
  111. pioD: gpio@fffffa00 {
  112. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  113. reg = <0xfffffa00 0x100>;
  114. interrupts = <3 4 1>;
  115. #gpio-cells = <2>;
  116. gpio-controller;
  117. interrupt-controller;
  118. };
  119. dbgu: serial@fffff200 {
  120. compatible = "atmel,at91sam9260-usart";
  121. reg = <0xfffff200 0x200>;
  122. interrupts = <1 4 7>;
  123. status = "disabled";
  124. };
  125. usart0: serial@f801c000 {
  126. compatible = "atmel,at91sam9260-usart";
  127. reg = <0xf801c000 0x4000>;
  128. interrupts = <5 4 5>;
  129. atmel,use-dma-rx;
  130. atmel,use-dma-tx;
  131. status = "disabled";
  132. };
  133. usart1: serial@f8020000 {
  134. compatible = "atmel,at91sam9260-usart";
  135. reg = <0xf8020000 0x4000>;
  136. interrupts = <6 4 5>;
  137. atmel,use-dma-rx;
  138. atmel,use-dma-tx;
  139. status = "disabled";
  140. };
  141. usart2: serial@f8024000 {
  142. compatible = "atmel,at91sam9260-usart";
  143. reg = <0xf8024000 0x4000>;
  144. interrupts = <7 4 5>;
  145. atmel,use-dma-rx;
  146. atmel,use-dma-tx;
  147. status = "disabled";
  148. };
  149. usart3: serial@f8028000 {
  150. compatible = "atmel,at91sam9260-usart";
  151. reg = <0xf8028000 0x4000>;
  152. interrupts = <8 4 5>;
  153. atmel,use-dma-rx;
  154. atmel,use-dma-tx;
  155. status = "disabled";
  156. };
  157. };
  158. nand0: nand@40000000 {
  159. compatible = "atmel,at91rm9200-nand";
  160. #address-cells = <1>;
  161. #size-cells = <1>;
  162. reg = < 0x40000000 0x10000000
  163. 0xffffe000 0x00000600
  164. 0xffffe600 0x00000200
  165. 0x00100000 0x00100000
  166. >;
  167. atmel,nand-addr-offset = <21>;
  168. atmel,nand-cmd-offset = <22>;
  169. gpios = <&pioD 5 0
  170. &pioD 4 0
  171. 0
  172. >;
  173. status = "disabled";
  174. };
  175. usb0: ohci@00500000 {
  176. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  177. reg = <0x00500000 0x00100000>;
  178. interrupts = <22 4 2>;
  179. status = "disabled";
  180. };
  181. };
  182. i2c@0 {
  183. compatible = "i2c-gpio";
  184. gpios = <&pioA 30 0 /* sda */
  185. &pioA 31 0 /* scl */
  186. >;
  187. i2c-gpio,sda-open-drain;
  188. i2c-gpio,scl-open-drain;
  189. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  190. #address-cells = <1>;
  191. #size-cells = <0>;
  192. status = "disabled";
  193. };
  194. };