i2c-protocol 2.8 KB

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  1. This document describes the i2c protocol. Or will, when it is finished :-)
  2. Key to symbols
  3. ==============
  4. S (1 bit) : Start bit
  5. P (1 bit) : Stop bit
  6. Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
  7. A, NA (1 bit) : Accept and reverse accept bit.
  8. Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
  9. get a 10 bit I2C address.
  10. Comm (8 bits): Command byte, a data byte which often selects a register on
  11. the device.
  12. Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
  13. for 16 bit data.
  14. Count (8 bits): A data byte containing the length of a block operation.
  15. [..]: Data sent by I2C device, as opposed to data sent by the host adapter.
  16. Simple send transaction
  17. ======================
  18. This corresponds to i2c_master_send.
  19. S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
  20. Simple receive transaction
  21. ===========================
  22. This corresponds to i2c_master_recv
  23. S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
  24. Combined transactions
  25. ====================
  26. This corresponds to i2c_transfer
  27. They are just like the above transactions, but instead of a stop bit P
  28. a start bit S is sent and the transaction continues. An example of
  29. a byte read, followed by a byte write:
  30. S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
  31. Modified transactions
  32. =====================
  33. The following modifications to the I2C protocol can also be generated,
  34. with the exception of I2C_M_NOSTART these are usually only needed to
  35. work around device issues:
  36. Flag I2C_M_NOSTART:
  37. In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
  38. point. For example, setting I2C_M_NOSTART on the second partial message
  39. generates something like:
  40. S Addr Rd [A] [Data] NA Data [A] P
  41. If you set the I2C_M_NOSTART variable for the first partial message,
  42. we do not generate Addr, but we do generate the startbit S. This will
  43. probably confuse all other clients on your bus, so don't try this.
  44. This is often used to gather transmits from multiple data buffers in
  45. system memory into something that appears as a single transfer to the
  46. I2C device but may also be used between direction changes by some
  47. rare devices.
  48. Flags I2C_M_REV_DIR_ADDR
  49. This toggles the Rd/Wr flag. That is, if you want to do a write, but
  50. need to emit an Rd instead of a Wr, or vice versa, you set this
  51. flag. For example:
  52. S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
  53. Flags I2C_M_IGNORE_NAK
  54. Normally message is interrupted immediately if there is [NA] from the
  55. client. Setting this flag treats any [NA] as [A], and all of
  56. message is sent.
  57. These messages may still fail to SCL lo->hi timeout.
  58. Flags I2C_M_NO_RD_ACK
  59. In a read message, master A/NA bit is skipped.