pata_ali.c 16 KB

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  1. /*
  2. * pata_ali.c - ALI 15x3 PATA for new ATA layer
  3. * (C) 2005 Red Hat Inc
  4. *
  5. * based in part upon
  6. * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
  7. *
  8. * Copyright (C) 1998-2000 Michel Aubry, Maintainer
  9. * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
  10. * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
  11. *
  12. * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
  13. * May be copied or modified under the terms of the GNU General Public License
  14. * Copyright (C) 2002 Alan Cox <alan@redhat.com>
  15. * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
  16. *
  17. * Documentation
  18. * Chipset documentation available under NDA only
  19. *
  20. * TODO/CHECK
  21. * Cannot have ATAPI on both master & slave for rev < c2 (???) but
  22. * otherwise should do atapi DMA (For now for old we do PIO only for
  23. * ATAPI)
  24. * Review Sunblade workaround.
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/init.h>
  30. #include <linux/blkdev.h>
  31. #include <linux/delay.h>
  32. #include <scsi/scsi_host.h>
  33. #include <linux/libata.h>
  34. #include <linux/dmi.h>
  35. #define DRV_NAME "pata_ali"
  36. #define DRV_VERSION "0.7.7"
  37. static int ali_atapi_dma = 0;
  38. module_param_named(atapi_dma, ali_atapi_dma, int, 0644);
  39. MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)");
  40. static struct pci_dev *isa_bridge;
  41. /*
  42. * Cable special cases
  43. */
  44. static const struct dmi_system_id cable_dmi_table[] = {
  45. {
  46. .ident = "HP Pavilion N5430",
  47. .matches = {
  48. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  49. DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
  50. },
  51. },
  52. {
  53. .ident = "Toshiba Satelite S1800-814",
  54. .matches = {
  55. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  56. DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
  57. },
  58. },
  59. { }
  60. };
  61. static int ali_cable_override(struct pci_dev *pdev)
  62. {
  63. /* Fujitsu P2000 */
  64. if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
  65. return 1;
  66. /* Mitac 8317 (Winbook-A) and relatives */
  67. if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317)
  68. return 1;
  69. /* Systems by DMI */
  70. if (dmi_check_system(cable_dmi_table))
  71. return 1;
  72. return 0;
  73. }
  74. /**
  75. * ali_c2_cable_detect - cable detection
  76. * @ap: ATA port
  77. *
  78. * Perform cable detection for C2 and later revisions
  79. */
  80. static int ali_c2_cable_detect(struct ata_port *ap)
  81. {
  82. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  83. u8 ata66;
  84. /* Certain laptops use short but suitable cables and don't
  85. implement the detect logic */
  86. if (ali_cable_override(pdev))
  87. return ATA_CBL_PATA40_SHORT;
  88. /* Host view cable detect 0x4A bit 0 primary bit 1 secondary
  89. Bit set for 40 pin */
  90. pci_read_config_byte(pdev, 0x4A, &ata66);
  91. if (ata66 & (1 << ap->port_no))
  92. return ATA_CBL_PATA40;
  93. else
  94. return ATA_CBL_PATA80;
  95. }
  96. /**
  97. * ali_20_filter - filter for earlier ALI DMA
  98. * @ap: ALi ATA port
  99. * @adev: attached device
  100. *
  101. * Ensure that we do not do DMA on CD devices. We may be able to
  102. * fix that later on. Also ensure we do not do UDMA on WDC drives
  103. */
  104. static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
  105. {
  106. char model_num[ATA_ID_PROD_LEN + 1];
  107. /* No DMA on anything but a disk for now */
  108. if (adev->class != ATA_DEV_ATA)
  109. mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  110. ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
  111. if (strstr(model_num, "WDC"))
  112. return mask &= ~ATA_MASK_UDMA;
  113. return ata_bmdma_mode_filter(adev, mask);
  114. }
  115. /**
  116. * ali_fifo_control - FIFO manager
  117. * @ap: ALi channel to control
  118. * @adev: device for FIFO control
  119. * @on: 0 for off 1 for on
  120. *
  121. * Enable or disable the FIFO on a given device. Because of the way the
  122. * ALi FIFO works it provides a boost on ATA disk but can be confused by
  123. * ATAPI and we must therefore manage it.
  124. */
  125. static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
  126. {
  127. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  128. int pio_fifo = 0x54 + ap->port_no;
  129. u8 fifo;
  130. int shift = 4 * adev->devno;
  131. /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
  132. 0x00. Not all the docs agree but the behaviour we now use is the
  133. one stated in the BIOS Programming Guide */
  134. pci_read_config_byte(pdev, pio_fifo, &fifo);
  135. fifo &= ~(0x0F << shift);
  136. if (on)
  137. fifo |= (on << shift);
  138. pci_write_config_byte(pdev, pio_fifo, fifo);
  139. }
  140. /**
  141. * ali_program_modes - load mode registers
  142. * @ap: ALi channel to load
  143. * @adev: Device the timing is for
  144. * @cmd: Command timing
  145. * @data: Data timing
  146. * @ultra: UDMA timing or zero for off
  147. *
  148. * Loads the timing registers for cmd/data and disable UDMA if
  149. * ultra is zero. If ultra is set then load and enable the UDMA
  150. * timing but do not touch the command/data timing.
  151. */
  152. static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
  153. {
  154. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  155. int cas = 0x58 + 4 * ap->port_no; /* Command timing */
  156. int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
  157. int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
  158. int udmat = 0x56 + ap->port_no; /* UDMA timing */
  159. int shift = 4 * adev->devno;
  160. u8 udma;
  161. if (t != NULL) {
  162. t->setup = clamp_val(t->setup, 1, 8) & 7;
  163. t->act8b = clamp_val(t->act8b, 1, 8) & 7;
  164. t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
  165. t->active = clamp_val(t->active, 1, 8) & 7;
  166. t->recover = clamp_val(t->recover, 1, 16) & 15;
  167. pci_write_config_byte(pdev, cas, t->setup);
  168. pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
  169. pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
  170. }
  171. /* Set up the UDMA enable */
  172. pci_read_config_byte(pdev, udmat, &udma);
  173. udma &= ~(0x0F << shift);
  174. udma |= ultra << shift;
  175. pci_write_config_byte(pdev, udmat, udma);
  176. }
  177. /**
  178. * ali_set_piomode - set initial PIO mode data
  179. * @ap: ATA interface
  180. * @adev: ATA device
  181. *
  182. * Program the ALi registers for PIO mode. FIXME: add timings for
  183. * PIO5.
  184. */
  185. static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
  186. {
  187. struct ata_device *pair = ata_dev_pair(adev);
  188. struct ata_timing t;
  189. unsigned long T = 1000000000 / 33333; /* PCI clock based */
  190. ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
  191. if (pair) {
  192. struct ata_timing p;
  193. ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
  194. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  195. if (pair->dma_mode) {
  196. ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
  197. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  198. }
  199. }
  200. /* PIO FIFO is only permitted on ATA disk */
  201. if (adev->class != ATA_DEV_ATA)
  202. ali_fifo_control(ap, adev, 0x00);
  203. ali_program_modes(ap, adev, &t, 0);
  204. if (adev->class == ATA_DEV_ATA)
  205. ali_fifo_control(ap, adev, 0x05);
  206. }
  207. /**
  208. * ali_set_dmamode - set initial DMA mode data
  209. * @ap: ATA interface
  210. * @adev: ATA device
  211. *
  212. * FIXME: MWDMA timings
  213. */
  214. static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  215. {
  216. static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
  217. struct ata_device *pair = ata_dev_pair(adev);
  218. struct ata_timing t;
  219. unsigned long T = 1000000000 / 33333; /* PCI clock based */
  220. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  221. if (adev->class == ATA_DEV_ATA)
  222. ali_fifo_control(ap, adev, 0x08);
  223. if (adev->dma_mode >= XFER_UDMA_0) {
  224. ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
  225. if (adev->dma_mode >= XFER_UDMA_3) {
  226. u8 reg4b;
  227. pci_read_config_byte(pdev, 0x4B, &reg4b);
  228. reg4b |= 1;
  229. pci_write_config_byte(pdev, 0x4B, reg4b);
  230. }
  231. } else {
  232. ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
  233. if (pair) {
  234. struct ata_timing p;
  235. ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
  236. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  237. if (pair->dma_mode) {
  238. ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
  239. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  240. }
  241. }
  242. ali_program_modes(ap, adev, &t, 0);
  243. }
  244. }
  245. /**
  246. * ali_warn_atapi_dma - Warn about ATAPI DMA disablement
  247. * @adev: Device
  248. *
  249. * Whine about ATAPI DMA disablement if @adev is an ATAPI device.
  250. * Can be used as ->dev_config.
  251. */
  252. static void ali_warn_atapi_dma(struct ata_device *adev)
  253. {
  254. struct ata_eh_context *ehc = &adev->link->eh_context;
  255. int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
  256. if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) {
  257. ata_dev_printk(adev, KERN_WARNING,
  258. "WARNING: ATAPI DMA disabled for reliablity issues. It can be enabled\n");
  259. ata_dev_printk(adev, KERN_WARNING,
  260. "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n");
  261. }
  262. }
  263. /**
  264. * ali_lock_sectors - Keep older devices to 255 sector mode
  265. * @adev: Device
  266. *
  267. * Called during the bus probe for each device that is found. We use
  268. * this call to lock the sector count of the device to 255 or less on
  269. * older ALi controllers. If we didn't do this then large I/O's would
  270. * require LBA48 commands which the older ALi requires are issued by
  271. * slower PIO methods
  272. */
  273. static void ali_lock_sectors(struct ata_device *adev)
  274. {
  275. adev->max_sectors = 255;
  276. ali_warn_atapi_dma(adev);
  277. }
  278. /**
  279. * ali_check_atapi_dma - DMA check for most ALi controllers
  280. * @adev: Device
  281. *
  282. * Called to decide whether commands should be sent by DMA or PIO
  283. */
  284. static int ali_check_atapi_dma(struct ata_queued_cmd *qc)
  285. {
  286. if (!ali_atapi_dma) {
  287. /* FIXME: pata_ali can't do ATAPI DMA reliably but the
  288. * IDE alim15x3 driver can. I tried lots of things
  289. * but couldn't find what the actual difference was.
  290. * If you got an idea, please write it to
  291. * linux-ide@vger.kernel.org and cc htejun@gmail.com.
  292. *
  293. * Disable ATAPI DMA for now.
  294. */
  295. return -EOPNOTSUPP;
  296. }
  297. /* If its not a media command, its not worth it */
  298. if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC)
  299. return -EOPNOTSUPP;
  300. return 0;
  301. }
  302. static struct scsi_host_template ali_sht = {
  303. ATA_BMDMA_SHT(DRV_NAME),
  304. };
  305. /*
  306. * Port operations for PIO only ALi
  307. */
  308. static struct ata_port_operations ali_early_port_ops = {
  309. .inherits = &ata_sff_port_ops,
  310. .cable_detect = ata_cable_40wire,
  311. .set_piomode = ali_set_piomode,
  312. };
  313. static const struct ata_port_operations ali_dma_base_ops = {
  314. .inherits = &ata_bmdma_port_ops,
  315. .set_piomode = ali_set_piomode,
  316. .set_dmamode = ali_set_dmamode,
  317. };
  318. /*
  319. * Port operations for DMA capable ALi without cable
  320. * detect
  321. */
  322. static struct ata_port_operations ali_20_port_ops = {
  323. .inherits = &ali_dma_base_ops,
  324. .cable_detect = ata_cable_40wire,
  325. .mode_filter = ali_20_filter,
  326. .check_atapi_dma = ali_check_atapi_dma,
  327. .dev_config = ali_lock_sectors,
  328. };
  329. /*
  330. * Port operations for DMA capable ALi with cable detect
  331. */
  332. static struct ata_port_operations ali_c2_port_ops = {
  333. .inherits = &ali_dma_base_ops,
  334. .check_atapi_dma = ali_check_atapi_dma,
  335. .cable_detect = ali_c2_cable_detect,
  336. .dev_config = ali_lock_sectors,
  337. };
  338. /*
  339. * Port operations for DMA capable ALi with cable detect and LBA48
  340. */
  341. static struct ata_port_operations ali_c5_port_ops = {
  342. .inherits = &ali_dma_base_ops,
  343. .check_atapi_dma = ali_check_atapi_dma,
  344. .dev_config = ali_warn_atapi_dma,
  345. .cable_detect = ali_c2_cable_detect,
  346. };
  347. /**
  348. * ali_init_chipset - chip setup function
  349. * @pdev: PCI device of ATA controller
  350. *
  351. * Perform the setup on the device that must be done both at boot
  352. * and at resume time.
  353. */
  354. static void ali_init_chipset(struct pci_dev *pdev)
  355. {
  356. u8 tmp;
  357. struct pci_dev *north;
  358. /*
  359. * The chipset revision selects the driver operations and
  360. * mode data.
  361. */
  362. if (pdev->revision <= 0x20) {
  363. pci_read_config_byte(pdev, 0x53, &tmp);
  364. tmp |= 0x03;
  365. pci_write_config_byte(pdev, 0x53, tmp);
  366. } else {
  367. pci_read_config_byte(pdev, 0x4a, &tmp);
  368. pci_write_config_byte(pdev, 0x4a, tmp | 0x20);
  369. pci_read_config_byte(pdev, 0x4B, &tmp);
  370. if (pdev->revision < 0xC2)
  371. /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
  372. /* Clear CD-ROM DMA write bit */
  373. tmp &= 0x7F;
  374. /* Cable and UDMA */
  375. pci_write_config_byte(pdev, 0x4B, tmp | 0x09);
  376. /*
  377. * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
  378. * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
  379. * via 0x54/55.
  380. */
  381. pci_read_config_byte(pdev, 0x53, &tmp);
  382. if (pdev->revision >= 0xc7)
  383. tmp |= 0x03;
  384. else
  385. tmp |= 0x01; /* CD_ROM enable for DMA */
  386. pci_write_config_byte(pdev, 0x53, tmp);
  387. }
  388. north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
  389. if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
  390. /* Configure the ALi bridge logic. For non ALi rely on BIOS.
  391. Set the south bridge enable bit */
  392. pci_read_config_byte(isa_bridge, 0x79, &tmp);
  393. if (pdev->revision == 0xC2)
  394. pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
  395. else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
  396. pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
  397. }
  398. pci_dev_put(north);
  399. ata_pci_bmdma_clear_simplex(pdev);
  400. }
  401. /**
  402. * ali_init_one - discovery callback
  403. * @pdev: PCI device ID
  404. * @id: PCI table info
  405. *
  406. * An ALi IDE interface has been discovered. Figure out what revision
  407. * and perform configuration work before handing it to the ATA layer
  408. */
  409. static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
  410. {
  411. static const struct ata_port_info info_early = {
  412. .flags = ATA_FLAG_SLAVE_POSS,
  413. .pio_mask = 0x1f,
  414. .port_ops = &ali_early_port_ops
  415. };
  416. /* Revision 0x20 added DMA */
  417. static const struct ata_port_info info_20 = {
  418. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
  419. .pio_mask = 0x1f,
  420. .mwdma_mask = 0x07,
  421. .port_ops = &ali_20_port_ops
  422. };
  423. /* Revision 0x20 with support logic added UDMA */
  424. static const struct ata_port_info info_20_udma = {
  425. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
  426. .pio_mask = 0x1f,
  427. .mwdma_mask = 0x07,
  428. .udma_mask = 0x07, /* UDMA33 */
  429. .port_ops = &ali_20_port_ops
  430. };
  431. /* Revision 0xC2 adds UDMA66 */
  432. static const struct ata_port_info info_c2 = {
  433. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
  434. .pio_mask = 0x1f,
  435. .mwdma_mask = 0x07,
  436. .udma_mask = ATA_UDMA4,
  437. .port_ops = &ali_c2_port_ops
  438. };
  439. /* Revision 0xC3 is UDMA66 for now */
  440. static const struct ata_port_info info_c3 = {
  441. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
  442. .pio_mask = 0x1f,
  443. .mwdma_mask = 0x07,
  444. .udma_mask = ATA_UDMA4,
  445. .port_ops = &ali_c2_port_ops
  446. };
  447. /* Revision 0xC4 is UDMA100 */
  448. static const struct ata_port_info info_c4 = {
  449. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
  450. .pio_mask = 0x1f,
  451. .mwdma_mask = 0x07,
  452. .udma_mask = ATA_UDMA5,
  453. .port_ops = &ali_c2_port_ops
  454. };
  455. /* Revision 0xC5 is UDMA133 with LBA48 DMA */
  456. static const struct ata_port_info info_c5 = {
  457. .flags = ATA_FLAG_SLAVE_POSS,
  458. .pio_mask = 0x1f,
  459. .mwdma_mask = 0x07,
  460. .udma_mask = ATA_UDMA6,
  461. .port_ops = &ali_c5_port_ops
  462. };
  463. const struct ata_port_info *ppi[] = { NULL, NULL };
  464. u8 tmp;
  465. int rc;
  466. rc = pcim_enable_device(pdev);
  467. if (rc)
  468. return rc;
  469. /*
  470. * The chipset revision selects the driver operations and
  471. * mode data.
  472. */
  473. if (pdev->revision < 0x20) {
  474. ppi[0] = &info_early;
  475. } else if (pdev->revision < 0xC2) {
  476. ppi[0] = &info_20;
  477. } else if (pdev->revision == 0xC2) {
  478. ppi[0] = &info_c2;
  479. } else if (pdev->revision == 0xC3) {
  480. ppi[0] = &info_c3;
  481. } else if (pdev->revision == 0xC4) {
  482. ppi[0] = &info_c4;
  483. } else
  484. ppi[0] = &info_c5;
  485. ali_init_chipset(pdev);
  486. if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) {
  487. /* Are we paired with a UDMA capable chip */
  488. pci_read_config_byte(isa_bridge, 0x5E, &tmp);
  489. if ((tmp & 0x1E) == 0x12)
  490. ppi[0] = &info_20_udma;
  491. }
  492. return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL);
  493. }
  494. #ifdef CONFIG_PM
  495. static int ali_reinit_one(struct pci_dev *pdev)
  496. {
  497. struct ata_host *host = dev_get_drvdata(&pdev->dev);
  498. int rc;
  499. rc = ata_pci_device_do_resume(pdev);
  500. if (rc)
  501. return rc;
  502. ali_init_chipset(pdev);
  503. ata_host_resume(host);
  504. return 0;
  505. }
  506. #endif
  507. static const struct pci_device_id ali[] = {
  508. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
  509. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
  510. { },
  511. };
  512. static struct pci_driver ali_pci_driver = {
  513. .name = DRV_NAME,
  514. .id_table = ali,
  515. .probe = ali_init_one,
  516. .remove = ata_pci_remove_one,
  517. #ifdef CONFIG_PM
  518. .suspend = ata_pci_device_suspend,
  519. .resume = ali_reinit_one,
  520. #endif
  521. };
  522. static int __init ali_init(void)
  523. {
  524. int ret;
  525. isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
  526. ret = pci_register_driver(&ali_pci_driver);
  527. if (ret < 0)
  528. pci_dev_put(isa_bridge);
  529. return ret;
  530. }
  531. static void __exit ali_exit(void)
  532. {
  533. pci_unregister_driver(&ali_pci_driver);
  534. pci_dev_put(isa_bridge);
  535. }
  536. MODULE_AUTHOR("Alan Cox");
  537. MODULE_DESCRIPTION("low-level driver for ALi PATA");
  538. MODULE_LICENSE("GPL");
  539. MODULE_DEVICE_TABLE(pci, ali);
  540. MODULE_VERSION(DRV_VERSION);
  541. module_init(ali_init);
  542. module_exit(ali_exit);