sequoia.dts 8.5 KB

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  1. /*
  2. * Device Tree Source for AMCC Sequoia
  3. *
  4. * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
  5. * Copyright (c) 2006, 2007 IBM Corp.
  6. *
  7. * FIXME: Draft only!
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without
  11. * any warranty of any kind, whether express or implied.
  12. *
  13. */
  14. / {
  15. #address-cells = <2>;
  16. #size-cells = <1>;
  17. model = "amcc,sequoia";
  18. compatible = "amcc,sequoia";
  19. dcr-parent = <&/cpus/cpu@0>;
  20. aliases {
  21. ethernet0 = &EMAC0;
  22. ethernet1 = &EMAC1;
  23. serial0 = &UART0;
  24. serial1 = &UART1;
  25. serial2 = &UART2;
  26. serial3 = &UART3;
  27. };
  28. cpus {
  29. #address-cells = <1>;
  30. #size-cells = <0>;
  31. cpu@0 {
  32. device_type = "cpu";
  33. model = "PowerPC,440EPx";
  34. reg = <0>;
  35. clock-frequency = <0>; /* Filled in by zImage */
  36. timebase-frequency = <0>; /* Filled in by zImage */
  37. i-cache-line-size = <20>;
  38. d-cache-line-size = <20>;
  39. i-cache-size = <8000>;
  40. d-cache-size = <8000>;
  41. dcr-controller;
  42. dcr-access-method = "native";
  43. };
  44. };
  45. memory {
  46. device_type = "memory";
  47. reg = <0 0 0>; /* Filled in by zImage */
  48. };
  49. UIC0: interrupt-controller0 {
  50. compatible = "ibm,uic-440epx","ibm,uic";
  51. interrupt-controller;
  52. cell-index = <0>;
  53. dcr-reg = <0c0 009>;
  54. #address-cells = <0>;
  55. #size-cells = <0>;
  56. #interrupt-cells = <2>;
  57. };
  58. UIC1: interrupt-controller1 {
  59. compatible = "ibm,uic-440epx","ibm,uic";
  60. interrupt-controller;
  61. cell-index = <1>;
  62. dcr-reg = <0d0 009>;
  63. #address-cells = <0>;
  64. #size-cells = <0>;
  65. #interrupt-cells = <2>;
  66. interrupts = <1e 4 1f 4>; /* cascade */
  67. interrupt-parent = <&UIC0>;
  68. };
  69. UIC2: interrupt-controller2 {
  70. compatible = "ibm,uic-440epx","ibm,uic";
  71. interrupt-controller;
  72. cell-index = <2>;
  73. dcr-reg = <0e0 009>;
  74. #address-cells = <0>;
  75. #size-cells = <0>;
  76. #interrupt-cells = <2>;
  77. interrupts = <1c 4 1d 4>; /* cascade */
  78. interrupt-parent = <&UIC0>;
  79. };
  80. SDR0: sdr {
  81. compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
  82. dcr-reg = <00e 002>;
  83. };
  84. CPR0: cpr {
  85. compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
  86. dcr-reg = <00c 002>;
  87. };
  88. plb {
  89. compatible = "ibm,plb-440epx", "ibm,plb4";
  90. #address-cells = <2>;
  91. #size-cells = <1>;
  92. ranges;
  93. clock-frequency = <0>; /* Filled in by zImage */
  94. SDRAM0: sdram {
  95. compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
  96. dcr-reg = <010 2>;
  97. };
  98. DMA0: dma {
  99. compatible = "ibm,dma-440epx", "ibm,dma-4xx";
  100. dcr-reg = <100 027>;
  101. };
  102. MAL0: mcmal {
  103. compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
  104. dcr-reg = <180 62>;
  105. num-tx-chans = <2>;
  106. num-rx-chans = <2>;
  107. interrupt-parent = <&MAL0>;
  108. interrupts = <0 1 2 3 4>;
  109. #interrupt-cells = <1>;
  110. #address-cells = <0>;
  111. #size-cells = <0>;
  112. interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
  113. /*RXEOB*/ 1 &UIC0 b 4
  114. /*SERR*/ 2 &UIC1 0 4
  115. /*TXDE*/ 3 &UIC1 1 4
  116. /*RXDE*/ 4 &UIC1 2 4>;
  117. interrupt-map-mask = <ffffffff>;
  118. };
  119. USB1: usb@e0000400 {
  120. compatible = "ohci-be";
  121. reg = <0 e0000400 60>;
  122. interrupt-parent = <&UIC0>;
  123. interrupts = <15 8>;
  124. };
  125. POB0: opb {
  126. compatible = "ibm,opb-440epx", "ibm,opb";
  127. #address-cells = <1>;
  128. #size-cells = <1>;
  129. ranges = <00000000 1 00000000 80000000
  130. 80000000 1 80000000 80000000>;
  131. interrupt-parent = <&UIC1>;
  132. interrupts = <7 4>;
  133. clock-frequency = <0>; /* Filled in by zImage */
  134. EBC0: ebc {
  135. compatible = "ibm,ebc-440epx", "ibm,ebc";
  136. dcr-reg = <012 2>;
  137. #address-cells = <2>;
  138. #size-cells = <1>;
  139. clock-frequency = <0>; /* Filled in by zImage */
  140. interrupts = <5 1>;
  141. interrupt-parent = <&UIC1>;
  142. nor_flash@0,0 {
  143. compatible = "amd,s29gl256n", "cfi-flash";
  144. bank-width = <2>;
  145. reg = <0 000000 4000000>;
  146. #address-cells = <1>;
  147. #size-cells = <1>;
  148. partition@0 {
  149. label = "Kernel";
  150. reg = <0 180000>;
  151. };
  152. partition@180000 {
  153. label = "ramdisk";
  154. reg = <180000 200000>;
  155. };
  156. partition@380000 {
  157. label = "file system";
  158. reg = <380000 3aa0000>;
  159. };
  160. partition@3e20000 {
  161. label = "kozio";
  162. reg = <3e20000 140000>;
  163. };
  164. partition@3f60000 {
  165. label = "env";
  166. reg = <3f60000 40000>;
  167. };
  168. partition@3fa0000 {
  169. label = "u-boot";
  170. reg = <3fa0000 60000>;
  171. };
  172. };
  173. };
  174. UART0: serial@ef600300 {
  175. device_type = "serial";
  176. compatible = "ns16550";
  177. reg = <ef600300 8>;
  178. virtual-reg = <ef600300>;
  179. clock-frequency = <0>; /* Filled in by zImage */
  180. current-speed = <1c200>;
  181. interrupt-parent = <&UIC0>;
  182. interrupts = <0 4>;
  183. };
  184. UART1: serial@ef600400 {
  185. device_type = "serial";
  186. compatible = "ns16550";
  187. reg = <ef600400 8>;
  188. virtual-reg = <ef600400>;
  189. clock-frequency = <0>;
  190. current-speed = <0>;
  191. interrupt-parent = <&UIC0>;
  192. interrupts = <1 4>;
  193. };
  194. UART2: serial@ef600500 {
  195. device_type = "serial";
  196. compatible = "ns16550";
  197. reg = <ef600500 8>;
  198. virtual-reg = <ef600500>;
  199. clock-frequency = <0>;
  200. current-speed = <0>;
  201. interrupt-parent = <&UIC1>;
  202. interrupts = <3 4>;
  203. };
  204. UART3: serial@ef600600 {
  205. device_type = "serial";
  206. compatible = "ns16550";
  207. reg = <ef600600 8>;
  208. virtual-reg = <ef600600>;
  209. clock-frequency = <0>;
  210. current-speed = <0>;
  211. interrupt-parent = <&UIC1>;
  212. interrupts = <4 4>;
  213. };
  214. IIC0: i2c@ef600700 {
  215. device_type = "i2c";
  216. compatible = "ibm,iic-440epx", "ibm,iic";
  217. reg = <ef600700 14>;
  218. interrupt-parent = <&UIC0>;
  219. interrupts = <2 4>;
  220. };
  221. IIC1: i2c@ef600800 {
  222. device_type = "i2c";
  223. compatible = "ibm,iic-440epx", "ibm,iic";
  224. reg = <ef600800 14>;
  225. interrupt-parent = <&UIC0>;
  226. interrupts = <7 4>;
  227. };
  228. ZMII0: emac-zmii@ef600d00 {
  229. device_type = "zmii-interface";
  230. compatible = "ibm,zmii-440epx", "ibm,zmii";
  231. reg = <ef600d00 c>;
  232. };
  233. RGMII0: emac-rgmii@ef601000 {
  234. device_type = "rgmii-interface";
  235. compatible = "ibm,rgmii-440epx", "ibm,rgmii";
  236. reg = <ef601000 8>;
  237. has-mdio;
  238. };
  239. EMAC0: ethernet@ef600e00 {
  240. linux,network-index = <0>;
  241. device_type = "network";
  242. compatible = "ibm,emac-440epx", "ibm,emac4";
  243. interrupt-parent = <&EMAC0>;
  244. interrupts = <0 1>;
  245. #interrupt-cells = <1>;
  246. #address-cells = <0>;
  247. #size-cells = <0>;
  248. interrupt-map = </*Status*/ 0 &UIC0 18 4
  249. /*Wake*/ 1 &UIC1 1d 4>;
  250. reg = <ef600e00 70>;
  251. local-mac-address = [000000000000];
  252. mal-device = <&MAL0>;
  253. mal-tx-channel = <0>;
  254. mal-rx-channel = <0>;
  255. cell-index = <0>;
  256. max-frame-size = <5dc>;
  257. rx-fifo-size = <1000>;
  258. tx-fifo-size = <800>;
  259. phy-mode = "rgmii";
  260. phy-map = <00000000>;
  261. zmii-device = <&ZMII0>;
  262. zmii-channel = <0>;
  263. rgmii-device = <&RGMII0>;
  264. rgmii-channel = <0>;
  265. has-inverted-stacr-oc;
  266. has-new-stacr-staopc;
  267. };
  268. EMAC1: ethernet@ef600f00 {
  269. linux,network-index = <1>;
  270. device_type = "network";
  271. compatible = "ibm,emac-440epx", "ibm,emac4";
  272. interrupt-parent = <&EMAC1>;
  273. interrupts = <0 1>;
  274. #interrupt-cells = <1>;
  275. #address-cells = <0>;
  276. #size-cells = <0>;
  277. interrupt-map = </*Status*/ 0 &UIC0 19 4
  278. /*Wake*/ 1 &UIC1 1f 4>;
  279. reg = <ef600f00 70>;
  280. local-mac-address = [000000000000];
  281. mal-device = <&MAL0>;
  282. mal-tx-channel = <1>;
  283. mal-rx-channel = <1>;
  284. cell-index = <1>;
  285. max-frame-size = <5dc>;
  286. rx-fifo-size = <1000>;
  287. tx-fifo-size = <800>;
  288. phy-mode = "rgmii";
  289. phy-map = <00000000>;
  290. zmii-device = <&ZMII0>;
  291. zmii-channel = <1>;
  292. rgmii-device = <&RGMII0>;
  293. rgmii-channel = <1>;
  294. has-inverted-stacr-oc;
  295. has-new-stacr-staopc;
  296. };
  297. };
  298. PCI0: pci@1ec000000 {
  299. device_type = "pci";
  300. #interrupt-cells = <1>;
  301. #size-cells = <2>;
  302. #address-cells = <3>;
  303. compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
  304. primary;
  305. reg = <1 eec00000 8 /* Config space access */
  306. 1 eed00000 4 /* IACK */
  307. 1 eed00000 4 /* Special cycle */
  308. 1 ef400000 40>; /* Internal registers */
  309. /* Outbound ranges, one memory and one IO,
  310. * later cannot be changed. Chip supports a second
  311. * IO range but we don't use it for now
  312. */
  313. ranges = <02000000 0 80000000 1 80000000 0 10000000
  314. 01000000 0 00000000 1 e8000000 0 00100000>;
  315. /* Inbound 2GB range starting at 0 */
  316. dma-ranges = <42000000 0 0 0 0 0 80000000>;
  317. /* All PCI interrupts are routed to IRQ 67 */
  318. interrupt-map-mask = <0000 0 0 0>;
  319. interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
  320. };
  321. };
  322. chosen {
  323. linux,stdout-path = "/plb/opb/serial@ef600300";
  324. bootargs = "console=ttyS0,115200";
  325. };
  326. };