saa7164-core.c 33 KB

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  1. /*
  2. * Driver for the NXP SAA7164 PCIe bridge
  3. *
  4. * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/kmod.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/delay.h>
  30. #include <asm/div64.h>
  31. #include "saa7164.h"
  32. MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
  33. MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
  34. MODULE_LICENSE("GPL");
  35. /*
  36. 1 Basic
  37. 2
  38. 4 i2c
  39. 8 api
  40. 16 cmd
  41. 32 bus
  42. */
  43. unsigned int saa_debug;
  44. module_param_named(debug, saa_debug, int, 0644);
  45. MODULE_PARM_DESC(debug, "enable debug messages");
  46. unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
  47. module_param(encoder_buffers, int, 0644);
  48. MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
  49. unsigned int waitsecs = 10;
  50. module_param(waitsecs, int, 0644);
  51. MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
  52. static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
  53. module_param_array(card, int, NULL, 0444);
  54. MODULE_PARM_DESC(card, "card type");
  55. unsigned int print_histogram = 64;
  56. module_param(print_histogram, int, 0644);
  57. MODULE_PARM_DESC(print_histogram, "print histogram values once");
  58. unsigned int crc_checking = 1;
  59. module_param(crc_checking, int, 0644);
  60. MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
  61. unsigned int guard_checking = 1;
  62. module_param(guard_checking, int, 0644);
  63. MODULE_PARM_DESC(guard_checking, "enable dma sanity checking for buffer overruns");
  64. static unsigned int saa7164_devcount;
  65. static DEFINE_MUTEX(devlist);
  66. LIST_HEAD(saa7164_devlist);
  67. #define INT_SIZE 16
  68. void saa7164_dumphex16FF(struct saa7164_dev *dev, u8 *buf, int len)
  69. {
  70. int i;
  71. u8 tmp[16];
  72. memset(&tmp[0], 0xff, sizeof(tmp));
  73. printk(KERN_INFO "--------------------> "
  74. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  75. for (i = 0; i < len; i += 16) {
  76. if (memcmp(&tmp, buf + i, sizeof(tmp)) != 0) {
  77. printk(KERN_INFO " [0x%08x] "
  78. "%02x %02x %02x %02x %02x %02x %02x %02x "
  79. "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  80. *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
  81. *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
  82. *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
  83. *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
  84. }
  85. }
  86. }
  87. static void saa7164_pack_verifier(struct saa7164_buffer *buf)
  88. {
  89. u8 *p = (u8 *)buf->cpu;
  90. int i;
  91. for (i = 0; i < buf->actual_size; i += 2048) {
  92. if ( (*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
  93. (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA) ) {
  94. printk(KERN_ERR "No pack at 0x%x\n", i);
  95. // saa7164_dumphex16FF(buf->port->dev, (p + i), 32);
  96. }
  97. }
  98. }
  99. #define FIXED_VIDEO_PID 0xf1
  100. #define FIXED_AUDIO_PID 0xf2
  101. static void saa7164_ts_verifier(struct saa7164_buffer *buf)
  102. {
  103. struct saa7164_port *port = buf->port;
  104. u32 i;
  105. u8 cc, a;
  106. u16 pid;
  107. u8 __iomem *bufcpu = (u8 *)buf->cpu;
  108. port->sync_errors = 0;
  109. port->v_cc_errors = 0;
  110. port->a_cc_errors = 0;
  111. for (i = 0; i < buf->actual_size; i += 188) {
  112. if (*(bufcpu + i) != 0x47)
  113. port->sync_errors++;
  114. /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
  115. pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
  116. cc = *(bufcpu + i + 3) & 0x0f;
  117. if (pid == FIXED_VIDEO_PID) {
  118. a = ((port->last_v_cc + 1) & 0x0f);
  119. if (a != cc) {
  120. printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
  121. port->last_v_cc, cc, i);
  122. port->v_cc_errors++;
  123. }
  124. port->last_v_cc = cc;
  125. } else
  126. if (pid == FIXED_AUDIO_PID) {
  127. a = ((port->last_a_cc + 1) & 0x0f);
  128. if (a != cc) {
  129. printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
  130. port->last_a_cc, cc, i);
  131. port->a_cc_errors++;
  132. }
  133. port->last_a_cc = cc;
  134. }
  135. }
  136. if (port->v_cc_errors)
  137. printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
  138. if (port->a_cc_errors)
  139. printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
  140. if (port->sync_errors)
  141. printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
  142. }
  143. static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
  144. {
  145. int i;
  146. memset(hg, 0, sizeof(struct saa7164_histogram));
  147. strcpy(hg->name, name);
  148. /* First 30ms x 1ms */
  149. for (i = 0; i < 30; i++) {
  150. hg->counter1[0 + i].val = i;
  151. }
  152. /* 30 - 200ms x 10ms */
  153. for (i = 0; i < 18; i++) {
  154. hg->counter1[30 + i].val = 30 + (i * 10);
  155. }
  156. /* 200 - 2000ms x 100ms */
  157. for (i = 0; i < 15; i++) {
  158. hg->counter1[48 + i].val = 200 + (i * 200);
  159. }
  160. /* Catch all massive value (2secs) */
  161. hg->counter1[55].val = 2000;
  162. /* Catch all massive value (4secs) */
  163. hg->counter1[56].val = 4000;
  164. /* Catch all massive value (8secs) */
  165. hg->counter1[57].val = 8000;
  166. /* Catch all massive value (15secs) */
  167. hg->counter1[58].val = 15000;
  168. /* Catch all massive value (30secs) */
  169. hg->counter1[59].val = 30000;
  170. /* Catch all massive value (60secs) */
  171. hg->counter1[60].val = 60000;
  172. /* Catch all massive value (5mins) */
  173. hg->counter1[61].val = 300000;
  174. /* Catch all massive value (15mins) */
  175. hg->counter1[62].val = 900000;
  176. /* Catch all massive values (1hr) */
  177. hg->counter1[63].val = 3600000;
  178. }
  179. void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
  180. {
  181. int i;
  182. for (i = 0; i < 64; i++ ) {
  183. if (val <= hg->counter1[i].val) {
  184. hg->counter1[i].count++;
  185. hg->counter1[i].update_time = jiffies;
  186. break;
  187. }
  188. }
  189. }
  190. static void saa7164_histogram_print(struct saa7164_port *port,
  191. struct saa7164_histogram *hg)
  192. {
  193. u32 entries = 0;
  194. int i;
  195. printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
  196. for (i = 0; i < 64; i++ ) {
  197. if (hg->counter1[i].count == 0)
  198. continue;
  199. printk(KERN_ERR " %4d %12d %Ld\n",
  200. hg->counter1[i].val,
  201. hg->counter1[i].count,
  202. hg->counter1[i].update_time);
  203. entries++;
  204. }
  205. printk(KERN_ERR "Total: %d\n", entries);
  206. }
  207. static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
  208. {
  209. struct saa7164_dev *dev = port->dev;
  210. struct saa7164_buffer *buf = 0;
  211. struct saa7164_user_buffer *ubuf = 0;
  212. struct list_head *c, *n;
  213. int i = 0;
  214. u8 __iomem *p;
  215. mutex_lock(&port->dmaqueue_lock);
  216. list_for_each_safe(c, n, &port->dmaqueue.list) {
  217. buf = list_entry(c, struct saa7164_buffer, list);
  218. if (i++ > port->hwcfg.buffercount) {
  219. printk(KERN_ERR "%s() illegal i count %d\n",
  220. __func__, i);
  221. break;
  222. }
  223. if (buf->idx == bufnr) {
  224. /* Found the buffer, deal with it */
  225. dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
  226. if (crc_checking) {
  227. /* Throw a new checksum on the dma buffer */
  228. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  229. }
  230. if (guard_checking) {
  231. p = (u8 *)buf->cpu;
  232. if ( (*(p + buf->actual_size + 0) != 0xff) ||
  233. (*(p + buf->actual_size + 1) != 0xff) ||
  234. (*(p + buf->actual_size + 2) != 0xff) ||
  235. (*(p + buf->actual_size + 3) != 0xff) ||
  236. (*(p + buf->actual_size + 0x10) != 0xff) ||
  237. (*(p + buf->actual_size + 0x11) != 0xff) ||
  238. (*(p + buf->actual_size + 0x12) != 0xff) ||
  239. (*(p + buf->actual_size + 0x13) != 0xff) ) {
  240. printk(KERN_ERR "%s() buf %p guard buffer breach\n",
  241. __func__, buf);
  242. // saa7164_dumphex16FF(dev, (p + buf->actual_size) - 32 , 64);
  243. }
  244. }
  245. /* Validate the incoming buffer content */
  246. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
  247. saa7164_ts_verifier(buf);
  248. else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
  249. saa7164_pack_verifier(buf);
  250. /* find a free user buffer and clone to it */
  251. if (!list_empty(&port->list_buf_free.list)) {
  252. /* Pull the first buffer from the used list */
  253. ubuf = list_first_entry(&port->list_buf_free.list,
  254. struct saa7164_user_buffer, list);
  255. if (buf->actual_size <= ubuf->actual_size) {
  256. memcpy_fromio(ubuf->data, buf->cpu,
  257. ubuf->actual_size);
  258. if (crc_checking) {
  259. /* Throw a new checksum on the read buffer */
  260. ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
  261. }
  262. /* Requeue the buffer on the free list */
  263. ubuf->pos = 0;
  264. list_move_tail(&ubuf->list,
  265. &port->list_buf_used.list);
  266. /* Flag any userland waiters */
  267. wake_up_interruptible(&port->wait_read);
  268. } else {
  269. printk(KERN_ERR "buf %p bufsize fails match\n", buf);
  270. }
  271. } else
  272. printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
  273. /* Ensure offset into buffer remains 0, fill buffer
  274. * with known bad data. We check for this data at a later point
  275. * in time. */
  276. saa7164_buffer_zero_offsets(port, bufnr);
  277. memset_io(buf->cpu, 0xff, buf->pci_size);
  278. if (crc_checking) {
  279. /* Throw yet aanother new checksum on the dma buffer */
  280. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  281. }
  282. break;
  283. }
  284. }
  285. mutex_unlock(&port->dmaqueue_lock);
  286. }
  287. static void saa7164_work_enchandler(struct work_struct *w)
  288. {
  289. struct saa7164_port *port =
  290. container_of(w, struct saa7164_port, workenc);
  291. struct saa7164_dev *dev = port->dev;
  292. u32 wp, mcb, rp, cnt = 0;
  293. port->last_svc_msecs_diff = port->last_svc_msecs;
  294. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  295. port->last_svc_msecs_diff = port->last_svc_msecs -
  296. port->last_svc_msecs_diff;
  297. saa7164_histogram_update(&port->svc_interval,
  298. port->last_svc_msecs_diff);
  299. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  300. port->last_irq_msecs;
  301. saa7164_histogram_update(&port->irq_svc_interval,
  302. port->last_irq_svc_msecs_diff);
  303. dprintk(DBGLVL_IRQ,
  304. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  305. __func__,
  306. port->last_svc_msecs_diff,
  307. port->last_irq_svc_msecs_diff,
  308. port->last_svc_wp,
  309. port->last_svc_rp
  310. );
  311. /* Current write position */
  312. wp = saa7164_readl(port->bufcounter);
  313. if (wp > (port->hwcfg.buffercount - 1)) {
  314. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  315. return;
  316. }
  317. /* Most current complete buffer */
  318. if (wp == 0)
  319. mcb = (port->hwcfg.buffercount - 1);
  320. else
  321. mcb = wp - 1;
  322. while (1) {
  323. if (port->done_first_interrupt == 0) {
  324. port->done_first_interrupt++;
  325. rp = mcb;
  326. } else
  327. rp = (port->last_svc_rp + 1) % 8;
  328. if ((rp < 0) || (rp > (port->hwcfg.buffercount - 1))) {
  329. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  330. break;
  331. }
  332. saa7164_work_enchandler_helper(port, rp);
  333. port->last_svc_rp = rp;
  334. cnt++;
  335. if (rp == mcb)
  336. break;
  337. }
  338. /* TODO: Convert this into a /proc/saa7164 style readable file */
  339. if (print_histogram == port->nr) {
  340. saa7164_histogram_print(port, &port->irq_interval);
  341. saa7164_histogram_print(port, &port->svc_interval);
  342. saa7164_histogram_print(port, &port->irq_svc_interval);
  343. saa7164_histogram_print(port, &port->read_interval);
  344. saa7164_histogram_print(port, &port->poll_interval);
  345. /* TODO: fix this to preserve any previous state */
  346. print_histogram = 64 + port->nr;
  347. }
  348. }
  349. static void saa7164_work_cmdhandler(struct work_struct *w)
  350. {
  351. struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
  352. /* Wake up any complete commands */
  353. saa7164_irq_dequeue(dev);
  354. }
  355. static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
  356. {
  357. struct saa7164_port *port = buf->port;
  358. /* Feed the transport payload into the kernel demux */
  359. dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
  360. SAA7164_TS_NUMBER_OF_LINES);
  361. }
  362. static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
  363. {
  364. struct saa7164_dev *dev = port->dev;
  365. /* Store old time */
  366. port->last_irq_msecs_diff = port->last_irq_msecs;
  367. /* Collect new stats */
  368. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  369. /* Calculate stats */
  370. port->last_irq_msecs_diff = port->last_irq_msecs -
  371. port->last_irq_msecs_diff;
  372. saa7164_histogram_update(&port->irq_interval,
  373. port->last_irq_msecs_diff);
  374. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  375. port->last_irq_msecs_diff);
  376. schedule_work(&port->workenc);
  377. return 0;
  378. }
  379. static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
  380. {
  381. struct saa7164_dev *dev = port->dev;
  382. struct saa7164_buffer *buf;
  383. struct list_head *c, *n;
  384. int wp, i = 0, rp;
  385. /* Find the current write point from the hardware */
  386. wp = saa7164_readl(port->bufcounter);
  387. if (wp > (port->hwcfg.buffercount - 1))
  388. BUG();
  389. /* Find the previous buffer to the current write point */
  390. if (wp == 0)
  391. rp = (port->hwcfg.buffercount - 1);
  392. else
  393. rp = wp - 1;
  394. /* Lookup the WP in the buffer list */
  395. /* TODO: turn this into a worker thread */
  396. list_for_each_safe(c, n, &port->dmaqueue.list) {
  397. buf = list_entry(c, struct saa7164_buffer, list);
  398. if (i++ > port->hwcfg.buffercount)
  399. BUG();
  400. if (buf->idx == rp) {
  401. /* Found the buffer, deal with it */
  402. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  403. __func__, wp, rp);
  404. saa7164_buffer_deliver(buf);
  405. break;
  406. }
  407. }
  408. return 0;
  409. }
  410. /* Primary IRQ handler and dispatch mechanism */
  411. static irqreturn_t saa7164_irq(int irq, void *dev_id)
  412. {
  413. struct saa7164_dev *dev = dev_id;
  414. struct saa7164_port *porta = &dev->ports[ SAA7164_PORT_TS1 ];
  415. struct saa7164_port *portb = &dev->ports[ SAA7164_PORT_TS2 ];
  416. struct saa7164_port *portc = &dev->ports[ SAA7164_PORT_ENC1 ];
  417. struct saa7164_port *portd = &dev->ports[ SAA7164_PORT_ENC2 ];
  418. u32 intid, intstat[INT_SIZE/4];
  419. int i, handled = 0, bit;
  420. if (dev == 0) {
  421. printk(KERN_ERR "%s() No device specified\n", __func__);
  422. handled = 0;
  423. goto out;
  424. }
  425. /* Check that the hardware is accessable. If the status bytes are
  426. * 0xFF then the device is not accessable, the the IRQ belongs
  427. * to another driver.
  428. * 4 x u32 interrupt registers.
  429. */
  430. for (i = 0; i < INT_SIZE/4; i++) {
  431. /* TODO: Convert into saa7164_readl() */
  432. /* Read the 4 hardware interrupt registers */
  433. intstat[i] = saa7164_readl(dev->int_status + (i * 4));
  434. if (intstat[i])
  435. handled = 1;
  436. }
  437. if (handled == 0)
  438. goto out;
  439. /* For each of the HW interrupt registers */
  440. for (i = 0; i < INT_SIZE/4; i++) {
  441. if (intstat[i]) {
  442. /* Each function of the board has it's own interruptid.
  443. * Find the function that triggered then call
  444. * it's handler.
  445. */
  446. for (bit = 0; bit < 32; bit++) {
  447. if (((intstat[i] >> bit) & 0x00000001) == 0)
  448. continue;
  449. /* Calculate the interrupt id (0x00 to 0x7f) */
  450. intid = (i * 32) + bit;
  451. if (intid == dev->intfdesc.bInterruptId) {
  452. /* A response to an cmd/api call */
  453. schedule_work(&dev->workcmd);
  454. } else if (intid == porta->hwcfg.interruptid) {
  455. /* Transport path 1 */
  456. saa7164_irq_ts(porta);
  457. } else if (intid == portb->hwcfg.interruptid) {
  458. /* Transport path 2 */
  459. saa7164_irq_ts(portb);
  460. } else if (intid == portc->hwcfg.interruptid) {
  461. /* Encoder path 1 */
  462. saa7164_irq_encoder(portc);
  463. } else if (intid == portd->hwcfg.interruptid) {
  464. /* Encoder path 1 */
  465. saa7164_irq_encoder(portd);
  466. } else {
  467. /* Find the function */
  468. dprintk(DBGLVL_IRQ,
  469. "%s() unhandled interrupt "
  470. "reg 0x%x bit 0x%x "
  471. "intid = 0x%x\n",
  472. __func__, i, bit, intid);
  473. }
  474. }
  475. /* Ack it */
  476. saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
  477. }
  478. }
  479. out:
  480. return IRQ_RETVAL(handled);
  481. }
  482. void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
  483. {
  484. struct saa7164_fw_status *s = &dev->fw_status;
  485. dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
  486. dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
  487. dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
  488. dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
  489. dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
  490. dev->fw_status.remainheap =
  491. saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
  492. dprintk(1, "Firmware status:\n");
  493. dprintk(1, " .status = 0x%08x\n", s->status);
  494. dprintk(1, " .mode = 0x%08x\n", s->mode);
  495. dprintk(1, " .spec = 0x%08x\n", s->spec);
  496. dprintk(1, " .inst = 0x%08x\n", s->inst);
  497. dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
  498. dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
  499. }
  500. u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
  501. {
  502. u32 reg;
  503. reg = saa7164_readl(SAA_DEVICE_VERSION);
  504. dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
  505. (reg & 0x0000fc00) >> 10,
  506. (reg & 0x000003e0) >> 5,
  507. (reg & 0x0000001f),
  508. (reg & 0xffff0000) >> 16,
  509. reg);
  510. return reg;
  511. }
  512. /* TODO: Debugging func, remove */
  513. void saa7164_dumphex16(struct saa7164_dev *dev, u8 *buf, int len)
  514. {
  515. int i;
  516. printk(KERN_INFO "--------------------> "
  517. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  518. for (i = 0; i < len; i += 16)
  519. printk(KERN_INFO " [0x%08x] "
  520. "%02x %02x %02x %02x %02x %02x %02x %02x "
  521. "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  522. *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
  523. *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
  524. *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
  525. *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
  526. }
  527. /* TODO: Debugging func, remove */
  528. void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
  529. {
  530. int i;
  531. dprintk(1, "--------------------> "
  532. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  533. for (i = 0; i < 0x100; i += 16)
  534. dprintk(1, "region0[0x%08x] = "
  535. "%02x %02x %02x %02x %02x %02x %02x %02x"
  536. " %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  537. (u8)saa7164_readb(addr + i + 0),
  538. (u8)saa7164_readb(addr + i + 1),
  539. (u8)saa7164_readb(addr + i + 2),
  540. (u8)saa7164_readb(addr + i + 3),
  541. (u8)saa7164_readb(addr + i + 4),
  542. (u8)saa7164_readb(addr + i + 5),
  543. (u8)saa7164_readb(addr + i + 6),
  544. (u8)saa7164_readb(addr + i + 7),
  545. (u8)saa7164_readb(addr + i + 8),
  546. (u8)saa7164_readb(addr + i + 9),
  547. (u8)saa7164_readb(addr + i + 10),
  548. (u8)saa7164_readb(addr + i + 11),
  549. (u8)saa7164_readb(addr + i + 12),
  550. (u8)saa7164_readb(addr + i + 13),
  551. (u8)saa7164_readb(addr + i + 14),
  552. (u8)saa7164_readb(addr + i + 15)
  553. );
  554. }
  555. static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
  556. {
  557. dprintk(1, "@0x%p hwdesc sizeof(tmComResHWDescr_t) = %d bytes\n",
  558. &dev->hwdesc, (u32)sizeof(tmComResHWDescr_t));
  559. dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
  560. dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
  561. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  562. dev->hwdesc.bDescriptorSubtype);
  563. dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
  564. dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
  565. dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
  566. dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
  567. dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
  568. dev->hwdesc.dwDeviceRegistersLocation);
  569. dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
  570. dev->hwdesc.dwHostMemoryRegion);
  571. dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
  572. dev->hwdesc.dwHostMemoryRegionSize);
  573. dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
  574. dev->hwdesc.dwHostHibernatMemRegion);
  575. dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
  576. dev->hwdesc.dwHostHibernatMemRegionSize);
  577. }
  578. static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
  579. {
  580. dprintk(1, "@0x%p intfdesc "
  581. "sizeof(tmComResInterfaceDescr_t) = %d bytes\n",
  582. &dev->intfdesc, (u32)sizeof(tmComResInterfaceDescr_t));
  583. dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
  584. dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
  585. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  586. dev->intfdesc.bDescriptorSubtype);
  587. dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
  588. dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
  589. dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
  590. dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
  591. dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
  592. dprintk(1, " .bDebugInterruptId = 0x%x\n",
  593. dev->intfdesc.bDebugInterruptId);
  594. dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
  595. }
  596. static void saa7164_dump_busdesc(struct saa7164_dev *dev)
  597. {
  598. dprintk(1, "@0x%p busdesc sizeof(tmComResBusDescr_t) = %d bytes\n",
  599. &dev->busdesc, (u32)sizeof(tmComResBusDescr_t));
  600. dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
  601. dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
  602. dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
  603. dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
  604. dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
  605. dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
  606. }
  607. /* Much of the hardware configuration and PCI registers are configured
  608. * dynamically depending on firmware. We have to cache some initial
  609. * structures then use these to locate other important structures
  610. * from PCI space.
  611. */
  612. static void saa7164_get_descriptors(struct saa7164_dev *dev)
  613. {
  614. memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(tmComResHWDescr_t));
  615. memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(tmComResHWDescr_t),
  616. sizeof(tmComResInterfaceDescr_t));
  617. memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
  618. sizeof(tmComResBusDescr_t));
  619. if (dev->hwdesc.bLength != sizeof(tmComResHWDescr_t)) {
  620. printk(KERN_ERR "Structure tmComResHWDescr_t is mangled\n");
  621. printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
  622. (u32)sizeof(tmComResHWDescr_t));
  623. } else
  624. saa7164_dump_hwdesc(dev);
  625. if (dev->intfdesc.bLength != sizeof(tmComResInterfaceDescr_t)) {
  626. printk(KERN_ERR "struct tmComResInterfaceDescr_t is mangled\n");
  627. printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
  628. (u32)sizeof(tmComResInterfaceDescr_t));
  629. } else
  630. saa7164_dump_intfdesc(dev);
  631. saa7164_dump_busdesc(dev);
  632. }
  633. static int saa7164_pci_quirks(struct saa7164_dev *dev)
  634. {
  635. return 0;
  636. }
  637. static int get_resources(struct saa7164_dev *dev)
  638. {
  639. if (request_mem_region(pci_resource_start(dev->pci, 0),
  640. pci_resource_len(dev->pci, 0), dev->name)) {
  641. if (request_mem_region(pci_resource_start(dev->pci, 2),
  642. pci_resource_len(dev->pci, 2), dev->name))
  643. return 0;
  644. }
  645. printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
  646. dev->name,
  647. (u64)pci_resource_start(dev->pci, 0),
  648. (u64)pci_resource_start(dev->pci, 2));
  649. return -EBUSY;
  650. }
  651. static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
  652. {
  653. struct saa7164_port *port = 0;
  654. if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
  655. BUG();
  656. port = &dev->ports[ portnr ];
  657. port->dev = dev;
  658. port->nr = portnr;
  659. if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
  660. port->type = SAA7164_MPEG_DVB;
  661. else
  662. if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2))
  663. port->type = SAA7164_MPEG_ENCODER;
  664. else
  665. BUG();
  666. /* Init all the critical resources */
  667. mutex_init(&port->dvb.lock);
  668. INIT_LIST_HEAD(&port->dmaqueue.list);
  669. mutex_init(&port->dmaqueue_lock);
  670. INIT_LIST_HEAD(&port->list_buf_used.list);
  671. INIT_LIST_HEAD(&port->list_buf_free.list);
  672. init_waitqueue_head(&port->wait_read);
  673. /* We need a deferred interrupt handler for cmd handling */
  674. INIT_WORK(&port->workenc, saa7164_work_enchandler);
  675. saa7164_histogram_reset(&port->irq_interval, "irq intervals");
  676. saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
  677. saa7164_histogram_reset(&port->irq_svc_interval,
  678. "irq to deferred intervals");
  679. saa7164_histogram_reset(&port->read_interval,
  680. "encoder read() intervals");
  681. saa7164_histogram_reset(&port->poll_interval,
  682. "encoder poll() intervals");
  683. return 0;
  684. }
  685. static int saa7164_dev_setup(struct saa7164_dev *dev)
  686. {
  687. int i;
  688. mutex_init(&dev->lock);
  689. atomic_inc(&dev->refcount);
  690. dev->nr = saa7164_devcount++;
  691. sprintf(dev->name, "saa7164[%d]", dev->nr);
  692. mutex_lock(&devlist);
  693. list_add_tail(&dev->devlist, &saa7164_devlist);
  694. mutex_unlock(&devlist);
  695. /* board config */
  696. dev->board = UNSET;
  697. if (card[dev->nr] < saa7164_bcount)
  698. dev->board = card[dev->nr];
  699. for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
  700. if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
  701. dev->pci->subsystem_device ==
  702. saa7164_subids[i].subdevice)
  703. dev->board = saa7164_subids[i].card;
  704. if (UNSET == dev->board) {
  705. dev->board = SAA7164_BOARD_UNKNOWN;
  706. saa7164_card_list(dev);
  707. }
  708. dev->pci_bus = dev->pci->bus->number;
  709. dev->pci_slot = PCI_SLOT(dev->pci->devfn);
  710. /* I2C Defaults / setup */
  711. dev->i2c_bus[0].dev = dev;
  712. dev->i2c_bus[0].nr = 0;
  713. dev->i2c_bus[1].dev = dev;
  714. dev->i2c_bus[1].nr = 1;
  715. dev->i2c_bus[2].dev = dev;
  716. dev->i2c_bus[2].nr = 2;
  717. /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
  718. saa7164_port_init(dev, SAA7164_PORT_TS1);
  719. saa7164_port_init(dev, SAA7164_PORT_TS2);
  720. saa7164_port_init(dev, SAA7164_PORT_ENC1);
  721. saa7164_port_init(dev, SAA7164_PORT_ENC2);
  722. if (get_resources(dev) < 0) {
  723. printk(KERN_ERR "CORE %s No more PCIe resources for "
  724. "subsystem: %04x:%04x\n",
  725. dev->name, dev->pci->subsystem_vendor,
  726. dev->pci->subsystem_device);
  727. saa7164_devcount--;
  728. return -ENODEV;
  729. }
  730. /* PCI/e allocations */
  731. dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
  732. pci_resource_len(dev->pci, 0));
  733. dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
  734. pci_resource_len(dev->pci, 2));
  735. dev->bmmio = (u8 __iomem *)dev->lmmio;
  736. dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
  737. /* Inerrupt and ack register locations offset of bmmio */
  738. dev->int_status = 0x183000 + 0xf80;
  739. dev->int_ack = 0x183000 + 0xf90;
  740. printk(KERN_INFO
  741. "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
  742. dev->name, dev->pci->subsystem_vendor,
  743. dev->pci->subsystem_device, saa7164_boards[dev->board].name,
  744. dev->board, card[dev->nr] == dev->board ?
  745. "insmod option" : "autodetected");
  746. saa7164_pci_quirks(dev);
  747. return 0;
  748. }
  749. static void saa7164_dev_unregister(struct saa7164_dev *dev)
  750. {
  751. dprintk(1, "%s()\n", __func__);
  752. release_mem_region(pci_resource_start(dev->pci, 0),
  753. pci_resource_len(dev->pci, 0));
  754. release_mem_region(pci_resource_start(dev->pci, 2),
  755. pci_resource_len(dev->pci, 2));
  756. if (!atomic_dec_and_test(&dev->refcount))
  757. return;
  758. iounmap(dev->lmmio);
  759. iounmap(dev->lmmio2);
  760. return;
  761. }
  762. static int __devinit saa7164_initdev(struct pci_dev *pci_dev,
  763. const struct pci_device_id *pci_id)
  764. {
  765. struct saa7164_dev *dev;
  766. int err, i;
  767. u32 version;
  768. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  769. if (NULL == dev)
  770. return -ENOMEM;
  771. /* pci init */
  772. dev->pci = pci_dev;
  773. if (pci_enable_device(pci_dev)) {
  774. err = -EIO;
  775. goto fail_free;
  776. }
  777. if (saa7164_dev_setup(dev) < 0) {
  778. err = -EINVAL;
  779. goto fail_free;
  780. }
  781. /* print pci info */
  782. pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
  783. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  784. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  785. "latency: %d, mmio: 0x%llx\n", dev->name,
  786. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  787. dev->pci_lat,
  788. (unsigned long long)pci_resource_start(pci_dev, 0));
  789. pci_set_master(pci_dev);
  790. /* TODO */
  791. if (!pci_dma_supported(pci_dev, 0xffffffff)) {
  792. printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
  793. err = -EIO;
  794. goto fail_irq;
  795. }
  796. err = request_irq(pci_dev->irq, saa7164_irq,
  797. IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
  798. if (err < 0) {
  799. printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
  800. pci_dev->irq);
  801. err = -EIO;
  802. goto fail_irq;
  803. }
  804. pci_set_drvdata(pci_dev, dev);
  805. /* Init the internal command list */
  806. for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
  807. dev->cmds[i].seqno = i;
  808. dev->cmds[i].inuse = 0;
  809. mutex_init(&dev->cmds[i].lock);
  810. init_waitqueue_head(&dev->cmds[i].wait);
  811. }
  812. /* We need a deferred interrupt handler for cmd handling */
  813. INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
  814. /* Only load the firmware if we know the board */
  815. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  816. err = saa7164_downloadfirmware(dev);
  817. if (err < 0) {
  818. printk(KERN_ERR
  819. "Failed to boot firmware, no features "
  820. "registered\n");
  821. goto fail_fw;
  822. }
  823. saa7164_get_descriptors(dev);
  824. saa7164_dumpregs(dev, 0);
  825. saa7164_getcurrentfirmwareversion(dev);
  826. saa7164_getfirmwarestatus(dev);
  827. err = saa7164_bus_setup(dev);
  828. if (err < 0)
  829. printk(KERN_ERR
  830. "Failed to setup the bus, will continue\n");
  831. saa7164_bus_dump(dev);
  832. /* Ping the running firmware via the command bus and get the
  833. * firmware version, this checks the bus is running OK.
  834. */
  835. version = 0;
  836. if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
  837. dprintk(1, "Bus is operating correctly using "
  838. "version %d.%d.%d.%d (0x%x)\n",
  839. (version & 0x0000fc00) >> 10,
  840. (version & 0x000003e0) >> 5,
  841. (version & 0x0000001f),
  842. (version & 0xffff0000) >> 16,
  843. version);
  844. else
  845. printk(KERN_ERR
  846. "Failed to communicate with the firmware\n");
  847. /* Bring up the I2C buses */
  848. saa7164_i2c_register(&dev->i2c_bus[0]);
  849. saa7164_i2c_register(&dev->i2c_bus[1]);
  850. saa7164_i2c_register(&dev->i2c_bus[2]);
  851. saa7164_gpio_setup(dev);
  852. saa7164_card_setup(dev);
  853. /* Parse the dynamic device configuration, find various
  854. * media endpoints (MPEG, WMV, PS, TS) and cache their
  855. * configuration details into the driver, so we can
  856. * reference them later during simething_register() func,
  857. * interrupt handlers, deferred work handlers etc.
  858. */
  859. saa7164_api_enum_subdevs(dev);
  860. /* Begin to create the video sub-systems and register funcs */
  861. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
  862. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS1 ]) < 0) {
  863. printk(KERN_ERR "%s() Failed to register "
  864. "dvb adapters on porta\n",
  865. __func__);
  866. }
  867. }
  868. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
  869. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS2 ]) < 0) {
  870. printk(KERN_ERR"%s() Failed to register "
  871. "dvb adapters on portb\n",
  872. __func__);
  873. }
  874. }
  875. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
  876. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC1 ]) < 0) {
  877. printk(KERN_ERR"%s() Failed to register "
  878. "mpeg encoder\n", __func__);
  879. }
  880. }
  881. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
  882. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC2 ]) < 0) {
  883. printk(KERN_ERR"%s() Failed to register "
  884. "mpeg encoder\n", __func__);
  885. }
  886. }
  887. } /* != BOARD_UNKNOWN */
  888. else
  889. printk(KERN_ERR "%s() Unsupported board detected, "
  890. "registering without firmware\n", __func__);
  891. dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
  892. dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
  893. fail_fw:
  894. return 0;
  895. fail_irq:
  896. saa7164_dev_unregister(dev);
  897. fail_free:
  898. kfree(dev);
  899. return err;
  900. }
  901. static void saa7164_shutdown(struct saa7164_dev *dev)
  902. {
  903. dprintk(1, "%s()\n", __func__);
  904. }
  905. static void __devexit saa7164_finidev(struct pci_dev *pci_dev)
  906. {
  907. struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
  908. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  909. &dev->ports[ SAA7164_PORT_ENC1 ].irq_interval);
  910. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  911. &dev->ports[ SAA7164_PORT_ENC1 ].svc_interval);
  912. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  913. &dev->ports[ SAA7164_PORT_ENC1 ].irq_svc_interval);
  914. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  915. &dev->ports[ SAA7164_PORT_ENC1 ].read_interval);
  916. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  917. &dev->ports[ SAA7164_PORT_ENC1 ].poll_interval);
  918. saa7164_shutdown(dev);
  919. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
  920. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS1 ]);
  921. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
  922. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS2 ]);
  923. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
  924. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC1 ]);
  925. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
  926. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC2 ]);
  927. saa7164_i2c_unregister(&dev->i2c_bus[0]);
  928. saa7164_i2c_unregister(&dev->i2c_bus[1]);
  929. saa7164_i2c_unregister(&dev->i2c_bus[2]);
  930. pci_disable_device(pci_dev);
  931. /* unregister stuff */
  932. free_irq(pci_dev->irq, dev);
  933. pci_set_drvdata(pci_dev, NULL);
  934. mutex_lock(&devlist);
  935. list_del(&dev->devlist);
  936. mutex_unlock(&devlist);
  937. saa7164_dev_unregister(dev);
  938. kfree(dev);
  939. }
  940. static struct pci_device_id saa7164_pci_tbl[] = {
  941. {
  942. /* SAA7164 */
  943. .vendor = 0x1131,
  944. .device = 0x7164,
  945. .subvendor = PCI_ANY_ID,
  946. .subdevice = PCI_ANY_ID,
  947. }, {
  948. /* --- end of list --- */
  949. }
  950. };
  951. MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
  952. static struct pci_driver saa7164_pci_driver = {
  953. .name = "saa7164",
  954. .id_table = saa7164_pci_tbl,
  955. .probe = saa7164_initdev,
  956. .remove = __devexit_p(saa7164_finidev),
  957. /* TODO */
  958. .suspend = NULL,
  959. .resume = NULL,
  960. };
  961. static int __init saa7164_init(void)
  962. {
  963. printk(KERN_INFO "saa7164 driver loaded\n");
  964. return pci_register_driver(&saa7164_pci_driver);
  965. }
  966. static void __exit saa7164_fini(void)
  967. {
  968. pci_unregister_driver(&saa7164_pci_driver);
  969. }
  970. module_init(saa7164_init);
  971. module_exit(saa7164_fini);