amba-pl010.c 19 KB

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  1. /*
  2. * linux/drivers/char/amba.c
  3. *
  4. * Driver for AMBA serial ports
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * Copyright 1999 ARM Limited
  9. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
  26. *
  27. * This is a generic driver for ARM AMBA-type serial ports. They
  28. * have a lot of 16550-like features, but are not register compatible.
  29. * Note that although they do have CTS, DCD and DSR inputs, they do
  30. * not have an RI input, nor do they have DTR or RTS outputs. If
  31. * required, these have to be supplied via some other means (eg, GPIO)
  32. * and hooked into this driver.
  33. */
  34. #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  35. #define SUPPORT_SYSRQ
  36. #endif
  37. #include <linux/module.h>
  38. #include <linux/ioport.h>
  39. #include <linux/init.h>
  40. #include <linux/console.h>
  41. #include <linux/sysrq.h>
  42. #include <linux/device.h>
  43. #include <linux/tty.h>
  44. #include <linux/tty_flip.h>
  45. #include <linux/serial_core.h>
  46. #include <linux/serial.h>
  47. #include <linux/amba/bus.h>
  48. #include <linux/amba/serial.h>
  49. #include <asm/io.h>
  50. #define UART_NR 8
  51. #define SERIAL_AMBA_MAJOR 204
  52. #define SERIAL_AMBA_MINOR 16
  53. #define SERIAL_AMBA_NR UART_NR
  54. #define AMBA_ISR_PASS_LIMIT 256
  55. #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
  56. #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
  57. #define UART_DUMMY_RSR_RX 256
  58. #define UART_PORT_SIZE 64
  59. /*
  60. * We wrap our port structure around the generic uart_port.
  61. */
  62. struct uart_amba_port {
  63. struct uart_port port;
  64. struct amba_device *dev;
  65. struct amba_pl010_data *data;
  66. unsigned int old_status;
  67. };
  68. static void pl010_stop_tx(struct uart_port *port)
  69. {
  70. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  71. unsigned int cr;
  72. cr = readb(uap->port.membase + UART010_CR);
  73. cr &= ~UART010_CR_TIE;
  74. writel(cr, uap->port.membase + UART010_CR);
  75. }
  76. static void pl010_start_tx(struct uart_port *port)
  77. {
  78. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  79. unsigned int cr;
  80. cr = readb(uap->port.membase + UART010_CR);
  81. cr |= UART010_CR_TIE;
  82. writel(cr, uap->port.membase + UART010_CR);
  83. }
  84. static void pl010_stop_rx(struct uart_port *port)
  85. {
  86. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  87. unsigned int cr;
  88. cr = readb(uap->port.membase + UART010_CR);
  89. cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  90. writel(cr, uap->port.membase + UART010_CR);
  91. }
  92. static void pl010_enable_ms(struct uart_port *port)
  93. {
  94. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  95. unsigned int cr;
  96. cr = readb(uap->port.membase + UART010_CR);
  97. cr |= UART010_CR_MSIE;
  98. writel(cr, uap->port.membase + UART010_CR);
  99. }
  100. static void pl010_rx_chars(struct uart_amba_port *uap)
  101. {
  102. struct tty_struct *tty = uap->port.info->tty;
  103. unsigned int status, ch, flag, rsr, max_count = 256;
  104. status = readb(uap->port.membase + UART01x_FR);
  105. while (UART_RX_DATA(status) && max_count--) {
  106. ch = readb(uap->port.membase + UART01x_DR);
  107. flag = TTY_NORMAL;
  108. uap->port.icount.rx++;
  109. /*
  110. * Note that the error handling code is
  111. * out of the main execution path
  112. */
  113. rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  114. if (unlikely(rsr & UART01x_RSR_ANY)) {
  115. writel(0, uap->port.membase + UART01x_ECR);
  116. if (rsr & UART01x_RSR_BE) {
  117. rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
  118. uap->port.icount.brk++;
  119. if (uart_handle_break(&uap->port))
  120. goto ignore_char;
  121. } else if (rsr & UART01x_RSR_PE)
  122. uap->port.icount.parity++;
  123. else if (rsr & UART01x_RSR_FE)
  124. uap->port.icount.frame++;
  125. if (rsr & UART01x_RSR_OE)
  126. uap->port.icount.overrun++;
  127. rsr &= uap->port.read_status_mask;
  128. if (rsr & UART01x_RSR_BE)
  129. flag = TTY_BREAK;
  130. else if (rsr & UART01x_RSR_PE)
  131. flag = TTY_PARITY;
  132. else if (rsr & UART01x_RSR_FE)
  133. flag = TTY_FRAME;
  134. }
  135. if (uart_handle_sysrq_char(&uap->port, ch))
  136. goto ignore_char;
  137. uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
  138. ignore_char:
  139. status = readb(uap->port.membase + UART01x_FR);
  140. }
  141. tty_flip_buffer_push(tty);
  142. return;
  143. }
  144. static void pl010_tx_chars(struct uart_amba_port *uap)
  145. {
  146. struct circ_buf *xmit = &uap->port.info->xmit;
  147. int count;
  148. if (uap->port.x_char) {
  149. writel(uap->port.x_char, uap->port.membase + UART01x_DR);
  150. uap->port.icount.tx++;
  151. uap->port.x_char = 0;
  152. return;
  153. }
  154. if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
  155. pl010_stop_tx(&uap->port);
  156. return;
  157. }
  158. count = uap->port.fifosize >> 1;
  159. do {
  160. writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
  161. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  162. uap->port.icount.tx++;
  163. if (uart_circ_empty(xmit))
  164. break;
  165. } while (--count > 0);
  166. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  167. uart_write_wakeup(&uap->port);
  168. if (uart_circ_empty(xmit))
  169. pl010_stop_tx(&uap->port);
  170. }
  171. static void pl010_modem_status(struct uart_amba_port *uap)
  172. {
  173. unsigned int status, delta;
  174. writel(0, uap->port.membase + UART010_ICR);
  175. status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  176. delta = status ^ uap->old_status;
  177. uap->old_status = status;
  178. if (!delta)
  179. return;
  180. if (delta & UART01x_FR_DCD)
  181. uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
  182. if (delta & UART01x_FR_DSR)
  183. uap->port.icount.dsr++;
  184. if (delta & UART01x_FR_CTS)
  185. uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
  186. wake_up_interruptible(&uap->port.info->delta_msr_wait);
  187. }
  188. static irqreturn_t pl010_int(int irq, void *dev_id)
  189. {
  190. struct uart_amba_port *uap = dev_id;
  191. unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
  192. int handled = 0;
  193. spin_lock(&uap->port.lock);
  194. status = readb(uap->port.membase + UART010_IIR);
  195. if (status) {
  196. do {
  197. if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
  198. pl010_rx_chars(uap);
  199. if (status & UART010_IIR_MIS)
  200. pl010_modem_status(uap);
  201. if (status & UART010_IIR_TIS)
  202. pl010_tx_chars(uap);
  203. if (pass_counter-- == 0)
  204. break;
  205. status = readb(uap->port.membase + UART010_IIR);
  206. } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
  207. UART010_IIR_TIS));
  208. handled = 1;
  209. }
  210. spin_unlock(&uap->port.lock);
  211. return IRQ_RETVAL(handled);
  212. }
  213. static unsigned int pl010_tx_empty(struct uart_port *port)
  214. {
  215. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  216. unsigned int status = readb(uap->port.membase + UART01x_FR);
  217. return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
  218. }
  219. static unsigned int pl010_get_mctrl(struct uart_port *port)
  220. {
  221. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  222. unsigned int result = 0;
  223. unsigned int status;
  224. status = readb(uap->port.membase + UART01x_FR);
  225. if (status & UART01x_FR_DCD)
  226. result |= TIOCM_CAR;
  227. if (status & UART01x_FR_DSR)
  228. result |= TIOCM_DSR;
  229. if (status & UART01x_FR_CTS)
  230. result |= TIOCM_CTS;
  231. return result;
  232. }
  233. static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
  234. {
  235. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  236. if (uap->data)
  237. uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
  238. }
  239. static void pl010_break_ctl(struct uart_port *port, int break_state)
  240. {
  241. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  242. unsigned long flags;
  243. unsigned int lcr_h;
  244. spin_lock_irqsave(&uap->port.lock, flags);
  245. lcr_h = readb(uap->port.membase + UART010_LCRH);
  246. if (break_state == -1)
  247. lcr_h |= UART01x_LCRH_BRK;
  248. else
  249. lcr_h &= ~UART01x_LCRH_BRK;
  250. writel(lcr_h, uap->port.membase + UART010_LCRH);
  251. spin_unlock_irqrestore(&uap->port.lock, flags);
  252. }
  253. static int pl010_startup(struct uart_port *port)
  254. {
  255. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  256. int retval;
  257. /*
  258. * Allocate the IRQ
  259. */
  260. retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
  261. if (retval)
  262. return retval;
  263. /*
  264. * initialise the old status of the modem signals
  265. */
  266. uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  267. /*
  268. * Finally, enable interrupts
  269. */
  270. writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
  271. uap->port.membase + UART010_CR);
  272. return 0;
  273. }
  274. static void pl010_shutdown(struct uart_port *port)
  275. {
  276. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  277. /*
  278. * Free the interrupt
  279. */
  280. free_irq(uap->port.irq, uap);
  281. /*
  282. * disable all interrupts, disable the port
  283. */
  284. writel(0, uap->port.membase + UART010_CR);
  285. /* disable break condition and fifos */
  286. writel(readb(uap->port.membase + UART010_LCRH) &
  287. ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
  288. uap->port.membase + UART010_LCRH);
  289. }
  290. static void
  291. pl010_set_termios(struct uart_port *port, struct ktermios *termios,
  292. struct ktermios *old)
  293. {
  294. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  295. unsigned int lcr_h, old_cr;
  296. unsigned long flags;
  297. unsigned int baud, quot;
  298. /*
  299. * Ask the core to calculate the divisor for us.
  300. */
  301. baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
  302. quot = uart_get_divisor(port, baud);
  303. switch (termios->c_cflag & CSIZE) {
  304. case CS5:
  305. lcr_h = UART01x_LCRH_WLEN_5;
  306. break;
  307. case CS6:
  308. lcr_h = UART01x_LCRH_WLEN_6;
  309. break;
  310. case CS7:
  311. lcr_h = UART01x_LCRH_WLEN_7;
  312. break;
  313. default: // CS8
  314. lcr_h = UART01x_LCRH_WLEN_8;
  315. break;
  316. }
  317. if (termios->c_cflag & CSTOPB)
  318. lcr_h |= UART01x_LCRH_STP2;
  319. if (termios->c_cflag & PARENB) {
  320. lcr_h |= UART01x_LCRH_PEN;
  321. if (!(termios->c_cflag & PARODD))
  322. lcr_h |= UART01x_LCRH_EPS;
  323. }
  324. if (uap->port.fifosize > 1)
  325. lcr_h |= UART01x_LCRH_FEN;
  326. spin_lock_irqsave(&uap->port.lock, flags);
  327. /*
  328. * Update the per-port timeout.
  329. */
  330. uart_update_timeout(port, termios->c_cflag, baud);
  331. uap->port.read_status_mask = UART01x_RSR_OE;
  332. if (termios->c_iflag & INPCK)
  333. uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  334. if (termios->c_iflag & (BRKINT | PARMRK))
  335. uap->port.read_status_mask |= UART01x_RSR_BE;
  336. /*
  337. * Characters to ignore
  338. */
  339. uap->port.ignore_status_mask = 0;
  340. if (termios->c_iflag & IGNPAR)
  341. uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  342. if (termios->c_iflag & IGNBRK) {
  343. uap->port.ignore_status_mask |= UART01x_RSR_BE;
  344. /*
  345. * If we're ignoring parity and break indicators,
  346. * ignore overruns too (for real raw support).
  347. */
  348. if (termios->c_iflag & IGNPAR)
  349. uap->port.ignore_status_mask |= UART01x_RSR_OE;
  350. }
  351. /*
  352. * Ignore all characters if CREAD is not set.
  353. */
  354. if ((termios->c_cflag & CREAD) == 0)
  355. uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
  356. /* first, disable everything */
  357. old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
  358. if (UART_ENABLE_MS(port, termios->c_cflag))
  359. old_cr |= UART010_CR_MSIE;
  360. writel(0, uap->port.membase + UART010_CR);
  361. /* Set baud rate */
  362. quot -= 1;
  363. writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
  364. writel(quot & 0xff, uap->port.membase + UART010_LCRL);
  365. /*
  366. * ----------v----------v----------v----------v-----
  367. * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
  368. * ----------^----------^----------^----------^-----
  369. */
  370. writel(lcr_h, uap->port.membase + UART010_LCRH);
  371. writel(old_cr, uap->port.membase + UART010_CR);
  372. spin_unlock_irqrestore(&uap->port.lock, flags);
  373. }
  374. static const char *pl010_type(struct uart_port *port)
  375. {
  376. return port->type == PORT_AMBA ? "AMBA" : NULL;
  377. }
  378. /*
  379. * Release the memory region(s) being used by 'port'
  380. */
  381. static void pl010_release_port(struct uart_port *port)
  382. {
  383. release_mem_region(port->mapbase, UART_PORT_SIZE);
  384. }
  385. /*
  386. * Request the memory region(s) being used by 'port'
  387. */
  388. static int pl010_request_port(struct uart_port *port)
  389. {
  390. return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
  391. != NULL ? 0 : -EBUSY;
  392. }
  393. /*
  394. * Configure/autoconfigure the port.
  395. */
  396. static void pl010_config_port(struct uart_port *port, int flags)
  397. {
  398. if (flags & UART_CONFIG_TYPE) {
  399. port->type = PORT_AMBA;
  400. pl010_request_port(port);
  401. }
  402. }
  403. /*
  404. * verify the new serial_struct (for TIOCSSERIAL).
  405. */
  406. static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
  407. {
  408. int ret = 0;
  409. if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
  410. ret = -EINVAL;
  411. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  412. ret = -EINVAL;
  413. if (ser->baud_base < 9600)
  414. ret = -EINVAL;
  415. return ret;
  416. }
  417. static struct uart_ops amba_pl010_pops = {
  418. .tx_empty = pl010_tx_empty,
  419. .set_mctrl = pl010_set_mctrl,
  420. .get_mctrl = pl010_get_mctrl,
  421. .stop_tx = pl010_stop_tx,
  422. .start_tx = pl010_start_tx,
  423. .stop_rx = pl010_stop_rx,
  424. .enable_ms = pl010_enable_ms,
  425. .break_ctl = pl010_break_ctl,
  426. .startup = pl010_startup,
  427. .shutdown = pl010_shutdown,
  428. .set_termios = pl010_set_termios,
  429. .type = pl010_type,
  430. .release_port = pl010_release_port,
  431. .request_port = pl010_request_port,
  432. .config_port = pl010_config_port,
  433. .verify_port = pl010_verify_port,
  434. };
  435. static struct uart_amba_port *amba_ports[UART_NR];
  436. #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
  437. static void pl010_console_putchar(struct uart_port *port, int ch)
  438. {
  439. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  440. unsigned int status;
  441. do {
  442. status = readb(uap->port.membase + UART01x_FR);
  443. barrier();
  444. } while (!UART_TX_READY(status));
  445. writel(ch, uap->port.membase + UART01x_DR);
  446. }
  447. static void
  448. pl010_console_write(struct console *co, const char *s, unsigned int count)
  449. {
  450. struct uart_amba_port *uap = amba_ports[co->index];
  451. unsigned int status, old_cr;
  452. /*
  453. * First save the CR then disable the interrupts
  454. */
  455. old_cr = readb(uap->port.membase + UART010_CR);
  456. writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
  457. uart_console_write(&uap->port, s, count, pl010_console_putchar);
  458. /*
  459. * Finally, wait for transmitter to become empty
  460. * and restore the TCR
  461. */
  462. do {
  463. status = readb(uap->port.membase + UART01x_FR);
  464. barrier();
  465. } while (status & UART01x_FR_BUSY);
  466. writel(old_cr, uap->port.membase + UART010_CR);
  467. }
  468. static void __init
  469. pl010_console_get_options(struct uart_amba_port *uap, int *baud,
  470. int *parity, int *bits)
  471. {
  472. if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
  473. unsigned int lcr_h, quot;
  474. lcr_h = readb(uap->port.membase + UART010_LCRH);
  475. *parity = 'n';
  476. if (lcr_h & UART01x_LCRH_PEN) {
  477. if (lcr_h & UART01x_LCRH_EPS)
  478. *parity = 'e';
  479. else
  480. *parity = 'o';
  481. }
  482. if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
  483. *bits = 7;
  484. else
  485. *bits = 8;
  486. quot = readb(uap->port.membase + UART010_LCRL) |
  487. readb(uap->port.membase + UART010_LCRM) << 8;
  488. *baud = uap->port.uartclk / (16 * (quot + 1));
  489. }
  490. }
  491. static int __init pl010_console_setup(struct console *co, char *options)
  492. {
  493. struct uart_amba_port *uap;
  494. int baud = 38400;
  495. int bits = 8;
  496. int parity = 'n';
  497. int flow = 'n';
  498. /*
  499. * Check whether an invalid uart number has been specified, and
  500. * if so, search for the first available port that does have
  501. * console support.
  502. */
  503. if (co->index >= UART_NR)
  504. co->index = 0;
  505. uap = amba_ports[co->index];
  506. if (!uap)
  507. return -ENODEV;
  508. if (options)
  509. uart_parse_options(options, &baud, &parity, &bits, &flow);
  510. else
  511. pl010_console_get_options(uap, &baud, &parity, &bits);
  512. return uart_set_options(&uap->port, co, baud, parity, bits, flow);
  513. }
  514. static struct uart_driver amba_reg;
  515. static struct console amba_console = {
  516. .name = "ttyAM",
  517. .write = pl010_console_write,
  518. .device = uart_console_device,
  519. .setup = pl010_console_setup,
  520. .flags = CON_PRINTBUFFER,
  521. .index = -1,
  522. .data = &amba_reg,
  523. };
  524. #define AMBA_CONSOLE &amba_console
  525. #else
  526. #define AMBA_CONSOLE NULL
  527. #endif
  528. static struct uart_driver amba_reg = {
  529. .owner = THIS_MODULE,
  530. .driver_name = "ttyAM",
  531. .dev_name = "ttyAM",
  532. .major = SERIAL_AMBA_MAJOR,
  533. .minor = SERIAL_AMBA_MINOR,
  534. .nr = UART_NR,
  535. .cons = AMBA_CONSOLE,
  536. };
  537. static int pl010_probe(struct amba_device *dev, void *id)
  538. {
  539. struct uart_amba_port *uap;
  540. void __iomem *base;
  541. int i, ret;
  542. for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
  543. if (amba_ports[i] == NULL)
  544. break;
  545. if (i == ARRAY_SIZE(amba_ports)) {
  546. ret = -EBUSY;
  547. goto out;
  548. }
  549. uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
  550. if (!uap) {
  551. ret = -ENOMEM;
  552. goto out;
  553. }
  554. base = ioremap(dev->res.start, PAGE_SIZE);
  555. if (!base) {
  556. ret = -ENOMEM;
  557. goto free;
  558. }
  559. uap->port.dev = &dev->dev;
  560. uap->port.mapbase = dev->res.start;
  561. uap->port.membase = base;
  562. uap->port.iotype = UPIO_MEM;
  563. uap->port.irq = dev->irq[0];
  564. uap->port.uartclk = 14745600;
  565. uap->port.fifosize = 16;
  566. uap->port.ops = &amba_pl010_pops;
  567. uap->port.flags = UPF_BOOT_AUTOCONF;
  568. uap->port.line = i;
  569. uap->dev = dev;
  570. uap->data = dev->dev.platform_data;
  571. amba_ports[i] = uap;
  572. amba_set_drvdata(dev, uap);
  573. ret = uart_add_one_port(&amba_reg, &uap->port);
  574. if (ret) {
  575. amba_set_drvdata(dev, NULL);
  576. amba_ports[i] = NULL;
  577. iounmap(base);
  578. free:
  579. kfree(uap);
  580. }
  581. out:
  582. return ret;
  583. }
  584. static int pl010_remove(struct amba_device *dev)
  585. {
  586. struct uart_amba_port *uap = amba_get_drvdata(dev);
  587. int i;
  588. amba_set_drvdata(dev, NULL);
  589. uart_remove_one_port(&amba_reg, &uap->port);
  590. for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
  591. if (amba_ports[i] == uap)
  592. amba_ports[i] = NULL;
  593. iounmap(uap->port.membase);
  594. kfree(uap);
  595. return 0;
  596. }
  597. static int pl010_suspend(struct amba_device *dev, pm_message_t state)
  598. {
  599. struct uart_amba_port *uap = amba_get_drvdata(dev);
  600. if (uap)
  601. uart_suspend_port(&amba_reg, &uap->port);
  602. return 0;
  603. }
  604. static int pl010_resume(struct amba_device *dev)
  605. {
  606. struct uart_amba_port *uap = amba_get_drvdata(dev);
  607. if (uap)
  608. uart_resume_port(&amba_reg, &uap->port);
  609. return 0;
  610. }
  611. static struct amba_id pl010_ids[] __initdata = {
  612. {
  613. .id = 0x00041010,
  614. .mask = 0x000fffff,
  615. },
  616. { 0, 0 },
  617. };
  618. static struct amba_driver pl010_driver = {
  619. .drv = {
  620. .name = "uart-pl010",
  621. },
  622. .id_table = pl010_ids,
  623. .probe = pl010_probe,
  624. .remove = pl010_remove,
  625. .suspend = pl010_suspend,
  626. .resume = pl010_resume,
  627. };
  628. static int __init pl010_init(void)
  629. {
  630. int ret;
  631. printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
  632. ret = uart_register_driver(&amba_reg);
  633. if (ret == 0) {
  634. ret = amba_driver_register(&pl010_driver);
  635. if (ret)
  636. uart_unregister_driver(&amba_reg);
  637. }
  638. return ret;
  639. }
  640. static void __exit pl010_exit(void)
  641. {
  642. amba_driver_unregister(&pl010_driver);
  643. uart_unregister_driver(&amba_reg);
  644. }
  645. module_init(pl010_init);
  646. module_exit(pl010_exit);
  647. MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
  648. MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
  649. MODULE_LICENSE("GPL");