e1000_main.c 136 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.1.9-k4"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  66. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  69. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  70. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  84. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  90. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  91. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  94. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  95. /* required last entry */
  96. {0,}
  97. };
  98. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  99. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  100. struct e1000_tx_ring *txdr);
  101. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  102. struct e1000_rx_ring *rxdr);
  103. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  104. struct e1000_tx_ring *tx_ring);
  105. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  106. struct e1000_rx_ring *rx_ring);
  107. /* Local Function Prototypes */
  108. static int e1000_init_module(void);
  109. static void e1000_exit_module(void);
  110. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  111. static void __devexit e1000_remove(struct pci_dev *pdev);
  112. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  113. static int e1000_sw_init(struct e1000_adapter *adapter);
  114. static int e1000_open(struct net_device *netdev);
  115. static int e1000_close(struct net_device *netdev);
  116. static void e1000_configure_tx(struct e1000_adapter *adapter);
  117. static void e1000_configure_rx(struct e1000_adapter *adapter);
  118. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  119. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  120. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  121. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  122. struct e1000_tx_ring *tx_ring);
  123. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  124. struct e1000_rx_ring *rx_ring);
  125. static void e1000_set_multi(struct net_device *netdev);
  126. static void e1000_update_phy_info(unsigned long data);
  127. static void e1000_watchdog(unsigned long data);
  128. static void e1000_82547_tx_fifo_stall(unsigned long data);
  129. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  130. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  131. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  132. static int e1000_set_mac(struct net_device *netdev, void *p);
  133. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  134. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  135. struct e1000_tx_ring *tx_ring);
  136. #ifdef CONFIG_E1000_NAPI
  137. static int e1000_clean(struct net_device *poll_dev, int *budget);
  138. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  139. struct e1000_rx_ring *rx_ring,
  140. int *work_done, int work_to_do);
  141. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  142. struct e1000_rx_ring *rx_ring,
  143. int *work_done, int work_to_do);
  144. #else
  145. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  146. struct e1000_rx_ring *rx_ring);
  147. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  148. struct e1000_rx_ring *rx_ring);
  149. #endif
  150. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  151. struct e1000_rx_ring *rx_ring,
  152. int cleaned_count);
  153. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  154. struct e1000_rx_ring *rx_ring,
  155. int cleaned_count);
  156. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  157. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  158. int cmd);
  159. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  160. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  161. static void e1000_tx_timeout(struct net_device *dev);
  162. static void e1000_reset_task(struct net_device *dev);
  163. static void e1000_smartspeed(struct e1000_adapter *adapter);
  164. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  165. struct sk_buff *skb);
  166. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  167. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  168. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  169. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  170. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  171. #ifdef CONFIG_PM
  172. static int e1000_resume(struct pci_dev *pdev);
  173. #endif
  174. static void e1000_shutdown(struct pci_dev *pdev);
  175. #ifdef CONFIG_NET_POLL_CONTROLLER
  176. /* for netdump / net console */
  177. static void e1000_netpoll (struct net_device *netdev);
  178. #endif
  179. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  180. pci_channel_state_t state);
  181. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  182. static void e1000_io_resume(struct pci_dev *pdev);
  183. static struct pci_error_handlers e1000_err_handler = {
  184. .error_detected = e1000_io_error_detected,
  185. .slot_reset = e1000_io_slot_reset,
  186. .resume = e1000_io_resume,
  187. };
  188. static struct pci_driver e1000_driver = {
  189. .name = e1000_driver_name,
  190. .id_table = e1000_pci_tbl,
  191. .probe = e1000_probe,
  192. .remove = __devexit_p(e1000_remove),
  193. /* Power Managment Hooks */
  194. .suspend = e1000_suspend,
  195. #ifdef CONFIG_PM
  196. .resume = e1000_resume,
  197. #endif
  198. .shutdown = e1000_shutdown,
  199. .err_handler = &e1000_err_handler
  200. };
  201. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  202. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  203. MODULE_LICENSE("GPL");
  204. MODULE_VERSION(DRV_VERSION);
  205. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  206. module_param(debug, int, 0);
  207. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  208. /**
  209. * e1000_init_module - Driver Registration Routine
  210. *
  211. * e1000_init_module is the first routine called when the driver is
  212. * loaded. All it does is register with the PCI subsystem.
  213. **/
  214. static int __init
  215. e1000_init_module(void)
  216. {
  217. int ret;
  218. printk(KERN_INFO "%s - version %s\n",
  219. e1000_driver_string, e1000_driver_version);
  220. printk(KERN_INFO "%s\n", e1000_copyright);
  221. ret = pci_module_init(&e1000_driver);
  222. return ret;
  223. }
  224. module_init(e1000_init_module);
  225. /**
  226. * e1000_exit_module - Driver Exit Cleanup Routine
  227. *
  228. * e1000_exit_module is called just before the driver is removed
  229. * from memory.
  230. **/
  231. static void __exit
  232. e1000_exit_module(void)
  233. {
  234. pci_unregister_driver(&e1000_driver);
  235. }
  236. module_exit(e1000_exit_module);
  237. static int e1000_request_irq(struct e1000_adapter *adapter)
  238. {
  239. struct net_device *netdev = adapter->netdev;
  240. int flags, err = 0;
  241. flags = IRQF_SHARED;
  242. #ifdef CONFIG_PCI_MSI
  243. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  244. adapter->have_msi = TRUE;
  245. if ((err = pci_enable_msi(adapter->pdev))) {
  246. DPRINTK(PROBE, ERR,
  247. "Unable to allocate MSI interrupt Error: %d\n", err);
  248. adapter->have_msi = FALSE;
  249. }
  250. }
  251. if (adapter->have_msi)
  252. flags &= ~IRQF_SHARED;
  253. #endif
  254. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  255. netdev->name, netdev)))
  256. DPRINTK(PROBE, ERR,
  257. "Unable to allocate interrupt Error: %d\n", err);
  258. return err;
  259. }
  260. static void e1000_free_irq(struct e1000_adapter *adapter)
  261. {
  262. struct net_device *netdev = adapter->netdev;
  263. free_irq(adapter->pdev->irq, netdev);
  264. #ifdef CONFIG_PCI_MSI
  265. if (adapter->have_msi)
  266. pci_disable_msi(adapter->pdev);
  267. #endif
  268. }
  269. /**
  270. * e1000_irq_disable - Mask off interrupt generation on the NIC
  271. * @adapter: board private structure
  272. **/
  273. static void
  274. e1000_irq_disable(struct e1000_adapter *adapter)
  275. {
  276. atomic_inc(&adapter->irq_sem);
  277. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  278. E1000_WRITE_FLUSH(&adapter->hw);
  279. synchronize_irq(adapter->pdev->irq);
  280. }
  281. /**
  282. * e1000_irq_enable - Enable default interrupt generation settings
  283. * @adapter: board private structure
  284. **/
  285. static void
  286. e1000_irq_enable(struct e1000_adapter *adapter)
  287. {
  288. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  289. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  290. E1000_WRITE_FLUSH(&adapter->hw);
  291. }
  292. }
  293. static void
  294. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  295. {
  296. struct net_device *netdev = adapter->netdev;
  297. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  298. uint16_t old_vid = adapter->mng_vlan_id;
  299. if (adapter->vlgrp) {
  300. if (!adapter->vlgrp->vlan_devices[vid]) {
  301. if (adapter->hw.mng_cookie.status &
  302. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  303. e1000_vlan_rx_add_vid(netdev, vid);
  304. adapter->mng_vlan_id = vid;
  305. } else
  306. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  307. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  308. (vid != old_vid) &&
  309. !adapter->vlgrp->vlan_devices[old_vid])
  310. e1000_vlan_rx_kill_vid(netdev, old_vid);
  311. } else
  312. adapter->mng_vlan_id = vid;
  313. }
  314. }
  315. /**
  316. * e1000_release_hw_control - release control of the h/w to f/w
  317. * @adapter: address of board private structure
  318. *
  319. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  320. * For ASF and Pass Through versions of f/w this means that the
  321. * driver is no longer loaded. For AMT version (only with 82573) i
  322. * of the f/w this means that the netowrk i/f is closed.
  323. *
  324. **/
  325. static void
  326. e1000_release_hw_control(struct e1000_adapter *adapter)
  327. {
  328. uint32_t ctrl_ext;
  329. uint32_t swsm;
  330. uint32_t extcnf;
  331. /* Let firmware taken over control of h/w */
  332. switch (adapter->hw.mac_type) {
  333. case e1000_82571:
  334. case e1000_82572:
  335. case e1000_80003es2lan:
  336. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  337. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  338. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  339. break;
  340. case e1000_82573:
  341. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  342. E1000_WRITE_REG(&adapter->hw, SWSM,
  343. swsm & ~E1000_SWSM_DRV_LOAD);
  344. case e1000_ich8lan:
  345. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  346. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  347. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  348. break;
  349. default:
  350. break;
  351. }
  352. }
  353. /**
  354. * e1000_get_hw_control - get control of the h/w from f/w
  355. * @adapter: address of board private structure
  356. *
  357. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  358. * For ASF and Pass Through versions of f/w this means that
  359. * the driver is loaded. For AMT version (only with 82573)
  360. * of the f/w this means that the netowrk i/f is open.
  361. *
  362. **/
  363. static void
  364. e1000_get_hw_control(struct e1000_adapter *adapter)
  365. {
  366. uint32_t ctrl_ext;
  367. uint32_t swsm;
  368. uint32_t extcnf;
  369. /* Let firmware know the driver has taken over */
  370. switch (adapter->hw.mac_type) {
  371. case e1000_82571:
  372. case e1000_82572:
  373. case e1000_80003es2lan:
  374. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  375. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  376. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  377. break;
  378. case e1000_82573:
  379. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  380. E1000_WRITE_REG(&adapter->hw, SWSM,
  381. swsm | E1000_SWSM_DRV_LOAD);
  382. break;
  383. case e1000_ich8lan:
  384. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  385. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  386. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  387. break;
  388. default:
  389. break;
  390. }
  391. }
  392. int
  393. e1000_up(struct e1000_adapter *adapter)
  394. {
  395. struct net_device *netdev = adapter->netdev;
  396. int i;
  397. /* hardware has been reset, we need to reload some things */
  398. e1000_set_multi(netdev);
  399. e1000_restore_vlan(adapter);
  400. e1000_configure_tx(adapter);
  401. e1000_setup_rctl(adapter);
  402. e1000_configure_rx(adapter);
  403. /* call E1000_DESC_UNUSED which always leaves
  404. * at least 1 descriptor unused to make sure
  405. * next_to_use != next_to_clean */
  406. for (i = 0; i < adapter->num_rx_queues; i++) {
  407. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  408. adapter->alloc_rx_buf(adapter, ring,
  409. E1000_DESC_UNUSED(ring));
  410. }
  411. adapter->tx_queue_len = netdev->tx_queue_len;
  412. mod_timer(&adapter->watchdog_timer, jiffies);
  413. #ifdef CONFIG_E1000_NAPI
  414. netif_poll_enable(netdev);
  415. #endif
  416. e1000_irq_enable(adapter);
  417. return 0;
  418. }
  419. /**
  420. * e1000_power_up_phy - restore link in case the phy was powered down
  421. * @adapter: address of board private structure
  422. *
  423. * The phy may be powered down to save power and turn off link when the
  424. * driver is unloaded and wake on lan is not enabled (among others)
  425. * *** this routine MUST be followed by a call to e1000_reset ***
  426. *
  427. **/
  428. static void e1000_power_up_phy(struct e1000_adapter *adapter)
  429. {
  430. uint16_t mii_reg = 0;
  431. /* Just clear the power down bit to wake the phy back up */
  432. if (adapter->hw.media_type == e1000_media_type_copper) {
  433. /* according to the manual, the phy will retain its
  434. * settings across a power-down/up cycle */
  435. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  436. mii_reg &= ~MII_CR_POWER_DOWN;
  437. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  438. }
  439. }
  440. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  441. {
  442. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  443. e1000_check_mng_mode(&adapter->hw);
  444. /* Power down the PHY so no link is implied when interface is down
  445. * The PHY cannot be powered down if any of the following is TRUE
  446. * (a) WoL is enabled
  447. * (b) AMT is active
  448. * (c) SoL/IDER session is active */
  449. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  450. adapter->hw.mac_type != e1000_ich8lan &&
  451. adapter->hw.media_type == e1000_media_type_copper &&
  452. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  453. !mng_mode_enabled &&
  454. !e1000_check_phy_reset_block(&adapter->hw)) {
  455. uint16_t mii_reg = 0;
  456. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  457. mii_reg |= MII_CR_POWER_DOWN;
  458. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  459. mdelay(1);
  460. }
  461. }
  462. void
  463. e1000_down(struct e1000_adapter *adapter)
  464. {
  465. struct net_device *netdev = adapter->netdev;
  466. e1000_irq_disable(adapter);
  467. del_timer_sync(&adapter->tx_fifo_stall_timer);
  468. del_timer_sync(&adapter->watchdog_timer);
  469. del_timer_sync(&adapter->phy_info_timer);
  470. #ifdef CONFIG_E1000_NAPI
  471. netif_poll_disable(netdev);
  472. #endif
  473. netdev->tx_queue_len = adapter->tx_queue_len;
  474. adapter->link_speed = 0;
  475. adapter->link_duplex = 0;
  476. netif_carrier_off(netdev);
  477. netif_stop_queue(netdev);
  478. e1000_reset(adapter);
  479. e1000_clean_all_tx_rings(adapter);
  480. e1000_clean_all_rx_rings(adapter);
  481. }
  482. void
  483. e1000_reinit_locked(struct e1000_adapter *adapter)
  484. {
  485. WARN_ON(in_interrupt());
  486. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  487. msleep(1);
  488. e1000_down(adapter);
  489. e1000_up(adapter);
  490. clear_bit(__E1000_RESETTING, &adapter->flags);
  491. }
  492. void
  493. e1000_reset(struct e1000_adapter *adapter)
  494. {
  495. uint32_t pba, manc;
  496. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  497. /* Repartition Pba for greater than 9k mtu
  498. * To take effect CTRL.RST is required.
  499. */
  500. switch (adapter->hw.mac_type) {
  501. case e1000_82547:
  502. case e1000_82547_rev_2:
  503. pba = E1000_PBA_30K;
  504. break;
  505. case e1000_82571:
  506. case e1000_82572:
  507. case e1000_80003es2lan:
  508. pba = E1000_PBA_38K;
  509. break;
  510. case e1000_82573:
  511. pba = E1000_PBA_12K;
  512. break;
  513. case e1000_ich8lan:
  514. pba = E1000_PBA_8K;
  515. break;
  516. default:
  517. pba = E1000_PBA_48K;
  518. break;
  519. }
  520. if ((adapter->hw.mac_type != e1000_82573) &&
  521. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  522. pba -= 8; /* allocate more FIFO for Tx */
  523. if (adapter->hw.mac_type == e1000_82547) {
  524. adapter->tx_fifo_head = 0;
  525. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  526. adapter->tx_fifo_size =
  527. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  528. atomic_set(&adapter->tx_fifo_stall, 0);
  529. }
  530. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  531. /* flow control settings */
  532. /* Set the FC high water mark to 90% of the FIFO size.
  533. * Required to clear last 3 LSB */
  534. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  535. /* We can't use 90% on small FIFOs because the remainder
  536. * would be less than 1 full frame. In this case, we size
  537. * it to allow at least a full frame above the high water
  538. * mark. */
  539. if (pba < E1000_PBA_16K)
  540. fc_high_water_mark = (pba * 1024) - 1600;
  541. adapter->hw.fc_high_water = fc_high_water_mark;
  542. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  543. if (adapter->hw.mac_type == e1000_80003es2lan)
  544. adapter->hw.fc_pause_time = 0xFFFF;
  545. else
  546. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  547. adapter->hw.fc_send_xon = 1;
  548. adapter->hw.fc = adapter->hw.original_fc;
  549. /* Allow time for pending master requests to run */
  550. e1000_reset_hw(&adapter->hw);
  551. if (adapter->hw.mac_type >= e1000_82544)
  552. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  553. if (e1000_init_hw(&adapter->hw))
  554. DPRINTK(PROBE, ERR, "Hardware Error\n");
  555. e1000_update_mng_vlan(adapter);
  556. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  557. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  558. e1000_reset_adaptive(&adapter->hw);
  559. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  560. if (!adapter->smart_power_down &&
  561. (adapter->hw.mac_type == e1000_82571 ||
  562. adapter->hw.mac_type == e1000_82572)) {
  563. uint16_t phy_data = 0;
  564. /* speed up time to link by disabling smart power down, ignore
  565. * the return value of this function because there is nothing
  566. * different we would do if it failed */
  567. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  568. &phy_data);
  569. phy_data &= ~IGP02E1000_PM_SPD;
  570. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  571. phy_data);
  572. }
  573. if (adapter->hw.mac_type < e1000_ich8lan)
  574. /* FIXME: this code is duplicate and wrong for PCI Express */
  575. if (adapter->en_mng_pt) {
  576. manc = E1000_READ_REG(&adapter->hw, MANC);
  577. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  578. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  579. }
  580. }
  581. /**
  582. * e1000_probe - Device Initialization Routine
  583. * @pdev: PCI device information struct
  584. * @ent: entry in e1000_pci_tbl
  585. *
  586. * Returns 0 on success, negative on failure
  587. *
  588. * e1000_probe initializes an adapter identified by a pci_dev structure.
  589. * The OS initialization, configuring of the adapter private structure,
  590. * and a hardware reset occur.
  591. **/
  592. static int __devinit
  593. e1000_probe(struct pci_dev *pdev,
  594. const struct pci_device_id *ent)
  595. {
  596. struct net_device *netdev;
  597. struct e1000_adapter *adapter;
  598. unsigned long mmio_start, mmio_len;
  599. unsigned long flash_start, flash_len;
  600. static int cards_found = 0;
  601. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  602. int i, err, pci_using_dac;
  603. uint16_t eeprom_data;
  604. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  605. if ((err = pci_enable_device(pdev)))
  606. return err;
  607. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  608. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  609. pci_using_dac = 1;
  610. } else {
  611. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  612. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  613. E1000_ERR("No usable DMA configuration, aborting\n");
  614. return err;
  615. }
  616. pci_using_dac = 0;
  617. }
  618. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  619. return err;
  620. pci_set_master(pdev);
  621. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  622. if (!netdev) {
  623. err = -ENOMEM;
  624. goto err_alloc_etherdev;
  625. }
  626. SET_MODULE_OWNER(netdev);
  627. SET_NETDEV_DEV(netdev, &pdev->dev);
  628. pci_set_drvdata(pdev, netdev);
  629. adapter = netdev_priv(netdev);
  630. adapter->netdev = netdev;
  631. adapter->pdev = pdev;
  632. adapter->hw.back = adapter;
  633. adapter->msg_enable = (1 << debug) - 1;
  634. mmio_start = pci_resource_start(pdev, BAR_0);
  635. mmio_len = pci_resource_len(pdev, BAR_0);
  636. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  637. if (!adapter->hw.hw_addr) {
  638. err = -EIO;
  639. goto err_ioremap;
  640. }
  641. for (i = BAR_1; i <= BAR_5; i++) {
  642. if (pci_resource_len(pdev, i) == 0)
  643. continue;
  644. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  645. adapter->hw.io_base = pci_resource_start(pdev, i);
  646. break;
  647. }
  648. }
  649. netdev->open = &e1000_open;
  650. netdev->stop = &e1000_close;
  651. netdev->hard_start_xmit = &e1000_xmit_frame;
  652. netdev->get_stats = &e1000_get_stats;
  653. netdev->set_multicast_list = &e1000_set_multi;
  654. netdev->set_mac_address = &e1000_set_mac;
  655. netdev->change_mtu = &e1000_change_mtu;
  656. netdev->do_ioctl = &e1000_ioctl;
  657. e1000_set_ethtool_ops(netdev);
  658. netdev->tx_timeout = &e1000_tx_timeout;
  659. netdev->watchdog_timeo = 5 * HZ;
  660. #ifdef CONFIG_E1000_NAPI
  661. netdev->poll = &e1000_clean;
  662. netdev->weight = 64;
  663. #endif
  664. netdev->vlan_rx_register = e1000_vlan_rx_register;
  665. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  666. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  667. #ifdef CONFIG_NET_POLL_CONTROLLER
  668. netdev->poll_controller = e1000_netpoll;
  669. #endif
  670. strcpy(netdev->name, pci_name(pdev));
  671. netdev->mem_start = mmio_start;
  672. netdev->mem_end = mmio_start + mmio_len;
  673. netdev->base_addr = adapter->hw.io_base;
  674. adapter->bd_number = cards_found;
  675. /* setup the private structure */
  676. if ((err = e1000_sw_init(adapter)))
  677. goto err_sw_init;
  678. /* Flash BAR mapping must happen after e1000_sw_init
  679. * because it depends on mac_type */
  680. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  681. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  682. flash_start = pci_resource_start(pdev, 1);
  683. flash_len = pci_resource_len(pdev, 1);
  684. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  685. if (!adapter->hw.flash_address) {
  686. err = -EIO;
  687. goto err_flashmap;
  688. }
  689. }
  690. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  691. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  692. /* if ksp3, indicate if it's port a being setup */
  693. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  694. e1000_ksp3_port_a == 0)
  695. adapter->ksp3_port_a = 1;
  696. e1000_ksp3_port_a++;
  697. /* Reset for multiple KP3 adapters */
  698. if (e1000_ksp3_port_a == 4)
  699. e1000_ksp3_port_a = 0;
  700. if (adapter->hw.mac_type >= e1000_82543) {
  701. netdev->features = NETIF_F_SG |
  702. NETIF_F_HW_CSUM |
  703. NETIF_F_HW_VLAN_TX |
  704. NETIF_F_HW_VLAN_RX |
  705. NETIF_F_HW_VLAN_FILTER;
  706. if (adapter->hw.mac_type == e1000_ich8lan)
  707. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  708. }
  709. #ifdef NETIF_F_TSO
  710. if ((adapter->hw.mac_type >= e1000_82544) &&
  711. (adapter->hw.mac_type != e1000_82547))
  712. netdev->features |= NETIF_F_TSO;
  713. #ifdef NETIF_F_TSO_IPV6
  714. if (adapter->hw.mac_type > e1000_82547_rev_2)
  715. netdev->features |= NETIF_F_TSO_IPV6;
  716. #endif
  717. #endif
  718. if (pci_using_dac)
  719. netdev->features |= NETIF_F_HIGHDMA;
  720. netdev->features |= NETIF_F_LLTX;
  721. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  722. /* initialize eeprom parameters */
  723. if (e1000_init_eeprom_params(&adapter->hw)) {
  724. E1000_ERR("EEPROM initialization failed\n");
  725. return -EIO;
  726. }
  727. /* before reading the EEPROM, reset the controller to
  728. * put the device in a known good starting state */
  729. e1000_reset_hw(&adapter->hw);
  730. /* make sure the EEPROM is good */
  731. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  732. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  733. err = -EIO;
  734. goto err_eeprom;
  735. }
  736. /* copy the MAC address out of the EEPROM */
  737. if (e1000_read_mac_addr(&adapter->hw))
  738. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  739. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  740. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  741. if (!is_valid_ether_addr(netdev->perm_addr)) {
  742. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  743. err = -EIO;
  744. goto err_eeprom;
  745. }
  746. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  747. e1000_get_bus_info(&adapter->hw);
  748. init_timer(&adapter->tx_fifo_stall_timer);
  749. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  750. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  751. init_timer(&adapter->watchdog_timer);
  752. adapter->watchdog_timer.function = &e1000_watchdog;
  753. adapter->watchdog_timer.data = (unsigned long) adapter;
  754. init_timer(&adapter->phy_info_timer);
  755. adapter->phy_info_timer.function = &e1000_update_phy_info;
  756. adapter->phy_info_timer.data = (unsigned long) adapter;
  757. INIT_WORK(&adapter->reset_task,
  758. (void (*)(void *))e1000_reset_task, netdev);
  759. /* we're going to reset, so assume we have no link for now */
  760. netif_carrier_off(netdev);
  761. netif_stop_queue(netdev);
  762. e1000_check_options(adapter);
  763. /* Initial Wake on LAN setting
  764. * If APM wake is enabled in the EEPROM,
  765. * enable the ACPI Magic Packet filter
  766. */
  767. switch (adapter->hw.mac_type) {
  768. case e1000_82542_rev2_0:
  769. case e1000_82542_rev2_1:
  770. case e1000_82543:
  771. break;
  772. case e1000_82544:
  773. e1000_read_eeprom(&adapter->hw,
  774. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  775. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  776. break;
  777. case e1000_ich8lan:
  778. e1000_read_eeprom(&adapter->hw,
  779. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  780. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  781. break;
  782. case e1000_82546:
  783. case e1000_82546_rev_3:
  784. case e1000_82571:
  785. case e1000_80003es2lan:
  786. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  787. e1000_read_eeprom(&adapter->hw,
  788. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  789. break;
  790. }
  791. /* Fall Through */
  792. default:
  793. e1000_read_eeprom(&adapter->hw,
  794. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  795. break;
  796. }
  797. if (eeprom_data & eeprom_apme_mask)
  798. adapter->wol |= E1000_WUFC_MAG;
  799. /* print bus type/speed/width info */
  800. {
  801. struct e1000_hw *hw = &adapter->hw;
  802. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  803. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  804. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  805. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  806. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  807. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  808. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  809. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  810. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  811. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  812. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  813. "32-bit"));
  814. }
  815. for (i = 0; i < 6; i++)
  816. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  817. /* reset the hardware with the new settings */
  818. e1000_reset(adapter);
  819. /* If the controller is 82573 and f/w is AMT, do not set
  820. * DRV_LOAD until the interface is up. For all other cases,
  821. * let the f/w know that the h/w is now under the control
  822. * of the driver. */
  823. if (adapter->hw.mac_type != e1000_82573 ||
  824. !e1000_check_mng_mode(&adapter->hw))
  825. e1000_get_hw_control(adapter);
  826. strcpy(netdev->name, "eth%d");
  827. if ((err = register_netdev(netdev)))
  828. goto err_register;
  829. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  830. cards_found++;
  831. return 0;
  832. err_register:
  833. if (adapter->hw.flash_address)
  834. iounmap(adapter->hw.flash_address);
  835. err_flashmap:
  836. err_sw_init:
  837. err_eeprom:
  838. iounmap(adapter->hw.hw_addr);
  839. err_ioremap:
  840. free_netdev(netdev);
  841. err_alloc_etherdev:
  842. pci_release_regions(pdev);
  843. return err;
  844. }
  845. /**
  846. * e1000_remove - Device Removal Routine
  847. * @pdev: PCI device information struct
  848. *
  849. * e1000_remove is called by the PCI subsystem to alert the driver
  850. * that it should release a PCI device. The could be caused by a
  851. * Hot-Plug event, or because the driver is going to be removed from
  852. * memory.
  853. **/
  854. static void __devexit
  855. e1000_remove(struct pci_dev *pdev)
  856. {
  857. struct net_device *netdev = pci_get_drvdata(pdev);
  858. struct e1000_adapter *adapter = netdev_priv(netdev);
  859. uint32_t manc;
  860. #ifdef CONFIG_E1000_NAPI
  861. int i;
  862. #endif
  863. flush_scheduled_work();
  864. if (adapter->hw.mac_type >= e1000_82540 &&
  865. adapter->hw.mac_type != e1000_ich8lan &&
  866. adapter->hw.media_type == e1000_media_type_copper) {
  867. manc = E1000_READ_REG(&adapter->hw, MANC);
  868. if (manc & E1000_MANC_SMBUS_EN) {
  869. manc |= E1000_MANC_ARP_EN;
  870. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  871. }
  872. }
  873. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  874. * would have already happened in close and is redundant. */
  875. e1000_release_hw_control(adapter);
  876. unregister_netdev(netdev);
  877. #ifdef CONFIG_E1000_NAPI
  878. for (i = 0; i < adapter->num_rx_queues; i++)
  879. dev_put(&adapter->polling_netdev[i]);
  880. #endif
  881. if (!e1000_check_phy_reset_block(&adapter->hw))
  882. e1000_phy_hw_reset(&adapter->hw);
  883. kfree(adapter->tx_ring);
  884. kfree(adapter->rx_ring);
  885. #ifdef CONFIG_E1000_NAPI
  886. kfree(adapter->polling_netdev);
  887. #endif
  888. iounmap(adapter->hw.hw_addr);
  889. if (adapter->hw.flash_address)
  890. iounmap(adapter->hw.flash_address);
  891. pci_release_regions(pdev);
  892. free_netdev(netdev);
  893. pci_disable_device(pdev);
  894. }
  895. /**
  896. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  897. * @adapter: board private structure to initialize
  898. *
  899. * e1000_sw_init initializes the Adapter private data structure.
  900. * Fields are initialized based on PCI device information and
  901. * OS network device settings (MTU size).
  902. **/
  903. static int __devinit
  904. e1000_sw_init(struct e1000_adapter *adapter)
  905. {
  906. struct e1000_hw *hw = &adapter->hw;
  907. struct net_device *netdev = adapter->netdev;
  908. struct pci_dev *pdev = adapter->pdev;
  909. #ifdef CONFIG_E1000_NAPI
  910. int i;
  911. #endif
  912. /* PCI config space info */
  913. hw->vendor_id = pdev->vendor;
  914. hw->device_id = pdev->device;
  915. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  916. hw->subsystem_id = pdev->subsystem_device;
  917. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  918. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  919. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  920. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  921. hw->max_frame_size = netdev->mtu +
  922. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  923. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  924. /* identify the MAC */
  925. if (e1000_set_mac_type(hw)) {
  926. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  927. return -EIO;
  928. }
  929. switch (hw->mac_type) {
  930. default:
  931. break;
  932. case e1000_82541:
  933. case e1000_82547:
  934. case e1000_82541_rev_2:
  935. case e1000_82547_rev_2:
  936. hw->phy_init_script = 1;
  937. break;
  938. }
  939. e1000_set_media_type(hw);
  940. hw->wait_autoneg_complete = FALSE;
  941. hw->tbi_compatibility_en = TRUE;
  942. hw->adaptive_ifs = TRUE;
  943. /* Copper options */
  944. if (hw->media_type == e1000_media_type_copper) {
  945. hw->mdix = AUTO_ALL_MODES;
  946. hw->disable_polarity_correction = FALSE;
  947. hw->master_slave = E1000_MASTER_SLAVE;
  948. }
  949. adapter->num_tx_queues = 1;
  950. adapter->num_rx_queues = 1;
  951. if (e1000_alloc_queues(adapter)) {
  952. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  953. return -ENOMEM;
  954. }
  955. #ifdef CONFIG_E1000_NAPI
  956. for (i = 0; i < adapter->num_rx_queues; i++) {
  957. adapter->polling_netdev[i].priv = adapter;
  958. adapter->polling_netdev[i].poll = &e1000_clean;
  959. adapter->polling_netdev[i].weight = 64;
  960. dev_hold(&adapter->polling_netdev[i]);
  961. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  962. }
  963. spin_lock_init(&adapter->tx_queue_lock);
  964. #endif
  965. atomic_set(&adapter->irq_sem, 1);
  966. spin_lock_init(&adapter->stats_lock);
  967. return 0;
  968. }
  969. /**
  970. * e1000_alloc_queues - Allocate memory for all rings
  971. * @adapter: board private structure to initialize
  972. *
  973. * We allocate one ring per queue at run-time since we don't know the
  974. * number of queues at compile-time. The polling_netdev array is
  975. * intended for Multiqueue, but should work fine with a single queue.
  976. **/
  977. static int __devinit
  978. e1000_alloc_queues(struct e1000_adapter *adapter)
  979. {
  980. int size;
  981. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  982. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  983. if (!adapter->tx_ring)
  984. return -ENOMEM;
  985. memset(adapter->tx_ring, 0, size);
  986. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  987. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  988. if (!adapter->rx_ring) {
  989. kfree(adapter->tx_ring);
  990. return -ENOMEM;
  991. }
  992. memset(adapter->rx_ring, 0, size);
  993. #ifdef CONFIG_E1000_NAPI
  994. size = sizeof(struct net_device) * adapter->num_rx_queues;
  995. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  996. if (!adapter->polling_netdev) {
  997. kfree(adapter->tx_ring);
  998. kfree(adapter->rx_ring);
  999. return -ENOMEM;
  1000. }
  1001. memset(adapter->polling_netdev, 0, size);
  1002. #endif
  1003. return E1000_SUCCESS;
  1004. }
  1005. /**
  1006. * e1000_open - Called when a network interface is made active
  1007. * @netdev: network interface device structure
  1008. *
  1009. * Returns 0 on success, negative value on failure
  1010. *
  1011. * The open entry point is called when a network interface is made
  1012. * active by the system (IFF_UP). At this point all resources needed
  1013. * for transmit and receive operations are allocated, the interrupt
  1014. * handler is registered with the OS, the watchdog timer is started,
  1015. * and the stack is notified that the interface is ready.
  1016. **/
  1017. static int
  1018. e1000_open(struct net_device *netdev)
  1019. {
  1020. struct e1000_adapter *adapter = netdev_priv(netdev);
  1021. int err;
  1022. /* disallow open during test */
  1023. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1024. return -EBUSY;
  1025. /* allocate transmit descriptors */
  1026. if ((err = e1000_setup_all_tx_resources(adapter)))
  1027. goto err_setup_tx;
  1028. /* allocate receive descriptors */
  1029. if ((err = e1000_setup_all_rx_resources(adapter)))
  1030. goto err_setup_rx;
  1031. err = e1000_request_irq(adapter);
  1032. if (err)
  1033. goto err_up;
  1034. e1000_power_up_phy(adapter);
  1035. if ((err = e1000_up(adapter)))
  1036. goto err_up;
  1037. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1038. if ((adapter->hw.mng_cookie.status &
  1039. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1040. e1000_update_mng_vlan(adapter);
  1041. }
  1042. /* If AMT is enabled, let the firmware know that the network
  1043. * interface is now open */
  1044. if (adapter->hw.mac_type == e1000_82573 &&
  1045. e1000_check_mng_mode(&adapter->hw))
  1046. e1000_get_hw_control(adapter);
  1047. return E1000_SUCCESS;
  1048. err_up:
  1049. e1000_free_all_rx_resources(adapter);
  1050. err_setup_rx:
  1051. e1000_free_all_tx_resources(adapter);
  1052. err_setup_tx:
  1053. e1000_reset(adapter);
  1054. return err;
  1055. }
  1056. /**
  1057. * e1000_close - Disables a network interface
  1058. * @netdev: network interface device structure
  1059. *
  1060. * Returns 0, this is not allowed to fail
  1061. *
  1062. * The close entry point is called when an interface is de-activated
  1063. * by the OS. The hardware is still under the drivers control, but
  1064. * needs to be disabled. A global MAC reset is issued to stop the
  1065. * hardware, and all transmit and receive resources are freed.
  1066. **/
  1067. static int
  1068. e1000_close(struct net_device *netdev)
  1069. {
  1070. struct e1000_adapter *adapter = netdev_priv(netdev);
  1071. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1072. e1000_down(adapter);
  1073. e1000_power_down_phy(adapter);
  1074. e1000_free_irq(adapter);
  1075. e1000_free_all_tx_resources(adapter);
  1076. e1000_free_all_rx_resources(adapter);
  1077. if ((adapter->hw.mng_cookie.status &
  1078. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1079. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1080. }
  1081. /* If AMT is enabled, let the firmware know that the network
  1082. * interface is now closed */
  1083. if (adapter->hw.mac_type == e1000_82573 &&
  1084. e1000_check_mng_mode(&adapter->hw))
  1085. e1000_release_hw_control(adapter);
  1086. return 0;
  1087. }
  1088. /**
  1089. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1090. * @adapter: address of board private structure
  1091. * @start: address of beginning of memory
  1092. * @len: length of memory
  1093. **/
  1094. static boolean_t
  1095. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1096. void *start, unsigned long len)
  1097. {
  1098. unsigned long begin = (unsigned long) start;
  1099. unsigned long end = begin + len;
  1100. /* First rev 82545 and 82546 need to not allow any memory
  1101. * write location to cross 64k boundary due to errata 23 */
  1102. if (adapter->hw.mac_type == e1000_82545 ||
  1103. adapter->hw.mac_type == e1000_82546) {
  1104. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1105. }
  1106. return TRUE;
  1107. }
  1108. /**
  1109. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1110. * @adapter: board private structure
  1111. * @txdr: tx descriptor ring (for a specific queue) to setup
  1112. *
  1113. * Return 0 on success, negative on failure
  1114. **/
  1115. static int
  1116. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1117. struct e1000_tx_ring *txdr)
  1118. {
  1119. struct pci_dev *pdev = adapter->pdev;
  1120. int size;
  1121. size = sizeof(struct e1000_buffer) * txdr->count;
  1122. txdr->buffer_info = vmalloc(size);
  1123. if (!txdr->buffer_info) {
  1124. DPRINTK(PROBE, ERR,
  1125. "Unable to allocate memory for the transmit descriptor ring\n");
  1126. return -ENOMEM;
  1127. }
  1128. memset(txdr->buffer_info, 0, size);
  1129. /* round up to nearest 4K */
  1130. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1131. E1000_ROUNDUP(txdr->size, 4096);
  1132. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1133. if (!txdr->desc) {
  1134. setup_tx_desc_die:
  1135. vfree(txdr->buffer_info);
  1136. DPRINTK(PROBE, ERR,
  1137. "Unable to allocate memory for the transmit descriptor ring\n");
  1138. return -ENOMEM;
  1139. }
  1140. /* Fix for errata 23, can't cross 64kB boundary */
  1141. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1142. void *olddesc = txdr->desc;
  1143. dma_addr_t olddma = txdr->dma;
  1144. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1145. "at %p\n", txdr->size, txdr->desc);
  1146. /* Try again, without freeing the previous */
  1147. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1148. /* Failed allocation, critical failure */
  1149. if (!txdr->desc) {
  1150. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1151. goto setup_tx_desc_die;
  1152. }
  1153. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1154. /* give up */
  1155. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1156. txdr->dma);
  1157. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1158. DPRINTK(PROBE, ERR,
  1159. "Unable to allocate aligned memory "
  1160. "for the transmit descriptor ring\n");
  1161. vfree(txdr->buffer_info);
  1162. return -ENOMEM;
  1163. } else {
  1164. /* Free old allocation, new allocation was successful */
  1165. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1166. }
  1167. }
  1168. memset(txdr->desc, 0, txdr->size);
  1169. txdr->next_to_use = 0;
  1170. txdr->next_to_clean = 0;
  1171. spin_lock_init(&txdr->tx_lock);
  1172. return 0;
  1173. }
  1174. /**
  1175. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1176. * (Descriptors) for all queues
  1177. * @adapter: board private structure
  1178. *
  1179. * If this function returns with an error, then it's possible one or
  1180. * more of the rings is populated (while the rest are not). It is the
  1181. * callers duty to clean those orphaned rings.
  1182. *
  1183. * Return 0 on success, negative on failure
  1184. **/
  1185. int
  1186. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1187. {
  1188. int i, err = 0;
  1189. for (i = 0; i < adapter->num_tx_queues; i++) {
  1190. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1191. if (err) {
  1192. DPRINTK(PROBE, ERR,
  1193. "Allocation for Tx Queue %u failed\n", i);
  1194. break;
  1195. }
  1196. }
  1197. return err;
  1198. }
  1199. /**
  1200. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1201. * @adapter: board private structure
  1202. *
  1203. * Configure the Tx unit of the MAC after a reset.
  1204. **/
  1205. static void
  1206. e1000_configure_tx(struct e1000_adapter *adapter)
  1207. {
  1208. uint64_t tdba;
  1209. struct e1000_hw *hw = &adapter->hw;
  1210. uint32_t tdlen, tctl, tipg, tarc;
  1211. uint32_t ipgr1, ipgr2;
  1212. /* Setup the HW Tx Head and Tail descriptor pointers */
  1213. switch (adapter->num_tx_queues) {
  1214. case 1:
  1215. default:
  1216. tdba = adapter->tx_ring[0].dma;
  1217. tdlen = adapter->tx_ring[0].count *
  1218. sizeof(struct e1000_tx_desc);
  1219. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1220. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1221. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1222. E1000_WRITE_REG(hw, TDT, 0);
  1223. E1000_WRITE_REG(hw, TDH, 0);
  1224. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
  1225. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
  1226. break;
  1227. }
  1228. /* Set the default values for the Tx Inter Packet Gap timer */
  1229. if (hw->media_type == e1000_media_type_fiber ||
  1230. hw->media_type == e1000_media_type_internal_serdes)
  1231. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1232. else
  1233. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1234. switch (hw->mac_type) {
  1235. case e1000_82542_rev2_0:
  1236. case e1000_82542_rev2_1:
  1237. tipg = DEFAULT_82542_TIPG_IPGT;
  1238. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1239. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1240. break;
  1241. case e1000_80003es2lan:
  1242. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1243. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1244. break;
  1245. default:
  1246. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1247. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1248. break;
  1249. }
  1250. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1251. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1252. E1000_WRITE_REG(hw, TIPG, tipg);
  1253. /* Set the Tx Interrupt Delay register */
  1254. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1255. if (hw->mac_type >= e1000_82540)
  1256. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1257. /* Program the Transmit Control Register */
  1258. tctl = E1000_READ_REG(hw, TCTL);
  1259. tctl &= ~E1000_TCTL_CT;
  1260. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1261. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1262. #ifdef DISABLE_MULR
  1263. /* disable Multiple Reads for debugging */
  1264. tctl &= ~E1000_TCTL_MULR;
  1265. #endif
  1266. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1267. tarc = E1000_READ_REG(hw, TARC0);
  1268. tarc |= ((1 << 25) | (1 << 21));
  1269. E1000_WRITE_REG(hw, TARC0, tarc);
  1270. tarc = E1000_READ_REG(hw, TARC1);
  1271. tarc |= (1 << 25);
  1272. if (tctl & E1000_TCTL_MULR)
  1273. tarc &= ~(1 << 28);
  1274. else
  1275. tarc |= (1 << 28);
  1276. E1000_WRITE_REG(hw, TARC1, tarc);
  1277. } else if (hw->mac_type == e1000_80003es2lan) {
  1278. tarc = E1000_READ_REG(hw, TARC0);
  1279. tarc |= 1;
  1280. if (hw->media_type == e1000_media_type_internal_serdes)
  1281. tarc |= (1 << 20);
  1282. E1000_WRITE_REG(hw, TARC0, tarc);
  1283. tarc = E1000_READ_REG(hw, TARC1);
  1284. tarc |= 1;
  1285. E1000_WRITE_REG(hw, TARC1, tarc);
  1286. }
  1287. e1000_config_collision_dist(hw);
  1288. /* Setup Transmit Descriptor Settings for eop descriptor */
  1289. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1290. E1000_TXD_CMD_IFCS;
  1291. if (hw->mac_type < e1000_82543)
  1292. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1293. else
  1294. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1295. /* Cache if we're 82544 running in PCI-X because we'll
  1296. * need this to apply a workaround later in the send path. */
  1297. if (hw->mac_type == e1000_82544 &&
  1298. hw->bus_type == e1000_bus_type_pcix)
  1299. adapter->pcix_82544 = 1;
  1300. E1000_WRITE_REG(hw, TCTL, tctl);
  1301. }
  1302. /**
  1303. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1304. * @adapter: board private structure
  1305. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1306. *
  1307. * Returns 0 on success, negative on failure
  1308. **/
  1309. static int
  1310. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1311. struct e1000_rx_ring *rxdr)
  1312. {
  1313. struct pci_dev *pdev = adapter->pdev;
  1314. int size, desc_len;
  1315. size = sizeof(struct e1000_buffer) * rxdr->count;
  1316. rxdr->buffer_info = vmalloc(size);
  1317. if (!rxdr->buffer_info) {
  1318. DPRINTK(PROBE, ERR,
  1319. "Unable to allocate memory for the receive descriptor ring\n");
  1320. return -ENOMEM;
  1321. }
  1322. memset(rxdr->buffer_info, 0, size);
  1323. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1324. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1325. if (!rxdr->ps_page) {
  1326. vfree(rxdr->buffer_info);
  1327. DPRINTK(PROBE, ERR,
  1328. "Unable to allocate memory for the receive descriptor ring\n");
  1329. return -ENOMEM;
  1330. }
  1331. memset(rxdr->ps_page, 0, size);
  1332. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1333. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1334. if (!rxdr->ps_page_dma) {
  1335. vfree(rxdr->buffer_info);
  1336. kfree(rxdr->ps_page);
  1337. DPRINTK(PROBE, ERR,
  1338. "Unable to allocate memory for the receive descriptor ring\n");
  1339. return -ENOMEM;
  1340. }
  1341. memset(rxdr->ps_page_dma, 0, size);
  1342. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1343. desc_len = sizeof(struct e1000_rx_desc);
  1344. else
  1345. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1346. /* Round up to nearest 4K */
  1347. rxdr->size = rxdr->count * desc_len;
  1348. E1000_ROUNDUP(rxdr->size, 4096);
  1349. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1350. if (!rxdr->desc) {
  1351. DPRINTK(PROBE, ERR,
  1352. "Unable to allocate memory for the receive descriptor ring\n");
  1353. setup_rx_desc_die:
  1354. vfree(rxdr->buffer_info);
  1355. kfree(rxdr->ps_page);
  1356. kfree(rxdr->ps_page_dma);
  1357. return -ENOMEM;
  1358. }
  1359. /* Fix for errata 23, can't cross 64kB boundary */
  1360. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1361. void *olddesc = rxdr->desc;
  1362. dma_addr_t olddma = rxdr->dma;
  1363. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1364. "at %p\n", rxdr->size, rxdr->desc);
  1365. /* Try again, without freeing the previous */
  1366. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1367. /* Failed allocation, critical failure */
  1368. if (!rxdr->desc) {
  1369. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1370. DPRINTK(PROBE, ERR,
  1371. "Unable to allocate memory "
  1372. "for the receive descriptor ring\n");
  1373. goto setup_rx_desc_die;
  1374. }
  1375. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1376. /* give up */
  1377. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1378. rxdr->dma);
  1379. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1380. DPRINTK(PROBE, ERR,
  1381. "Unable to allocate aligned memory "
  1382. "for the receive descriptor ring\n");
  1383. goto setup_rx_desc_die;
  1384. } else {
  1385. /* Free old allocation, new allocation was successful */
  1386. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1387. }
  1388. }
  1389. memset(rxdr->desc, 0, rxdr->size);
  1390. rxdr->next_to_clean = 0;
  1391. rxdr->next_to_use = 0;
  1392. return 0;
  1393. }
  1394. /**
  1395. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1396. * (Descriptors) for all queues
  1397. * @adapter: board private structure
  1398. *
  1399. * If this function returns with an error, then it's possible one or
  1400. * more of the rings is populated (while the rest are not). It is the
  1401. * callers duty to clean those orphaned rings.
  1402. *
  1403. * Return 0 on success, negative on failure
  1404. **/
  1405. int
  1406. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1407. {
  1408. int i, err = 0;
  1409. for (i = 0; i < adapter->num_rx_queues; i++) {
  1410. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1411. if (err) {
  1412. DPRINTK(PROBE, ERR,
  1413. "Allocation for Rx Queue %u failed\n", i);
  1414. break;
  1415. }
  1416. }
  1417. return err;
  1418. }
  1419. /**
  1420. * e1000_setup_rctl - configure the receive control registers
  1421. * @adapter: Board private structure
  1422. **/
  1423. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1424. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1425. static void
  1426. e1000_setup_rctl(struct e1000_adapter *adapter)
  1427. {
  1428. uint32_t rctl, rfctl;
  1429. uint32_t psrctl = 0;
  1430. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1431. uint32_t pages = 0;
  1432. #endif
  1433. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1434. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1435. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1436. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1437. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1438. if (adapter->hw.tbi_compatibility_on == 1)
  1439. rctl |= E1000_RCTL_SBP;
  1440. else
  1441. rctl &= ~E1000_RCTL_SBP;
  1442. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1443. rctl &= ~E1000_RCTL_LPE;
  1444. else
  1445. rctl |= E1000_RCTL_LPE;
  1446. /* Setup buffer sizes */
  1447. rctl &= ~E1000_RCTL_SZ_4096;
  1448. rctl |= E1000_RCTL_BSEX;
  1449. switch (adapter->rx_buffer_len) {
  1450. case E1000_RXBUFFER_256:
  1451. rctl |= E1000_RCTL_SZ_256;
  1452. rctl &= ~E1000_RCTL_BSEX;
  1453. break;
  1454. case E1000_RXBUFFER_512:
  1455. rctl |= E1000_RCTL_SZ_512;
  1456. rctl &= ~E1000_RCTL_BSEX;
  1457. break;
  1458. case E1000_RXBUFFER_1024:
  1459. rctl |= E1000_RCTL_SZ_1024;
  1460. rctl &= ~E1000_RCTL_BSEX;
  1461. break;
  1462. case E1000_RXBUFFER_2048:
  1463. default:
  1464. rctl |= E1000_RCTL_SZ_2048;
  1465. rctl &= ~E1000_RCTL_BSEX;
  1466. break;
  1467. case E1000_RXBUFFER_4096:
  1468. rctl |= E1000_RCTL_SZ_4096;
  1469. break;
  1470. case E1000_RXBUFFER_8192:
  1471. rctl |= E1000_RCTL_SZ_8192;
  1472. break;
  1473. case E1000_RXBUFFER_16384:
  1474. rctl |= E1000_RCTL_SZ_16384;
  1475. break;
  1476. }
  1477. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1478. /* 82571 and greater support packet-split where the protocol
  1479. * header is placed in skb->data and the packet data is
  1480. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1481. * In the case of a non-split, skb->data is linearly filled,
  1482. * followed by the page buffers. Therefore, skb->data is
  1483. * sized to hold the largest protocol header.
  1484. */
  1485. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1486. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1487. PAGE_SIZE <= 16384)
  1488. adapter->rx_ps_pages = pages;
  1489. else
  1490. adapter->rx_ps_pages = 0;
  1491. #endif
  1492. if (adapter->rx_ps_pages) {
  1493. /* Configure extra packet-split registers */
  1494. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1495. rfctl |= E1000_RFCTL_EXTEN;
  1496. /* disable IPv6 packet split support */
  1497. rfctl |= E1000_RFCTL_IPV6_DIS;
  1498. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1499. rctl |= E1000_RCTL_DTYP_PS;
  1500. psrctl |= adapter->rx_ps_bsize0 >>
  1501. E1000_PSRCTL_BSIZE0_SHIFT;
  1502. switch (adapter->rx_ps_pages) {
  1503. case 3:
  1504. psrctl |= PAGE_SIZE <<
  1505. E1000_PSRCTL_BSIZE3_SHIFT;
  1506. case 2:
  1507. psrctl |= PAGE_SIZE <<
  1508. E1000_PSRCTL_BSIZE2_SHIFT;
  1509. case 1:
  1510. psrctl |= PAGE_SIZE >>
  1511. E1000_PSRCTL_BSIZE1_SHIFT;
  1512. break;
  1513. }
  1514. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1515. }
  1516. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1517. }
  1518. /**
  1519. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1520. * @adapter: board private structure
  1521. *
  1522. * Configure the Rx unit of the MAC after a reset.
  1523. **/
  1524. static void
  1525. e1000_configure_rx(struct e1000_adapter *adapter)
  1526. {
  1527. uint64_t rdba;
  1528. struct e1000_hw *hw = &adapter->hw;
  1529. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1530. if (adapter->rx_ps_pages) {
  1531. /* this is a 32 byte descriptor */
  1532. rdlen = adapter->rx_ring[0].count *
  1533. sizeof(union e1000_rx_desc_packet_split);
  1534. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1535. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1536. } else {
  1537. rdlen = adapter->rx_ring[0].count *
  1538. sizeof(struct e1000_rx_desc);
  1539. adapter->clean_rx = e1000_clean_rx_irq;
  1540. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1541. }
  1542. /* disable receives while setting up the descriptors */
  1543. rctl = E1000_READ_REG(hw, RCTL);
  1544. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1545. /* set the Receive Delay Timer Register */
  1546. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1547. if (hw->mac_type >= e1000_82540) {
  1548. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1549. if (adapter->itr > 1)
  1550. E1000_WRITE_REG(hw, ITR,
  1551. 1000000000 / (adapter->itr * 256));
  1552. }
  1553. if (hw->mac_type >= e1000_82571) {
  1554. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1555. /* Reset delay timers after every interrupt */
  1556. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1557. #ifdef CONFIG_E1000_NAPI
  1558. /* Auto-Mask interrupts upon ICR read. */
  1559. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1560. #endif
  1561. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1562. E1000_WRITE_REG(hw, IAM, ~0);
  1563. E1000_WRITE_FLUSH(hw);
  1564. }
  1565. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1566. * the Base and Length of the Rx Descriptor Ring */
  1567. switch (adapter->num_rx_queues) {
  1568. case 1:
  1569. default:
  1570. rdba = adapter->rx_ring[0].dma;
  1571. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1572. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1573. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1574. E1000_WRITE_REG(hw, RDT, 0);
  1575. E1000_WRITE_REG(hw, RDH, 0);
  1576. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
  1577. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
  1578. break;
  1579. }
  1580. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1581. if (hw->mac_type >= e1000_82543) {
  1582. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1583. if (adapter->rx_csum == TRUE) {
  1584. rxcsum |= E1000_RXCSUM_TUOFL;
  1585. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1586. * Must be used in conjunction with packet-split. */
  1587. if ((hw->mac_type >= e1000_82571) &&
  1588. (adapter->rx_ps_pages)) {
  1589. rxcsum |= E1000_RXCSUM_IPPCSE;
  1590. }
  1591. } else {
  1592. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1593. /* don't need to clear IPPCSE as it defaults to 0 */
  1594. }
  1595. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1596. }
  1597. /* Enable Receives */
  1598. E1000_WRITE_REG(hw, RCTL, rctl);
  1599. }
  1600. /**
  1601. * e1000_free_tx_resources - Free Tx Resources per Queue
  1602. * @adapter: board private structure
  1603. * @tx_ring: Tx descriptor ring for a specific queue
  1604. *
  1605. * Free all transmit software resources
  1606. **/
  1607. static void
  1608. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1609. struct e1000_tx_ring *tx_ring)
  1610. {
  1611. struct pci_dev *pdev = adapter->pdev;
  1612. e1000_clean_tx_ring(adapter, tx_ring);
  1613. vfree(tx_ring->buffer_info);
  1614. tx_ring->buffer_info = NULL;
  1615. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1616. tx_ring->desc = NULL;
  1617. }
  1618. /**
  1619. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1620. * @adapter: board private structure
  1621. *
  1622. * Free all transmit software resources
  1623. **/
  1624. void
  1625. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1626. {
  1627. int i;
  1628. for (i = 0; i < adapter->num_tx_queues; i++)
  1629. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1630. }
  1631. static void
  1632. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1633. struct e1000_buffer *buffer_info)
  1634. {
  1635. if (buffer_info->dma) {
  1636. pci_unmap_page(adapter->pdev,
  1637. buffer_info->dma,
  1638. buffer_info->length,
  1639. PCI_DMA_TODEVICE);
  1640. }
  1641. if (buffer_info->skb)
  1642. dev_kfree_skb_any(buffer_info->skb);
  1643. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1644. }
  1645. /**
  1646. * e1000_clean_tx_ring - Free Tx Buffers
  1647. * @adapter: board private structure
  1648. * @tx_ring: ring to be cleaned
  1649. **/
  1650. static void
  1651. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1652. struct e1000_tx_ring *tx_ring)
  1653. {
  1654. struct e1000_buffer *buffer_info;
  1655. unsigned long size;
  1656. unsigned int i;
  1657. /* Free all the Tx ring sk_buffs */
  1658. for (i = 0; i < tx_ring->count; i++) {
  1659. buffer_info = &tx_ring->buffer_info[i];
  1660. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1661. }
  1662. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1663. memset(tx_ring->buffer_info, 0, size);
  1664. /* Zero out the descriptor ring */
  1665. memset(tx_ring->desc, 0, tx_ring->size);
  1666. tx_ring->next_to_use = 0;
  1667. tx_ring->next_to_clean = 0;
  1668. tx_ring->last_tx_tso = 0;
  1669. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1670. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1671. }
  1672. /**
  1673. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1674. * @adapter: board private structure
  1675. **/
  1676. static void
  1677. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1678. {
  1679. int i;
  1680. for (i = 0; i < adapter->num_tx_queues; i++)
  1681. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1682. }
  1683. /**
  1684. * e1000_free_rx_resources - Free Rx Resources
  1685. * @adapter: board private structure
  1686. * @rx_ring: ring to clean the resources from
  1687. *
  1688. * Free all receive software resources
  1689. **/
  1690. static void
  1691. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1692. struct e1000_rx_ring *rx_ring)
  1693. {
  1694. struct pci_dev *pdev = adapter->pdev;
  1695. e1000_clean_rx_ring(adapter, rx_ring);
  1696. vfree(rx_ring->buffer_info);
  1697. rx_ring->buffer_info = NULL;
  1698. kfree(rx_ring->ps_page);
  1699. rx_ring->ps_page = NULL;
  1700. kfree(rx_ring->ps_page_dma);
  1701. rx_ring->ps_page_dma = NULL;
  1702. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1703. rx_ring->desc = NULL;
  1704. }
  1705. /**
  1706. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1707. * @adapter: board private structure
  1708. *
  1709. * Free all receive software resources
  1710. **/
  1711. void
  1712. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1713. {
  1714. int i;
  1715. for (i = 0; i < adapter->num_rx_queues; i++)
  1716. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1717. }
  1718. /**
  1719. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1720. * @adapter: board private structure
  1721. * @rx_ring: ring to free buffers from
  1722. **/
  1723. static void
  1724. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1725. struct e1000_rx_ring *rx_ring)
  1726. {
  1727. struct e1000_buffer *buffer_info;
  1728. struct e1000_ps_page *ps_page;
  1729. struct e1000_ps_page_dma *ps_page_dma;
  1730. struct pci_dev *pdev = adapter->pdev;
  1731. unsigned long size;
  1732. unsigned int i, j;
  1733. /* Free all the Rx ring sk_buffs */
  1734. for (i = 0; i < rx_ring->count; i++) {
  1735. buffer_info = &rx_ring->buffer_info[i];
  1736. if (buffer_info->skb) {
  1737. pci_unmap_single(pdev,
  1738. buffer_info->dma,
  1739. buffer_info->length,
  1740. PCI_DMA_FROMDEVICE);
  1741. dev_kfree_skb(buffer_info->skb);
  1742. buffer_info->skb = NULL;
  1743. }
  1744. ps_page = &rx_ring->ps_page[i];
  1745. ps_page_dma = &rx_ring->ps_page_dma[i];
  1746. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1747. if (!ps_page->ps_page[j]) break;
  1748. pci_unmap_page(pdev,
  1749. ps_page_dma->ps_page_dma[j],
  1750. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1751. ps_page_dma->ps_page_dma[j] = 0;
  1752. put_page(ps_page->ps_page[j]);
  1753. ps_page->ps_page[j] = NULL;
  1754. }
  1755. }
  1756. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1757. memset(rx_ring->buffer_info, 0, size);
  1758. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1759. memset(rx_ring->ps_page, 0, size);
  1760. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1761. memset(rx_ring->ps_page_dma, 0, size);
  1762. /* Zero out the descriptor ring */
  1763. memset(rx_ring->desc, 0, rx_ring->size);
  1764. rx_ring->next_to_clean = 0;
  1765. rx_ring->next_to_use = 0;
  1766. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1767. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1768. }
  1769. /**
  1770. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1771. * @adapter: board private structure
  1772. **/
  1773. static void
  1774. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1775. {
  1776. int i;
  1777. for (i = 0; i < adapter->num_rx_queues; i++)
  1778. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1779. }
  1780. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1781. * and memory write and invalidate disabled for certain operations
  1782. */
  1783. static void
  1784. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1785. {
  1786. struct net_device *netdev = adapter->netdev;
  1787. uint32_t rctl;
  1788. e1000_pci_clear_mwi(&adapter->hw);
  1789. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1790. rctl |= E1000_RCTL_RST;
  1791. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1792. E1000_WRITE_FLUSH(&adapter->hw);
  1793. mdelay(5);
  1794. if (netif_running(netdev))
  1795. e1000_clean_all_rx_rings(adapter);
  1796. }
  1797. static void
  1798. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1799. {
  1800. struct net_device *netdev = adapter->netdev;
  1801. uint32_t rctl;
  1802. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1803. rctl &= ~E1000_RCTL_RST;
  1804. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1805. E1000_WRITE_FLUSH(&adapter->hw);
  1806. mdelay(5);
  1807. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1808. e1000_pci_set_mwi(&adapter->hw);
  1809. if (netif_running(netdev)) {
  1810. /* No need to loop, because 82542 supports only 1 queue */
  1811. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1812. e1000_configure_rx(adapter);
  1813. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1814. }
  1815. }
  1816. /**
  1817. * e1000_set_mac - Change the Ethernet Address of the NIC
  1818. * @netdev: network interface device structure
  1819. * @p: pointer to an address structure
  1820. *
  1821. * Returns 0 on success, negative on failure
  1822. **/
  1823. static int
  1824. e1000_set_mac(struct net_device *netdev, void *p)
  1825. {
  1826. struct e1000_adapter *adapter = netdev_priv(netdev);
  1827. struct sockaddr *addr = p;
  1828. if (!is_valid_ether_addr(addr->sa_data))
  1829. return -EADDRNOTAVAIL;
  1830. /* 82542 2.0 needs to be in reset to write receive address registers */
  1831. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1832. e1000_enter_82542_rst(adapter);
  1833. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1834. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1835. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1836. /* With 82571 controllers, LAA may be overwritten (with the default)
  1837. * due to controller reset from the other port. */
  1838. if (adapter->hw.mac_type == e1000_82571) {
  1839. /* activate the work around */
  1840. adapter->hw.laa_is_present = 1;
  1841. /* Hold a copy of the LAA in RAR[14] This is done so that
  1842. * between the time RAR[0] gets clobbered and the time it
  1843. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1844. * of the RARs and no incoming packets directed to this port
  1845. * are dropped. Eventaully the LAA will be in RAR[0] and
  1846. * RAR[14] */
  1847. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1848. E1000_RAR_ENTRIES - 1);
  1849. }
  1850. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1851. e1000_leave_82542_rst(adapter);
  1852. return 0;
  1853. }
  1854. /**
  1855. * e1000_set_multi - Multicast and Promiscuous mode set
  1856. * @netdev: network interface device structure
  1857. *
  1858. * The set_multi entry point is called whenever the multicast address
  1859. * list or the network interface flags are updated. This routine is
  1860. * responsible for configuring the hardware for proper multicast,
  1861. * promiscuous mode, and all-multi behavior.
  1862. **/
  1863. static void
  1864. e1000_set_multi(struct net_device *netdev)
  1865. {
  1866. struct e1000_adapter *adapter = netdev_priv(netdev);
  1867. struct e1000_hw *hw = &adapter->hw;
  1868. struct dev_mc_list *mc_ptr;
  1869. uint32_t rctl;
  1870. uint32_t hash_value;
  1871. int i, rar_entries = E1000_RAR_ENTRIES;
  1872. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1873. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1874. E1000_NUM_MTA_REGISTERS;
  1875. if (adapter->hw.mac_type == e1000_ich8lan)
  1876. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1877. /* reserve RAR[14] for LAA over-write work-around */
  1878. if (adapter->hw.mac_type == e1000_82571)
  1879. rar_entries--;
  1880. /* Check for Promiscuous and All Multicast modes */
  1881. rctl = E1000_READ_REG(hw, RCTL);
  1882. if (netdev->flags & IFF_PROMISC) {
  1883. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1884. } else if (netdev->flags & IFF_ALLMULTI) {
  1885. rctl |= E1000_RCTL_MPE;
  1886. rctl &= ~E1000_RCTL_UPE;
  1887. } else {
  1888. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1889. }
  1890. E1000_WRITE_REG(hw, RCTL, rctl);
  1891. /* 82542 2.0 needs to be in reset to write receive address registers */
  1892. if (hw->mac_type == e1000_82542_rev2_0)
  1893. e1000_enter_82542_rst(adapter);
  1894. /* load the first 14 multicast address into the exact filters 1-14
  1895. * RAR 0 is used for the station MAC adddress
  1896. * if there are not 14 addresses, go ahead and clear the filters
  1897. * -- with 82571 controllers only 0-13 entries are filled here
  1898. */
  1899. mc_ptr = netdev->mc_list;
  1900. for (i = 1; i < rar_entries; i++) {
  1901. if (mc_ptr) {
  1902. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1903. mc_ptr = mc_ptr->next;
  1904. } else {
  1905. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1906. E1000_WRITE_FLUSH(hw);
  1907. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1908. E1000_WRITE_FLUSH(hw);
  1909. }
  1910. }
  1911. /* clear the old settings from the multicast hash table */
  1912. for (i = 0; i < mta_reg_count; i++) {
  1913. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1914. E1000_WRITE_FLUSH(hw);
  1915. }
  1916. /* load any remaining addresses into the hash table */
  1917. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1918. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1919. e1000_mta_set(hw, hash_value);
  1920. }
  1921. if (hw->mac_type == e1000_82542_rev2_0)
  1922. e1000_leave_82542_rst(adapter);
  1923. }
  1924. /* Need to wait a few seconds after link up to get diagnostic information from
  1925. * the phy */
  1926. static void
  1927. e1000_update_phy_info(unsigned long data)
  1928. {
  1929. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1930. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1931. }
  1932. /**
  1933. * e1000_82547_tx_fifo_stall - Timer Call-back
  1934. * @data: pointer to adapter cast into an unsigned long
  1935. **/
  1936. static void
  1937. e1000_82547_tx_fifo_stall(unsigned long data)
  1938. {
  1939. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1940. struct net_device *netdev = adapter->netdev;
  1941. uint32_t tctl;
  1942. if (atomic_read(&adapter->tx_fifo_stall)) {
  1943. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1944. E1000_READ_REG(&adapter->hw, TDH)) &&
  1945. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1946. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1947. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1948. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1949. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1950. E1000_WRITE_REG(&adapter->hw, TCTL,
  1951. tctl & ~E1000_TCTL_EN);
  1952. E1000_WRITE_REG(&adapter->hw, TDFT,
  1953. adapter->tx_head_addr);
  1954. E1000_WRITE_REG(&adapter->hw, TDFH,
  1955. adapter->tx_head_addr);
  1956. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1957. adapter->tx_head_addr);
  1958. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1959. adapter->tx_head_addr);
  1960. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1961. E1000_WRITE_FLUSH(&adapter->hw);
  1962. adapter->tx_fifo_head = 0;
  1963. atomic_set(&adapter->tx_fifo_stall, 0);
  1964. netif_wake_queue(netdev);
  1965. } else {
  1966. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1967. }
  1968. }
  1969. }
  1970. /**
  1971. * e1000_watchdog - Timer Call-back
  1972. * @data: pointer to adapter cast into an unsigned long
  1973. **/
  1974. static void
  1975. e1000_watchdog(unsigned long data)
  1976. {
  1977. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1978. struct net_device *netdev = adapter->netdev;
  1979. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1980. uint32_t link, tctl;
  1981. int32_t ret_val;
  1982. ret_val = e1000_check_for_link(&adapter->hw);
  1983. if ((ret_val == E1000_ERR_PHY) &&
  1984. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  1985. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  1986. /* See e1000_kumeran_lock_loss_workaround() */
  1987. DPRINTK(LINK, INFO,
  1988. "Gigabit has been disabled, downgrading speed\n");
  1989. }
  1990. if (adapter->hw.mac_type == e1000_82573) {
  1991. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1992. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1993. e1000_update_mng_vlan(adapter);
  1994. }
  1995. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1996. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1997. link = !adapter->hw.serdes_link_down;
  1998. else
  1999. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2000. if (link) {
  2001. if (!netif_carrier_ok(netdev)) {
  2002. boolean_t txb2b = 1;
  2003. e1000_get_speed_and_duplex(&adapter->hw,
  2004. &adapter->link_speed,
  2005. &adapter->link_duplex);
  2006. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2007. adapter->link_speed,
  2008. adapter->link_duplex == FULL_DUPLEX ?
  2009. "Full Duplex" : "Half Duplex");
  2010. /* tweak tx_queue_len according to speed/duplex
  2011. * and adjust the timeout factor */
  2012. netdev->tx_queue_len = adapter->tx_queue_len;
  2013. adapter->tx_timeout_factor = 1;
  2014. switch (adapter->link_speed) {
  2015. case SPEED_10:
  2016. txb2b = 0;
  2017. netdev->tx_queue_len = 10;
  2018. adapter->tx_timeout_factor = 8;
  2019. break;
  2020. case SPEED_100:
  2021. txb2b = 0;
  2022. netdev->tx_queue_len = 100;
  2023. /* maybe add some timeout factor ? */
  2024. break;
  2025. }
  2026. if ((adapter->hw.mac_type == e1000_82571 ||
  2027. adapter->hw.mac_type == e1000_82572) &&
  2028. txb2b == 0) {
  2029. #define SPEED_MODE_BIT (1 << 21)
  2030. uint32_t tarc0;
  2031. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2032. tarc0 &= ~SPEED_MODE_BIT;
  2033. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2034. }
  2035. #ifdef NETIF_F_TSO
  2036. /* disable TSO for pcie and 10/100 speeds, to avoid
  2037. * some hardware issues */
  2038. if (!adapter->tso_force &&
  2039. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2040. switch (adapter->link_speed) {
  2041. case SPEED_10:
  2042. case SPEED_100:
  2043. DPRINTK(PROBE,INFO,
  2044. "10/100 speed: disabling TSO\n");
  2045. netdev->features &= ~NETIF_F_TSO;
  2046. break;
  2047. case SPEED_1000:
  2048. netdev->features |= NETIF_F_TSO;
  2049. break;
  2050. default:
  2051. /* oops */
  2052. break;
  2053. }
  2054. }
  2055. #endif
  2056. /* enable transmits in the hardware, need to do this
  2057. * after setting TARC0 */
  2058. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2059. tctl |= E1000_TCTL_EN;
  2060. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2061. netif_carrier_on(netdev);
  2062. netif_wake_queue(netdev);
  2063. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2064. adapter->smartspeed = 0;
  2065. }
  2066. } else {
  2067. if (netif_carrier_ok(netdev)) {
  2068. adapter->link_speed = 0;
  2069. adapter->link_duplex = 0;
  2070. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2071. netif_carrier_off(netdev);
  2072. netif_stop_queue(netdev);
  2073. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2074. /* 80003ES2LAN workaround--
  2075. * For packet buffer work-around on link down event;
  2076. * disable receives in the ISR and
  2077. * reset device here in the watchdog
  2078. */
  2079. if (adapter->hw.mac_type == e1000_80003es2lan) {
  2080. /* reset device */
  2081. schedule_work(&adapter->reset_task);
  2082. }
  2083. }
  2084. e1000_smartspeed(adapter);
  2085. }
  2086. e1000_update_stats(adapter);
  2087. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2088. adapter->tpt_old = adapter->stats.tpt;
  2089. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2090. adapter->colc_old = adapter->stats.colc;
  2091. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2092. adapter->gorcl_old = adapter->stats.gorcl;
  2093. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2094. adapter->gotcl_old = adapter->stats.gotcl;
  2095. e1000_update_adaptive(&adapter->hw);
  2096. if (!netif_carrier_ok(netdev)) {
  2097. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2098. /* We've lost link, so the controller stops DMA,
  2099. * but we've got queued Tx work that's never going
  2100. * to get done, so reset controller to flush Tx.
  2101. * (Do the reset outside of interrupt context). */
  2102. adapter->tx_timeout_count++;
  2103. schedule_work(&adapter->reset_task);
  2104. }
  2105. }
  2106. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2107. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2108. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2109. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2110. * else is between 2000-8000. */
  2111. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2112. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2113. adapter->gotcl - adapter->gorcl :
  2114. adapter->gorcl - adapter->gotcl) / 10000;
  2115. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2116. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2117. }
  2118. /* Cause software interrupt to ensure rx ring is cleaned */
  2119. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2120. /* Force detection of hung controller every watchdog period */
  2121. adapter->detect_tx_hung = TRUE;
  2122. /* With 82571 controllers, LAA may be overwritten due to controller
  2123. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2124. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2125. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2126. /* Reset the timer */
  2127. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2128. }
  2129. #define E1000_TX_FLAGS_CSUM 0x00000001
  2130. #define E1000_TX_FLAGS_VLAN 0x00000002
  2131. #define E1000_TX_FLAGS_TSO 0x00000004
  2132. #define E1000_TX_FLAGS_IPV4 0x00000008
  2133. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2134. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2135. static int
  2136. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2137. struct sk_buff *skb)
  2138. {
  2139. #ifdef NETIF_F_TSO
  2140. struct e1000_context_desc *context_desc;
  2141. struct e1000_buffer *buffer_info;
  2142. unsigned int i;
  2143. uint32_t cmd_length = 0;
  2144. uint16_t ipcse = 0, tucse, mss;
  2145. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2146. int err;
  2147. if (skb_is_gso(skb)) {
  2148. if (skb_header_cloned(skb)) {
  2149. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2150. if (err)
  2151. return err;
  2152. }
  2153. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2154. mss = skb_shinfo(skb)->gso_size;
  2155. if (skb->protocol == htons(ETH_P_IP)) {
  2156. skb->nh.iph->tot_len = 0;
  2157. skb->nh.iph->check = 0;
  2158. skb->h.th->check =
  2159. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2160. skb->nh.iph->daddr,
  2161. 0,
  2162. IPPROTO_TCP,
  2163. 0);
  2164. cmd_length = E1000_TXD_CMD_IP;
  2165. ipcse = skb->h.raw - skb->data - 1;
  2166. #ifdef NETIF_F_TSO_IPV6
  2167. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2168. skb->nh.ipv6h->payload_len = 0;
  2169. skb->h.th->check =
  2170. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2171. &skb->nh.ipv6h->daddr,
  2172. 0,
  2173. IPPROTO_TCP,
  2174. 0);
  2175. ipcse = 0;
  2176. #endif
  2177. }
  2178. ipcss = skb->nh.raw - skb->data;
  2179. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2180. tucss = skb->h.raw - skb->data;
  2181. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2182. tucse = 0;
  2183. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2184. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2185. i = tx_ring->next_to_use;
  2186. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2187. buffer_info = &tx_ring->buffer_info[i];
  2188. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2189. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2190. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2191. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2192. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2193. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2194. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2195. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2196. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2197. buffer_info->time_stamp = jiffies;
  2198. if (++i == tx_ring->count) i = 0;
  2199. tx_ring->next_to_use = i;
  2200. return TRUE;
  2201. }
  2202. #endif
  2203. return FALSE;
  2204. }
  2205. static boolean_t
  2206. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2207. struct sk_buff *skb)
  2208. {
  2209. struct e1000_context_desc *context_desc;
  2210. struct e1000_buffer *buffer_info;
  2211. unsigned int i;
  2212. uint8_t css;
  2213. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  2214. css = skb->h.raw - skb->data;
  2215. i = tx_ring->next_to_use;
  2216. buffer_info = &tx_ring->buffer_info[i];
  2217. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2218. context_desc->upper_setup.tcp_fields.tucss = css;
  2219. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2220. context_desc->upper_setup.tcp_fields.tucse = 0;
  2221. context_desc->tcp_seg_setup.data = 0;
  2222. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2223. buffer_info->time_stamp = jiffies;
  2224. if (unlikely(++i == tx_ring->count)) i = 0;
  2225. tx_ring->next_to_use = i;
  2226. return TRUE;
  2227. }
  2228. return FALSE;
  2229. }
  2230. #define E1000_MAX_TXD_PWR 12
  2231. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2232. static int
  2233. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2234. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2235. unsigned int nr_frags, unsigned int mss)
  2236. {
  2237. struct e1000_buffer *buffer_info;
  2238. unsigned int len = skb->len;
  2239. unsigned int offset = 0, size, count = 0, i;
  2240. unsigned int f;
  2241. len -= skb->data_len;
  2242. i = tx_ring->next_to_use;
  2243. while (len) {
  2244. buffer_info = &tx_ring->buffer_info[i];
  2245. size = min(len, max_per_txd);
  2246. #ifdef NETIF_F_TSO
  2247. /* Workaround for Controller erratum --
  2248. * descriptor for non-tso packet in a linear SKB that follows a
  2249. * tso gets written back prematurely before the data is fully
  2250. * DMA'd to the controller */
  2251. if (!skb->data_len && tx_ring->last_tx_tso &&
  2252. !skb_is_gso(skb)) {
  2253. tx_ring->last_tx_tso = 0;
  2254. size -= 4;
  2255. }
  2256. /* Workaround for premature desc write-backs
  2257. * in TSO mode. Append 4-byte sentinel desc */
  2258. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2259. size -= 4;
  2260. #endif
  2261. /* work-around for errata 10 and it applies
  2262. * to all controllers in PCI-X mode
  2263. * The fix is to make sure that the first descriptor of a
  2264. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2265. */
  2266. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2267. (size > 2015) && count == 0))
  2268. size = 2015;
  2269. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2270. * terminating buffers within evenly-aligned dwords. */
  2271. if (unlikely(adapter->pcix_82544 &&
  2272. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2273. size > 4))
  2274. size -= 4;
  2275. buffer_info->length = size;
  2276. buffer_info->dma =
  2277. pci_map_single(adapter->pdev,
  2278. skb->data + offset,
  2279. size,
  2280. PCI_DMA_TODEVICE);
  2281. buffer_info->time_stamp = jiffies;
  2282. len -= size;
  2283. offset += size;
  2284. count++;
  2285. if (unlikely(++i == tx_ring->count)) i = 0;
  2286. }
  2287. for (f = 0; f < nr_frags; f++) {
  2288. struct skb_frag_struct *frag;
  2289. frag = &skb_shinfo(skb)->frags[f];
  2290. len = frag->size;
  2291. offset = frag->page_offset;
  2292. while (len) {
  2293. buffer_info = &tx_ring->buffer_info[i];
  2294. size = min(len, max_per_txd);
  2295. #ifdef NETIF_F_TSO
  2296. /* Workaround for premature desc write-backs
  2297. * in TSO mode. Append 4-byte sentinel desc */
  2298. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2299. size -= 4;
  2300. #endif
  2301. /* Workaround for potential 82544 hang in PCI-X.
  2302. * Avoid terminating buffers within evenly-aligned
  2303. * dwords. */
  2304. if (unlikely(adapter->pcix_82544 &&
  2305. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2306. size > 4))
  2307. size -= 4;
  2308. buffer_info->length = size;
  2309. buffer_info->dma =
  2310. pci_map_page(adapter->pdev,
  2311. frag->page,
  2312. offset,
  2313. size,
  2314. PCI_DMA_TODEVICE);
  2315. buffer_info->time_stamp = jiffies;
  2316. len -= size;
  2317. offset += size;
  2318. count++;
  2319. if (unlikely(++i == tx_ring->count)) i = 0;
  2320. }
  2321. }
  2322. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2323. tx_ring->buffer_info[i].skb = skb;
  2324. tx_ring->buffer_info[first].next_to_watch = i;
  2325. return count;
  2326. }
  2327. static void
  2328. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2329. int tx_flags, int count)
  2330. {
  2331. struct e1000_tx_desc *tx_desc = NULL;
  2332. struct e1000_buffer *buffer_info;
  2333. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2334. unsigned int i;
  2335. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2336. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2337. E1000_TXD_CMD_TSE;
  2338. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2339. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2340. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2341. }
  2342. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2343. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2344. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2345. }
  2346. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2347. txd_lower |= E1000_TXD_CMD_VLE;
  2348. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2349. }
  2350. i = tx_ring->next_to_use;
  2351. while (count--) {
  2352. buffer_info = &tx_ring->buffer_info[i];
  2353. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2354. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2355. tx_desc->lower.data =
  2356. cpu_to_le32(txd_lower | buffer_info->length);
  2357. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2358. if (unlikely(++i == tx_ring->count)) i = 0;
  2359. }
  2360. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2361. /* Force memory writes to complete before letting h/w
  2362. * know there are new descriptors to fetch. (Only
  2363. * applicable for weak-ordered memory model archs,
  2364. * such as IA-64). */
  2365. wmb();
  2366. tx_ring->next_to_use = i;
  2367. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2368. }
  2369. /**
  2370. * 82547 workaround to avoid controller hang in half-duplex environment.
  2371. * The workaround is to avoid queuing a large packet that would span
  2372. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2373. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2374. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2375. * to the beginning of the Tx FIFO.
  2376. **/
  2377. #define E1000_FIFO_HDR 0x10
  2378. #define E1000_82547_PAD_LEN 0x3E0
  2379. static int
  2380. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2381. {
  2382. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2383. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2384. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2385. if (adapter->link_duplex != HALF_DUPLEX)
  2386. goto no_fifo_stall_required;
  2387. if (atomic_read(&adapter->tx_fifo_stall))
  2388. return 1;
  2389. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2390. atomic_set(&adapter->tx_fifo_stall, 1);
  2391. return 1;
  2392. }
  2393. no_fifo_stall_required:
  2394. adapter->tx_fifo_head += skb_fifo_len;
  2395. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2396. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2397. return 0;
  2398. }
  2399. #define MINIMUM_DHCP_PACKET_SIZE 282
  2400. static int
  2401. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2402. {
  2403. struct e1000_hw *hw = &adapter->hw;
  2404. uint16_t length, offset;
  2405. if (vlan_tx_tag_present(skb)) {
  2406. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2407. ( adapter->hw.mng_cookie.status &
  2408. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2409. return 0;
  2410. }
  2411. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2412. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2413. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2414. const struct iphdr *ip =
  2415. (struct iphdr *)((uint8_t *)skb->data+14);
  2416. if (IPPROTO_UDP == ip->protocol) {
  2417. struct udphdr *udp =
  2418. (struct udphdr *)((uint8_t *)ip +
  2419. (ip->ihl << 2));
  2420. if (ntohs(udp->dest) == 67) {
  2421. offset = (uint8_t *)udp + 8 - skb->data;
  2422. length = skb->len - offset;
  2423. return e1000_mng_write_dhcp_info(hw,
  2424. (uint8_t *)udp + 8,
  2425. length);
  2426. }
  2427. }
  2428. }
  2429. }
  2430. return 0;
  2431. }
  2432. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2433. static int
  2434. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2435. {
  2436. struct e1000_adapter *adapter = netdev_priv(netdev);
  2437. struct e1000_tx_ring *tx_ring;
  2438. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2439. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2440. unsigned int tx_flags = 0;
  2441. unsigned int len = skb->len;
  2442. unsigned long flags;
  2443. unsigned int nr_frags = 0;
  2444. unsigned int mss = 0;
  2445. int count = 0;
  2446. int tso;
  2447. unsigned int f;
  2448. len -= skb->data_len;
  2449. tx_ring = adapter->tx_ring;
  2450. if (unlikely(skb->len <= 0)) {
  2451. dev_kfree_skb_any(skb);
  2452. return NETDEV_TX_OK;
  2453. }
  2454. #ifdef NETIF_F_TSO
  2455. mss = skb_shinfo(skb)->gso_size;
  2456. /* The controller does a simple calculation to
  2457. * make sure there is enough room in the FIFO before
  2458. * initiating the DMA for each buffer. The calc is:
  2459. * 4 = ceil(buffer len/mss). To make sure we don't
  2460. * overrun the FIFO, adjust the max buffer len if mss
  2461. * drops. */
  2462. if (mss) {
  2463. uint8_t hdr_len;
  2464. max_per_txd = min(mss << 2, max_per_txd);
  2465. max_txd_pwr = fls(max_per_txd) - 1;
  2466. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2467. * points to just header, pull a few bytes of payload from
  2468. * frags into skb->data */
  2469. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2470. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2471. switch (adapter->hw.mac_type) {
  2472. unsigned int pull_size;
  2473. case e1000_82571:
  2474. case e1000_82572:
  2475. case e1000_82573:
  2476. case e1000_ich8lan:
  2477. pull_size = min((unsigned int)4, skb->data_len);
  2478. if (!__pskb_pull_tail(skb, pull_size)) {
  2479. DPRINTK(DRV, ERR,
  2480. "__pskb_pull_tail failed.\n");
  2481. dev_kfree_skb_any(skb);
  2482. return NETDEV_TX_OK;
  2483. }
  2484. len = skb->len - skb->data_len;
  2485. break;
  2486. default:
  2487. /* do nothing */
  2488. break;
  2489. }
  2490. }
  2491. }
  2492. /* reserve a descriptor for the offload context */
  2493. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2494. count++;
  2495. count++;
  2496. #else
  2497. if (skb->ip_summed == CHECKSUM_PARTIAL)
  2498. count++;
  2499. #endif
  2500. #ifdef NETIF_F_TSO
  2501. /* Controller Erratum workaround */
  2502. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2503. count++;
  2504. #endif
  2505. count += TXD_USE_COUNT(len, max_txd_pwr);
  2506. if (adapter->pcix_82544)
  2507. count++;
  2508. /* work-around for errata 10 and it applies to all controllers
  2509. * in PCI-X mode, so add one more descriptor to the count
  2510. */
  2511. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2512. (len > 2015)))
  2513. count++;
  2514. nr_frags = skb_shinfo(skb)->nr_frags;
  2515. for (f = 0; f < nr_frags; f++)
  2516. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2517. max_txd_pwr);
  2518. if (adapter->pcix_82544)
  2519. count += nr_frags;
  2520. if (adapter->hw.tx_pkt_filtering &&
  2521. (adapter->hw.mac_type == e1000_82573))
  2522. e1000_transfer_dhcp_info(adapter, skb);
  2523. local_irq_save(flags);
  2524. if (!spin_trylock(&tx_ring->tx_lock)) {
  2525. /* Collision - tell upper layer to requeue */
  2526. local_irq_restore(flags);
  2527. return NETDEV_TX_LOCKED;
  2528. }
  2529. /* need: count + 2 desc gap to keep tail from touching
  2530. * head, otherwise try next time */
  2531. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2532. netif_stop_queue(netdev);
  2533. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2534. return NETDEV_TX_BUSY;
  2535. }
  2536. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2537. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2538. netif_stop_queue(netdev);
  2539. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2540. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2541. return NETDEV_TX_BUSY;
  2542. }
  2543. }
  2544. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2545. tx_flags |= E1000_TX_FLAGS_VLAN;
  2546. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2547. }
  2548. first = tx_ring->next_to_use;
  2549. tso = e1000_tso(adapter, tx_ring, skb);
  2550. if (tso < 0) {
  2551. dev_kfree_skb_any(skb);
  2552. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2553. return NETDEV_TX_OK;
  2554. }
  2555. if (likely(tso)) {
  2556. tx_ring->last_tx_tso = 1;
  2557. tx_flags |= E1000_TX_FLAGS_TSO;
  2558. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2559. tx_flags |= E1000_TX_FLAGS_CSUM;
  2560. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2561. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2562. * no longer assume, we must. */
  2563. if (likely(skb->protocol == htons(ETH_P_IP)))
  2564. tx_flags |= E1000_TX_FLAGS_IPV4;
  2565. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2566. e1000_tx_map(adapter, tx_ring, skb, first,
  2567. max_per_txd, nr_frags, mss));
  2568. netdev->trans_start = jiffies;
  2569. /* Make sure there is space in the ring for the next send. */
  2570. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2571. netif_stop_queue(netdev);
  2572. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2573. return NETDEV_TX_OK;
  2574. }
  2575. /**
  2576. * e1000_tx_timeout - Respond to a Tx Hang
  2577. * @netdev: network interface device structure
  2578. **/
  2579. static void
  2580. e1000_tx_timeout(struct net_device *netdev)
  2581. {
  2582. struct e1000_adapter *adapter = netdev_priv(netdev);
  2583. /* Do the reset outside of interrupt context */
  2584. adapter->tx_timeout_count++;
  2585. schedule_work(&adapter->reset_task);
  2586. }
  2587. static void
  2588. e1000_reset_task(struct net_device *netdev)
  2589. {
  2590. struct e1000_adapter *adapter = netdev_priv(netdev);
  2591. e1000_reinit_locked(adapter);
  2592. }
  2593. /**
  2594. * e1000_get_stats - Get System Network Statistics
  2595. * @netdev: network interface device structure
  2596. *
  2597. * Returns the address of the device statistics structure.
  2598. * The statistics are actually updated from the timer callback.
  2599. **/
  2600. static struct net_device_stats *
  2601. e1000_get_stats(struct net_device *netdev)
  2602. {
  2603. struct e1000_adapter *adapter = netdev_priv(netdev);
  2604. /* only return the current stats */
  2605. return &adapter->net_stats;
  2606. }
  2607. /**
  2608. * e1000_change_mtu - Change the Maximum Transfer Unit
  2609. * @netdev: network interface device structure
  2610. * @new_mtu: new value for maximum frame size
  2611. *
  2612. * Returns 0 on success, negative on failure
  2613. **/
  2614. static int
  2615. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2616. {
  2617. struct e1000_adapter *adapter = netdev_priv(netdev);
  2618. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2619. uint16_t eeprom_data = 0;
  2620. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2621. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2622. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2623. return -EINVAL;
  2624. }
  2625. /* Adapter-specific max frame size limits. */
  2626. switch (adapter->hw.mac_type) {
  2627. case e1000_undefined ... e1000_82542_rev2_1:
  2628. case e1000_ich8lan:
  2629. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2630. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2631. return -EINVAL;
  2632. }
  2633. break;
  2634. case e1000_82573:
  2635. /* only enable jumbo frames if ASPM is disabled completely
  2636. * this means both bits must be zero in 0x1A bits 3:2 */
  2637. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2638. &eeprom_data);
  2639. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2640. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2641. DPRINTK(PROBE, ERR,
  2642. "Jumbo Frames not supported.\n");
  2643. return -EINVAL;
  2644. }
  2645. break;
  2646. }
  2647. /* fall through to get support */
  2648. case e1000_82571:
  2649. case e1000_82572:
  2650. case e1000_80003es2lan:
  2651. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2652. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2653. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2654. return -EINVAL;
  2655. }
  2656. break;
  2657. default:
  2658. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2659. break;
  2660. }
  2661. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2662. * means we reserve 2 more, this pushes us to allocate from the next
  2663. * larger slab size
  2664. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2665. if (max_frame <= E1000_RXBUFFER_256)
  2666. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2667. else if (max_frame <= E1000_RXBUFFER_512)
  2668. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2669. else if (max_frame <= E1000_RXBUFFER_1024)
  2670. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2671. else if (max_frame <= E1000_RXBUFFER_2048)
  2672. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2673. else if (max_frame <= E1000_RXBUFFER_4096)
  2674. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2675. else if (max_frame <= E1000_RXBUFFER_8192)
  2676. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2677. else if (max_frame <= E1000_RXBUFFER_16384)
  2678. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2679. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2680. if (!adapter->hw.tbi_compatibility_on &&
  2681. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2682. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2683. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2684. netdev->mtu = new_mtu;
  2685. if (netif_running(netdev))
  2686. e1000_reinit_locked(adapter);
  2687. adapter->hw.max_frame_size = max_frame;
  2688. return 0;
  2689. }
  2690. /**
  2691. * e1000_update_stats - Update the board statistics counters
  2692. * @adapter: board private structure
  2693. **/
  2694. void
  2695. e1000_update_stats(struct e1000_adapter *adapter)
  2696. {
  2697. struct e1000_hw *hw = &adapter->hw;
  2698. struct pci_dev *pdev = adapter->pdev;
  2699. unsigned long flags;
  2700. uint16_t phy_tmp;
  2701. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2702. /*
  2703. * Prevent stats update while adapter is being reset, or if the pci
  2704. * connection is down.
  2705. */
  2706. if (adapter->link_speed == 0)
  2707. return;
  2708. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2709. return;
  2710. spin_lock_irqsave(&adapter->stats_lock, flags);
  2711. /* these counters are modified from e1000_adjust_tbi_stats,
  2712. * called from the interrupt context, so they must only
  2713. * be written while holding adapter->stats_lock
  2714. */
  2715. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2716. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2717. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2718. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2719. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2720. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2721. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2722. if (adapter->hw.mac_type != e1000_ich8lan) {
  2723. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2724. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2725. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2726. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2727. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2728. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2729. }
  2730. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2731. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2732. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2733. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2734. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2735. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2736. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2737. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2738. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2739. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2740. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2741. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2742. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2743. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2744. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2745. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2746. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2747. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2748. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2749. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2750. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2751. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2752. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2753. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2754. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2755. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2756. if (adapter->hw.mac_type != e1000_ich8lan) {
  2757. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2758. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2759. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2760. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2761. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2762. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2763. }
  2764. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2765. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2766. /* used for adaptive IFS */
  2767. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2768. adapter->stats.tpt += hw->tx_packet_delta;
  2769. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2770. adapter->stats.colc += hw->collision_delta;
  2771. if (hw->mac_type >= e1000_82543) {
  2772. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2773. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2774. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2775. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2776. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2777. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2778. }
  2779. if (hw->mac_type > e1000_82547_rev_2) {
  2780. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2781. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2782. if (adapter->hw.mac_type != e1000_ich8lan) {
  2783. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2784. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2785. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2786. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2787. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2788. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2789. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2790. }
  2791. }
  2792. /* Fill out the OS statistics structure */
  2793. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2794. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2795. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2796. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2797. adapter->net_stats.multicast = adapter->stats.mprc;
  2798. adapter->net_stats.collisions = adapter->stats.colc;
  2799. /* Rx Errors */
  2800. /* RLEC on some newer hardware can be incorrect so build
  2801. * our own version based on RUC and ROC */
  2802. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2803. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2804. adapter->stats.ruc + adapter->stats.roc +
  2805. adapter->stats.cexterr;
  2806. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2807. adapter->stats.roc;
  2808. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2809. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2810. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2811. /* Tx Errors */
  2812. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2813. adapter->stats.latecol;
  2814. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2815. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2816. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2817. /* Tx Dropped needs to be maintained elsewhere */
  2818. /* Phy Stats */
  2819. if (hw->media_type == e1000_media_type_copper) {
  2820. if ((adapter->link_speed == SPEED_1000) &&
  2821. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2822. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2823. adapter->phy_stats.idle_errors += phy_tmp;
  2824. }
  2825. if ((hw->mac_type <= e1000_82546) &&
  2826. (hw->phy_type == e1000_phy_m88) &&
  2827. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2828. adapter->phy_stats.receive_errors += phy_tmp;
  2829. }
  2830. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2831. }
  2832. /**
  2833. * e1000_intr - Interrupt Handler
  2834. * @irq: interrupt number
  2835. * @data: pointer to a network interface device structure
  2836. * @pt_regs: CPU registers structure
  2837. **/
  2838. static irqreturn_t
  2839. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2840. {
  2841. struct net_device *netdev = data;
  2842. struct e1000_adapter *adapter = netdev_priv(netdev);
  2843. struct e1000_hw *hw = &adapter->hw;
  2844. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2845. #ifndef CONFIG_E1000_NAPI
  2846. int i;
  2847. #else
  2848. /* Interrupt Auto-Mask...upon reading ICR,
  2849. * interrupts are masked. No need for the
  2850. * IMC write, but it does mean we should
  2851. * account for it ASAP. */
  2852. if (likely(hw->mac_type >= e1000_82571))
  2853. atomic_inc(&adapter->irq_sem);
  2854. #endif
  2855. if (unlikely(!icr)) {
  2856. #ifdef CONFIG_E1000_NAPI
  2857. if (hw->mac_type >= e1000_82571)
  2858. e1000_irq_enable(adapter);
  2859. #endif
  2860. return IRQ_NONE; /* Not our interrupt */
  2861. }
  2862. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2863. hw->get_link_status = 1;
  2864. /* 80003ES2LAN workaround--
  2865. * For packet buffer work-around on link down event;
  2866. * disable receives here in the ISR and
  2867. * reset adapter in watchdog
  2868. */
  2869. if (netif_carrier_ok(netdev) &&
  2870. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2871. /* disable receives */
  2872. rctl = E1000_READ_REG(hw, RCTL);
  2873. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2874. }
  2875. mod_timer(&adapter->watchdog_timer, jiffies);
  2876. }
  2877. #ifdef CONFIG_E1000_NAPI
  2878. if (unlikely(hw->mac_type < e1000_82571)) {
  2879. atomic_inc(&adapter->irq_sem);
  2880. E1000_WRITE_REG(hw, IMC, ~0);
  2881. E1000_WRITE_FLUSH(hw);
  2882. }
  2883. if (likely(netif_rx_schedule_prep(netdev)))
  2884. __netif_rx_schedule(netdev);
  2885. else
  2886. e1000_irq_enable(adapter);
  2887. #else
  2888. /* Writing IMC and IMS is needed for 82547.
  2889. * Due to Hub Link bus being occupied, an interrupt
  2890. * de-assertion message is not able to be sent.
  2891. * When an interrupt assertion message is generated later,
  2892. * two messages are re-ordered and sent out.
  2893. * That causes APIC to think 82547 is in de-assertion
  2894. * state, while 82547 is in assertion state, resulting
  2895. * in dead lock. Writing IMC forces 82547 into
  2896. * de-assertion state.
  2897. */
  2898. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2899. atomic_inc(&adapter->irq_sem);
  2900. E1000_WRITE_REG(hw, IMC, ~0);
  2901. }
  2902. for (i = 0; i < E1000_MAX_INTR; i++)
  2903. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2904. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2905. break;
  2906. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2907. e1000_irq_enable(adapter);
  2908. #endif
  2909. return IRQ_HANDLED;
  2910. }
  2911. #ifdef CONFIG_E1000_NAPI
  2912. /**
  2913. * e1000_clean - NAPI Rx polling callback
  2914. * @adapter: board private structure
  2915. **/
  2916. static int
  2917. e1000_clean(struct net_device *poll_dev, int *budget)
  2918. {
  2919. struct e1000_adapter *adapter;
  2920. int work_to_do = min(*budget, poll_dev->quota);
  2921. int tx_cleaned = 0, work_done = 0;
  2922. /* Must NOT use netdev_priv macro here. */
  2923. adapter = poll_dev->priv;
  2924. /* Keep link state information with original netdev */
  2925. if (!netif_carrier_ok(poll_dev))
  2926. goto quit_polling;
  2927. /* e1000_clean is called per-cpu. This lock protects
  2928. * tx_ring[0] from being cleaned by multiple cpus
  2929. * simultaneously. A failure obtaining the lock means
  2930. * tx_ring[0] is currently being cleaned anyway. */
  2931. if (spin_trylock(&adapter->tx_queue_lock)) {
  2932. tx_cleaned = e1000_clean_tx_irq(adapter,
  2933. &adapter->tx_ring[0]);
  2934. spin_unlock(&adapter->tx_queue_lock);
  2935. }
  2936. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  2937. &work_done, work_to_do);
  2938. *budget -= work_done;
  2939. poll_dev->quota -= work_done;
  2940. /* If no Tx and not enough Rx work done, exit the polling mode */
  2941. if ((!tx_cleaned && (work_done == 0)) ||
  2942. !netif_running(poll_dev)) {
  2943. quit_polling:
  2944. netif_rx_complete(poll_dev);
  2945. e1000_irq_enable(adapter);
  2946. return 0;
  2947. }
  2948. return 1;
  2949. }
  2950. #endif
  2951. /**
  2952. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2953. * @adapter: board private structure
  2954. **/
  2955. static boolean_t
  2956. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2957. struct e1000_tx_ring *tx_ring)
  2958. {
  2959. struct net_device *netdev = adapter->netdev;
  2960. struct e1000_tx_desc *tx_desc, *eop_desc;
  2961. struct e1000_buffer *buffer_info;
  2962. unsigned int i, eop;
  2963. #ifdef CONFIG_E1000_NAPI
  2964. unsigned int count = 0;
  2965. #endif
  2966. boolean_t cleaned = FALSE;
  2967. i = tx_ring->next_to_clean;
  2968. eop = tx_ring->buffer_info[i].next_to_watch;
  2969. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2970. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2971. for (cleaned = FALSE; !cleaned; ) {
  2972. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2973. buffer_info = &tx_ring->buffer_info[i];
  2974. cleaned = (i == eop);
  2975. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2976. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2977. if (unlikely(++i == tx_ring->count)) i = 0;
  2978. }
  2979. eop = tx_ring->buffer_info[i].next_to_watch;
  2980. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2981. #ifdef CONFIG_E1000_NAPI
  2982. #define E1000_TX_WEIGHT 64
  2983. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2984. if (count++ == E1000_TX_WEIGHT) break;
  2985. #endif
  2986. }
  2987. tx_ring->next_to_clean = i;
  2988. #define TX_WAKE_THRESHOLD 32
  2989. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2990. netif_carrier_ok(netdev))) {
  2991. spin_lock(&tx_ring->tx_lock);
  2992. if (netif_queue_stopped(netdev) &&
  2993. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2994. netif_wake_queue(netdev);
  2995. spin_unlock(&tx_ring->tx_lock);
  2996. }
  2997. if (adapter->detect_tx_hung) {
  2998. /* Detect a transmit hang in hardware, this serializes the
  2999. * check with the clearing of time_stamp and movement of i */
  3000. adapter->detect_tx_hung = FALSE;
  3001. if (tx_ring->buffer_info[eop].dma &&
  3002. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3003. (adapter->tx_timeout_factor * HZ))
  3004. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3005. E1000_STATUS_TXOFF)) {
  3006. /* detected Tx unit hang */
  3007. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3008. " Tx Queue <%lu>\n"
  3009. " TDH <%x>\n"
  3010. " TDT <%x>\n"
  3011. " next_to_use <%x>\n"
  3012. " next_to_clean <%x>\n"
  3013. "buffer_info[next_to_clean]\n"
  3014. " time_stamp <%lx>\n"
  3015. " next_to_watch <%x>\n"
  3016. " jiffies <%lx>\n"
  3017. " next_to_watch.status <%x>\n",
  3018. (unsigned long)((tx_ring - adapter->tx_ring) /
  3019. sizeof(struct e1000_tx_ring)),
  3020. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3021. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3022. tx_ring->next_to_use,
  3023. tx_ring->next_to_clean,
  3024. tx_ring->buffer_info[eop].time_stamp,
  3025. eop,
  3026. jiffies,
  3027. eop_desc->upper.fields.status);
  3028. netif_stop_queue(netdev);
  3029. }
  3030. }
  3031. return cleaned;
  3032. }
  3033. /**
  3034. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3035. * @adapter: board private structure
  3036. * @status_err: receive descriptor status and error fields
  3037. * @csum: receive descriptor csum field
  3038. * @sk_buff: socket buffer with received data
  3039. **/
  3040. static void
  3041. e1000_rx_checksum(struct e1000_adapter *adapter,
  3042. uint32_t status_err, uint32_t csum,
  3043. struct sk_buff *skb)
  3044. {
  3045. uint16_t status = (uint16_t)status_err;
  3046. uint8_t errors = (uint8_t)(status_err >> 24);
  3047. skb->ip_summed = CHECKSUM_NONE;
  3048. /* 82543 or newer only */
  3049. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3050. /* Ignore Checksum bit is set */
  3051. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3052. /* TCP/UDP checksum error bit is set */
  3053. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3054. /* let the stack verify checksum errors */
  3055. adapter->hw_csum_err++;
  3056. return;
  3057. }
  3058. /* TCP/UDP Checksum has not been calculated */
  3059. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3060. if (!(status & E1000_RXD_STAT_TCPCS))
  3061. return;
  3062. } else {
  3063. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3064. return;
  3065. }
  3066. /* It must be a TCP or UDP packet with a valid checksum */
  3067. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3068. /* TCP checksum is good */
  3069. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3070. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3071. /* IP fragment with UDP payload */
  3072. /* Hardware complements the payload checksum, so we undo it
  3073. * and then put the value in host order for further stack use.
  3074. */
  3075. csum = ntohl(csum ^ 0xFFFF);
  3076. skb->csum = csum;
  3077. skb->ip_summed = CHECKSUM_COMPLETE;
  3078. }
  3079. adapter->hw_csum_good++;
  3080. }
  3081. /**
  3082. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3083. * @adapter: board private structure
  3084. **/
  3085. static boolean_t
  3086. #ifdef CONFIG_E1000_NAPI
  3087. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3088. struct e1000_rx_ring *rx_ring,
  3089. int *work_done, int work_to_do)
  3090. #else
  3091. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3092. struct e1000_rx_ring *rx_ring)
  3093. #endif
  3094. {
  3095. struct net_device *netdev = adapter->netdev;
  3096. struct pci_dev *pdev = adapter->pdev;
  3097. struct e1000_rx_desc *rx_desc, *next_rxd;
  3098. struct e1000_buffer *buffer_info, *next_buffer;
  3099. unsigned long flags;
  3100. uint32_t length;
  3101. uint8_t last_byte;
  3102. unsigned int i;
  3103. int cleaned_count = 0;
  3104. boolean_t cleaned = FALSE;
  3105. i = rx_ring->next_to_clean;
  3106. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3107. buffer_info = &rx_ring->buffer_info[i];
  3108. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3109. struct sk_buff *skb;
  3110. u8 status;
  3111. #ifdef CONFIG_E1000_NAPI
  3112. if (*work_done >= work_to_do)
  3113. break;
  3114. (*work_done)++;
  3115. #endif
  3116. status = rx_desc->status;
  3117. skb = buffer_info->skb;
  3118. buffer_info->skb = NULL;
  3119. prefetch(skb->data - NET_IP_ALIGN);
  3120. if (++i == rx_ring->count) i = 0;
  3121. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3122. prefetch(next_rxd);
  3123. next_buffer = &rx_ring->buffer_info[i];
  3124. cleaned = TRUE;
  3125. cleaned_count++;
  3126. pci_unmap_single(pdev,
  3127. buffer_info->dma,
  3128. buffer_info->length,
  3129. PCI_DMA_FROMDEVICE);
  3130. length = le16_to_cpu(rx_desc->length);
  3131. /* adjust length to remove Ethernet CRC */
  3132. length -= 4;
  3133. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3134. /* All receives must fit into a single buffer */
  3135. E1000_DBG("%s: Receive packet consumed multiple"
  3136. " buffers\n", netdev->name);
  3137. /* recycle */
  3138. buffer_info-> skb = skb;
  3139. goto next_desc;
  3140. }
  3141. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3142. last_byte = *(skb->data + length - 1);
  3143. if (TBI_ACCEPT(&adapter->hw, status,
  3144. rx_desc->errors, length, last_byte)) {
  3145. spin_lock_irqsave(&adapter->stats_lock, flags);
  3146. e1000_tbi_adjust_stats(&adapter->hw,
  3147. &adapter->stats,
  3148. length, skb->data);
  3149. spin_unlock_irqrestore(&adapter->stats_lock,
  3150. flags);
  3151. length--;
  3152. } else {
  3153. /* recycle */
  3154. buffer_info->skb = skb;
  3155. goto next_desc;
  3156. }
  3157. }
  3158. /* code added for copybreak, this should improve
  3159. * performance for small packets with large amounts
  3160. * of reassembly being done in the stack */
  3161. #define E1000_CB_LENGTH 256
  3162. if (length < E1000_CB_LENGTH) {
  3163. struct sk_buff *new_skb =
  3164. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3165. if (new_skb) {
  3166. skb_reserve(new_skb, NET_IP_ALIGN);
  3167. new_skb->dev = netdev;
  3168. memcpy(new_skb->data - NET_IP_ALIGN,
  3169. skb->data - NET_IP_ALIGN,
  3170. length + NET_IP_ALIGN);
  3171. /* save the skb in buffer_info as good */
  3172. buffer_info->skb = skb;
  3173. skb = new_skb;
  3174. skb_put(skb, length);
  3175. }
  3176. } else
  3177. skb_put(skb, length);
  3178. /* end copybreak code */
  3179. /* Receive Checksum Offload */
  3180. e1000_rx_checksum(adapter,
  3181. (uint32_t)(status) |
  3182. ((uint32_t)(rx_desc->errors) << 24),
  3183. le16_to_cpu(rx_desc->csum), skb);
  3184. skb->protocol = eth_type_trans(skb, netdev);
  3185. #ifdef CONFIG_E1000_NAPI
  3186. if (unlikely(adapter->vlgrp &&
  3187. (status & E1000_RXD_STAT_VP))) {
  3188. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3189. le16_to_cpu(rx_desc->special) &
  3190. E1000_RXD_SPC_VLAN_MASK);
  3191. } else {
  3192. netif_receive_skb(skb);
  3193. }
  3194. #else /* CONFIG_E1000_NAPI */
  3195. if (unlikely(adapter->vlgrp &&
  3196. (status & E1000_RXD_STAT_VP))) {
  3197. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3198. le16_to_cpu(rx_desc->special) &
  3199. E1000_RXD_SPC_VLAN_MASK);
  3200. } else {
  3201. netif_rx(skb);
  3202. }
  3203. #endif /* CONFIG_E1000_NAPI */
  3204. netdev->last_rx = jiffies;
  3205. next_desc:
  3206. rx_desc->status = 0;
  3207. /* return some buffers to hardware, one at a time is too slow */
  3208. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3209. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3210. cleaned_count = 0;
  3211. }
  3212. /* use prefetched values */
  3213. rx_desc = next_rxd;
  3214. buffer_info = next_buffer;
  3215. }
  3216. rx_ring->next_to_clean = i;
  3217. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3218. if (cleaned_count)
  3219. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3220. return cleaned;
  3221. }
  3222. /**
  3223. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3224. * @adapter: board private structure
  3225. **/
  3226. static boolean_t
  3227. #ifdef CONFIG_E1000_NAPI
  3228. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3229. struct e1000_rx_ring *rx_ring,
  3230. int *work_done, int work_to_do)
  3231. #else
  3232. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3233. struct e1000_rx_ring *rx_ring)
  3234. #endif
  3235. {
  3236. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3237. struct net_device *netdev = adapter->netdev;
  3238. struct pci_dev *pdev = adapter->pdev;
  3239. struct e1000_buffer *buffer_info, *next_buffer;
  3240. struct e1000_ps_page *ps_page;
  3241. struct e1000_ps_page_dma *ps_page_dma;
  3242. struct sk_buff *skb;
  3243. unsigned int i, j;
  3244. uint32_t length, staterr;
  3245. int cleaned_count = 0;
  3246. boolean_t cleaned = FALSE;
  3247. i = rx_ring->next_to_clean;
  3248. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3249. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3250. buffer_info = &rx_ring->buffer_info[i];
  3251. while (staterr & E1000_RXD_STAT_DD) {
  3252. ps_page = &rx_ring->ps_page[i];
  3253. ps_page_dma = &rx_ring->ps_page_dma[i];
  3254. #ifdef CONFIG_E1000_NAPI
  3255. if (unlikely(*work_done >= work_to_do))
  3256. break;
  3257. (*work_done)++;
  3258. #endif
  3259. skb = buffer_info->skb;
  3260. /* in the packet split case this is header only */
  3261. prefetch(skb->data - NET_IP_ALIGN);
  3262. if (++i == rx_ring->count) i = 0;
  3263. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3264. prefetch(next_rxd);
  3265. next_buffer = &rx_ring->buffer_info[i];
  3266. cleaned = TRUE;
  3267. cleaned_count++;
  3268. pci_unmap_single(pdev, buffer_info->dma,
  3269. buffer_info->length,
  3270. PCI_DMA_FROMDEVICE);
  3271. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3272. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3273. " the full packet\n", netdev->name);
  3274. dev_kfree_skb_irq(skb);
  3275. goto next_desc;
  3276. }
  3277. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3278. dev_kfree_skb_irq(skb);
  3279. goto next_desc;
  3280. }
  3281. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3282. if (unlikely(!length)) {
  3283. E1000_DBG("%s: Last part of the packet spanning"
  3284. " multiple descriptors\n", netdev->name);
  3285. dev_kfree_skb_irq(skb);
  3286. goto next_desc;
  3287. }
  3288. /* Good Receive */
  3289. skb_put(skb, length);
  3290. {
  3291. /* this looks ugly, but it seems compiler issues make it
  3292. more efficient than reusing j */
  3293. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3294. /* page alloc/put takes too long and effects small packet
  3295. * throughput, so unsplit small packets and save the alloc/put*/
  3296. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3297. u8 *vaddr;
  3298. /* there is no documentation about how to call
  3299. * kmap_atomic, so we can't hold the mapping
  3300. * very long */
  3301. pci_dma_sync_single_for_cpu(pdev,
  3302. ps_page_dma->ps_page_dma[0],
  3303. PAGE_SIZE,
  3304. PCI_DMA_FROMDEVICE);
  3305. vaddr = kmap_atomic(ps_page->ps_page[0],
  3306. KM_SKB_DATA_SOFTIRQ);
  3307. memcpy(skb->tail, vaddr, l1);
  3308. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3309. pci_dma_sync_single_for_device(pdev,
  3310. ps_page_dma->ps_page_dma[0],
  3311. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3312. /* remove the CRC */
  3313. l1 -= 4;
  3314. skb_put(skb, l1);
  3315. goto copydone;
  3316. } /* if */
  3317. }
  3318. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3319. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3320. break;
  3321. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3322. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3323. ps_page_dma->ps_page_dma[j] = 0;
  3324. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3325. length);
  3326. ps_page->ps_page[j] = NULL;
  3327. skb->len += length;
  3328. skb->data_len += length;
  3329. skb->truesize += length;
  3330. }
  3331. /* strip the ethernet crc, problem is we're using pages now so
  3332. * this whole operation can get a little cpu intensive */
  3333. pskb_trim(skb, skb->len - 4);
  3334. copydone:
  3335. e1000_rx_checksum(adapter, staterr,
  3336. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3337. skb->protocol = eth_type_trans(skb, netdev);
  3338. if (likely(rx_desc->wb.upper.header_status &
  3339. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3340. adapter->rx_hdr_split++;
  3341. #ifdef CONFIG_E1000_NAPI
  3342. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3343. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3344. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3345. E1000_RXD_SPC_VLAN_MASK);
  3346. } else {
  3347. netif_receive_skb(skb);
  3348. }
  3349. #else /* CONFIG_E1000_NAPI */
  3350. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3351. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3352. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3353. E1000_RXD_SPC_VLAN_MASK);
  3354. } else {
  3355. netif_rx(skb);
  3356. }
  3357. #endif /* CONFIG_E1000_NAPI */
  3358. netdev->last_rx = jiffies;
  3359. next_desc:
  3360. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3361. buffer_info->skb = NULL;
  3362. /* return some buffers to hardware, one at a time is too slow */
  3363. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3364. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3365. cleaned_count = 0;
  3366. }
  3367. /* use prefetched values */
  3368. rx_desc = next_rxd;
  3369. buffer_info = next_buffer;
  3370. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3371. }
  3372. rx_ring->next_to_clean = i;
  3373. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3374. if (cleaned_count)
  3375. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3376. return cleaned;
  3377. }
  3378. /**
  3379. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3380. * @adapter: address of board private structure
  3381. **/
  3382. static void
  3383. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3384. struct e1000_rx_ring *rx_ring,
  3385. int cleaned_count)
  3386. {
  3387. struct net_device *netdev = adapter->netdev;
  3388. struct pci_dev *pdev = adapter->pdev;
  3389. struct e1000_rx_desc *rx_desc;
  3390. struct e1000_buffer *buffer_info;
  3391. struct sk_buff *skb;
  3392. unsigned int i;
  3393. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3394. i = rx_ring->next_to_use;
  3395. buffer_info = &rx_ring->buffer_info[i];
  3396. while (cleaned_count--) {
  3397. if (!(skb = buffer_info->skb))
  3398. skb = netdev_alloc_skb(netdev, bufsz);
  3399. else {
  3400. skb_trim(skb, 0);
  3401. goto map_skb;
  3402. }
  3403. if (unlikely(!skb)) {
  3404. /* Better luck next round */
  3405. adapter->alloc_rx_buff_failed++;
  3406. break;
  3407. }
  3408. /* Fix for errata 23, can't cross 64kB boundary */
  3409. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3410. struct sk_buff *oldskb = skb;
  3411. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3412. "at %p\n", bufsz, skb->data);
  3413. /* Try again, without freeing the previous */
  3414. skb = netdev_alloc_skb(netdev, bufsz);
  3415. /* Failed allocation, critical failure */
  3416. if (!skb) {
  3417. dev_kfree_skb(oldskb);
  3418. break;
  3419. }
  3420. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3421. /* give up */
  3422. dev_kfree_skb(skb);
  3423. dev_kfree_skb(oldskb);
  3424. break; /* while !buffer_info->skb */
  3425. } else {
  3426. /* Use new allocation */
  3427. dev_kfree_skb(oldskb);
  3428. }
  3429. }
  3430. /* Make buffer alignment 2 beyond a 16 byte boundary
  3431. * this will result in a 16 byte aligned IP header after
  3432. * the 14 byte MAC header is removed
  3433. */
  3434. skb_reserve(skb, NET_IP_ALIGN);
  3435. skb->dev = netdev;
  3436. buffer_info->skb = skb;
  3437. buffer_info->length = adapter->rx_buffer_len;
  3438. map_skb:
  3439. buffer_info->dma = pci_map_single(pdev,
  3440. skb->data,
  3441. adapter->rx_buffer_len,
  3442. PCI_DMA_FROMDEVICE);
  3443. /* Fix for errata 23, can't cross 64kB boundary */
  3444. if (!e1000_check_64k_bound(adapter,
  3445. (void *)(unsigned long)buffer_info->dma,
  3446. adapter->rx_buffer_len)) {
  3447. DPRINTK(RX_ERR, ERR,
  3448. "dma align check failed: %u bytes at %p\n",
  3449. adapter->rx_buffer_len,
  3450. (void *)(unsigned long)buffer_info->dma);
  3451. dev_kfree_skb(skb);
  3452. buffer_info->skb = NULL;
  3453. pci_unmap_single(pdev, buffer_info->dma,
  3454. adapter->rx_buffer_len,
  3455. PCI_DMA_FROMDEVICE);
  3456. break; /* while !buffer_info->skb */
  3457. }
  3458. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3459. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3460. if (unlikely(++i == rx_ring->count))
  3461. i = 0;
  3462. buffer_info = &rx_ring->buffer_info[i];
  3463. }
  3464. if (likely(rx_ring->next_to_use != i)) {
  3465. rx_ring->next_to_use = i;
  3466. if (unlikely(i-- == 0))
  3467. i = (rx_ring->count - 1);
  3468. /* Force memory writes to complete before letting h/w
  3469. * know there are new descriptors to fetch. (Only
  3470. * applicable for weak-ordered memory model archs,
  3471. * such as IA-64). */
  3472. wmb();
  3473. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3474. }
  3475. }
  3476. /**
  3477. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3478. * @adapter: address of board private structure
  3479. **/
  3480. static void
  3481. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3482. struct e1000_rx_ring *rx_ring,
  3483. int cleaned_count)
  3484. {
  3485. struct net_device *netdev = adapter->netdev;
  3486. struct pci_dev *pdev = adapter->pdev;
  3487. union e1000_rx_desc_packet_split *rx_desc;
  3488. struct e1000_buffer *buffer_info;
  3489. struct e1000_ps_page *ps_page;
  3490. struct e1000_ps_page_dma *ps_page_dma;
  3491. struct sk_buff *skb;
  3492. unsigned int i, j;
  3493. i = rx_ring->next_to_use;
  3494. buffer_info = &rx_ring->buffer_info[i];
  3495. ps_page = &rx_ring->ps_page[i];
  3496. ps_page_dma = &rx_ring->ps_page_dma[i];
  3497. while (cleaned_count--) {
  3498. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3499. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3500. if (j < adapter->rx_ps_pages) {
  3501. if (likely(!ps_page->ps_page[j])) {
  3502. ps_page->ps_page[j] =
  3503. alloc_page(GFP_ATOMIC);
  3504. if (unlikely(!ps_page->ps_page[j])) {
  3505. adapter->alloc_rx_buff_failed++;
  3506. goto no_buffers;
  3507. }
  3508. ps_page_dma->ps_page_dma[j] =
  3509. pci_map_page(pdev,
  3510. ps_page->ps_page[j],
  3511. 0, PAGE_SIZE,
  3512. PCI_DMA_FROMDEVICE);
  3513. }
  3514. /* Refresh the desc even if buffer_addrs didn't
  3515. * change because each write-back erases
  3516. * this info.
  3517. */
  3518. rx_desc->read.buffer_addr[j+1] =
  3519. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3520. } else
  3521. rx_desc->read.buffer_addr[j+1] = ~0;
  3522. }
  3523. skb = netdev_alloc_skb(netdev,
  3524. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3525. if (unlikely(!skb)) {
  3526. adapter->alloc_rx_buff_failed++;
  3527. break;
  3528. }
  3529. /* Make buffer alignment 2 beyond a 16 byte boundary
  3530. * this will result in a 16 byte aligned IP header after
  3531. * the 14 byte MAC header is removed
  3532. */
  3533. skb_reserve(skb, NET_IP_ALIGN);
  3534. skb->dev = netdev;
  3535. buffer_info->skb = skb;
  3536. buffer_info->length = adapter->rx_ps_bsize0;
  3537. buffer_info->dma = pci_map_single(pdev, skb->data,
  3538. adapter->rx_ps_bsize0,
  3539. PCI_DMA_FROMDEVICE);
  3540. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3541. if (unlikely(++i == rx_ring->count)) i = 0;
  3542. buffer_info = &rx_ring->buffer_info[i];
  3543. ps_page = &rx_ring->ps_page[i];
  3544. ps_page_dma = &rx_ring->ps_page_dma[i];
  3545. }
  3546. no_buffers:
  3547. if (likely(rx_ring->next_to_use != i)) {
  3548. rx_ring->next_to_use = i;
  3549. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3550. /* Force memory writes to complete before letting h/w
  3551. * know there are new descriptors to fetch. (Only
  3552. * applicable for weak-ordered memory model archs,
  3553. * such as IA-64). */
  3554. wmb();
  3555. /* Hardware increments by 16 bytes, but packet split
  3556. * descriptors are 32 bytes...so we increment tail
  3557. * twice as much.
  3558. */
  3559. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3560. }
  3561. }
  3562. /**
  3563. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3564. * @adapter:
  3565. **/
  3566. static void
  3567. e1000_smartspeed(struct e1000_adapter *adapter)
  3568. {
  3569. uint16_t phy_status;
  3570. uint16_t phy_ctrl;
  3571. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3572. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3573. return;
  3574. if (adapter->smartspeed == 0) {
  3575. /* If Master/Slave config fault is asserted twice,
  3576. * we assume back-to-back */
  3577. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3578. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3579. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3580. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3581. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3582. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3583. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3584. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3585. phy_ctrl);
  3586. adapter->smartspeed++;
  3587. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3588. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3589. &phy_ctrl)) {
  3590. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3591. MII_CR_RESTART_AUTO_NEG);
  3592. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3593. phy_ctrl);
  3594. }
  3595. }
  3596. return;
  3597. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3598. /* If still no link, perhaps using 2/3 pair cable */
  3599. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3600. phy_ctrl |= CR_1000T_MS_ENABLE;
  3601. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3602. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3603. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3604. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3605. MII_CR_RESTART_AUTO_NEG);
  3606. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3607. }
  3608. }
  3609. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3610. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3611. adapter->smartspeed = 0;
  3612. }
  3613. /**
  3614. * e1000_ioctl -
  3615. * @netdev:
  3616. * @ifreq:
  3617. * @cmd:
  3618. **/
  3619. static int
  3620. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3621. {
  3622. switch (cmd) {
  3623. case SIOCGMIIPHY:
  3624. case SIOCGMIIREG:
  3625. case SIOCSMIIREG:
  3626. return e1000_mii_ioctl(netdev, ifr, cmd);
  3627. default:
  3628. return -EOPNOTSUPP;
  3629. }
  3630. }
  3631. /**
  3632. * e1000_mii_ioctl -
  3633. * @netdev:
  3634. * @ifreq:
  3635. * @cmd:
  3636. **/
  3637. static int
  3638. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3639. {
  3640. struct e1000_adapter *adapter = netdev_priv(netdev);
  3641. struct mii_ioctl_data *data = if_mii(ifr);
  3642. int retval;
  3643. uint16_t mii_reg;
  3644. uint16_t spddplx;
  3645. unsigned long flags;
  3646. if (adapter->hw.media_type != e1000_media_type_copper)
  3647. return -EOPNOTSUPP;
  3648. switch (cmd) {
  3649. case SIOCGMIIPHY:
  3650. data->phy_id = adapter->hw.phy_addr;
  3651. break;
  3652. case SIOCGMIIREG:
  3653. if (!capable(CAP_NET_ADMIN))
  3654. return -EPERM;
  3655. spin_lock_irqsave(&adapter->stats_lock, flags);
  3656. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3657. &data->val_out)) {
  3658. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3659. return -EIO;
  3660. }
  3661. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3662. break;
  3663. case SIOCSMIIREG:
  3664. if (!capable(CAP_NET_ADMIN))
  3665. return -EPERM;
  3666. if (data->reg_num & ~(0x1F))
  3667. return -EFAULT;
  3668. mii_reg = data->val_in;
  3669. spin_lock_irqsave(&adapter->stats_lock, flags);
  3670. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3671. mii_reg)) {
  3672. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3673. return -EIO;
  3674. }
  3675. if (adapter->hw.media_type == e1000_media_type_copper) {
  3676. switch (data->reg_num) {
  3677. case PHY_CTRL:
  3678. if (mii_reg & MII_CR_POWER_DOWN)
  3679. break;
  3680. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3681. adapter->hw.autoneg = 1;
  3682. adapter->hw.autoneg_advertised = 0x2F;
  3683. } else {
  3684. if (mii_reg & 0x40)
  3685. spddplx = SPEED_1000;
  3686. else if (mii_reg & 0x2000)
  3687. spddplx = SPEED_100;
  3688. else
  3689. spddplx = SPEED_10;
  3690. spddplx += (mii_reg & 0x100)
  3691. ? DUPLEX_FULL :
  3692. DUPLEX_HALF;
  3693. retval = e1000_set_spd_dplx(adapter,
  3694. spddplx);
  3695. if (retval) {
  3696. spin_unlock_irqrestore(
  3697. &adapter->stats_lock,
  3698. flags);
  3699. return retval;
  3700. }
  3701. }
  3702. if (netif_running(adapter->netdev))
  3703. e1000_reinit_locked(adapter);
  3704. else
  3705. e1000_reset(adapter);
  3706. break;
  3707. case M88E1000_PHY_SPEC_CTRL:
  3708. case M88E1000_EXT_PHY_SPEC_CTRL:
  3709. if (e1000_phy_reset(&adapter->hw)) {
  3710. spin_unlock_irqrestore(
  3711. &adapter->stats_lock, flags);
  3712. return -EIO;
  3713. }
  3714. break;
  3715. }
  3716. } else {
  3717. switch (data->reg_num) {
  3718. case PHY_CTRL:
  3719. if (mii_reg & MII_CR_POWER_DOWN)
  3720. break;
  3721. if (netif_running(adapter->netdev))
  3722. e1000_reinit_locked(adapter);
  3723. else
  3724. e1000_reset(adapter);
  3725. break;
  3726. }
  3727. }
  3728. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3729. break;
  3730. default:
  3731. return -EOPNOTSUPP;
  3732. }
  3733. return E1000_SUCCESS;
  3734. }
  3735. void
  3736. e1000_pci_set_mwi(struct e1000_hw *hw)
  3737. {
  3738. struct e1000_adapter *adapter = hw->back;
  3739. int ret_val = pci_set_mwi(adapter->pdev);
  3740. if (ret_val)
  3741. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3742. }
  3743. void
  3744. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3745. {
  3746. struct e1000_adapter *adapter = hw->back;
  3747. pci_clear_mwi(adapter->pdev);
  3748. }
  3749. void
  3750. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3751. {
  3752. struct e1000_adapter *adapter = hw->back;
  3753. pci_read_config_word(adapter->pdev, reg, value);
  3754. }
  3755. void
  3756. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3757. {
  3758. struct e1000_adapter *adapter = hw->back;
  3759. pci_write_config_word(adapter->pdev, reg, *value);
  3760. }
  3761. #if 0
  3762. uint32_t
  3763. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3764. {
  3765. return inl(port);
  3766. }
  3767. #endif /* 0 */
  3768. void
  3769. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3770. {
  3771. outl(value, port);
  3772. }
  3773. static void
  3774. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3775. {
  3776. struct e1000_adapter *adapter = netdev_priv(netdev);
  3777. uint32_t ctrl, rctl;
  3778. e1000_irq_disable(adapter);
  3779. adapter->vlgrp = grp;
  3780. if (grp) {
  3781. /* enable VLAN tag insert/strip */
  3782. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3783. ctrl |= E1000_CTRL_VME;
  3784. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3785. if (adapter->hw.mac_type != e1000_ich8lan) {
  3786. /* enable VLAN receive filtering */
  3787. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3788. rctl |= E1000_RCTL_VFE;
  3789. rctl &= ~E1000_RCTL_CFIEN;
  3790. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3791. e1000_update_mng_vlan(adapter);
  3792. }
  3793. } else {
  3794. /* disable VLAN tag insert/strip */
  3795. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3796. ctrl &= ~E1000_CTRL_VME;
  3797. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3798. if (adapter->hw.mac_type != e1000_ich8lan) {
  3799. /* disable VLAN filtering */
  3800. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3801. rctl &= ~E1000_RCTL_VFE;
  3802. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3803. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3804. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3805. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3806. }
  3807. }
  3808. }
  3809. e1000_irq_enable(adapter);
  3810. }
  3811. static void
  3812. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3813. {
  3814. struct e1000_adapter *adapter = netdev_priv(netdev);
  3815. uint32_t vfta, index;
  3816. if ((adapter->hw.mng_cookie.status &
  3817. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3818. (vid == adapter->mng_vlan_id))
  3819. return;
  3820. /* add VID to filter table */
  3821. index = (vid >> 5) & 0x7F;
  3822. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3823. vfta |= (1 << (vid & 0x1F));
  3824. e1000_write_vfta(&adapter->hw, index, vfta);
  3825. }
  3826. static void
  3827. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3828. {
  3829. struct e1000_adapter *adapter = netdev_priv(netdev);
  3830. uint32_t vfta, index;
  3831. e1000_irq_disable(adapter);
  3832. if (adapter->vlgrp)
  3833. adapter->vlgrp->vlan_devices[vid] = NULL;
  3834. e1000_irq_enable(adapter);
  3835. if ((adapter->hw.mng_cookie.status &
  3836. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3837. (vid == adapter->mng_vlan_id)) {
  3838. /* release control to f/w */
  3839. e1000_release_hw_control(adapter);
  3840. return;
  3841. }
  3842. /* remove VID from filter table */
  3843. index = (vid >> 5) & 0x7F;
  3844. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3845. vfta &= ~(1 << (vid & 0x1F));
  3846. e1000_write_vfta(&adapter->hw, index, vfta);
  3847. }
  3848. static void
  3849. e1000_restore_vlan(struct e1000_adapter *adapter)
  3850. {
  3851. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3852. if (adapter->vlgrp) {
  3853. uint16_t vid;
  3854. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3855. if (!adapter->vlgrp->vlan_devices[vid])
  3856. continue;
  3857. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3858. }
  3859. }
  3860. }
  3861. int
  3862. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3863. {
  3864. adapter->hw.autoneg = 0;
  3865. /* Fiber NICs only allow 1000 gbps Full duplex */
  3866. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3867. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3868. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3869. return -EINVAL;
  3870. }
  3871. switch (spddplx) {
  3872. case SPEED_10 + DUPLEX_HALF:
  3873. adapter->hw.forced_speed_duplex = e1000_10_half;
  3874. break;
  3875. case SPEED_10 + DUPLEX_FULL:
  3876. adapter->hw.forced_speed_duplex = e1000_10_full;
  3877. break;
  3878. case SPEED_100 + DUPLEX_HALF:
  3879. adapter->hw.forced_speed_duplex = e1000_100_half;
  3880. break;
  3881. case SPEED_100 + DUPLEX_FULL:
  3882. adapter->hw.forced_speed_duplex = e1000_100_full;
  3883. break;
  3884. case SPEED_1000 + DUPLEX_FULL:
  3885. adapter->hw.autoneg = 1;
  3886. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3887. break;
  3888. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3889. default:
  3890. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3891. return -EINVAL;
  3892. }
  3893. return 0;
  3894. }
  3895. #ifdef CONFIG_PM
  3896. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3897. * bus we're on (PCI(X) vs. PCI-E)
  3898. */
  3899. #define PCIE_CONFIG_SPACE_LEN 256
  3900. #define PCI_CONFIG_SPACE_LEN 64
  3901. static int
  3902. e1000_pci_save_state(struct e1000_adapter *adapter)
  3903. {
  3904. struct pci_dev *dev = adapter->pdev;
  3905. int size;
  3906. int i;
  3907. if (adapter->hw.mac_type >= e1000_82571)
  3908. size = PCIE_CONFIG_SPACE_LEN;
  3909. else
  3910. size = PCI_CONFIG_SPACE_LEN;
  3911. WARN_ON(adapter->config_space != NULL);
  3912. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3913. if (!adapter->config_space) {
  3914. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3915. return -ENOMEM;
  3916. }
  3917. for (i = 0; i < (size / 4); i++)
  3918. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3919. return 0;
  3920. }
  3921. static void
  3922. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3923. {
  3924. struct pci_dev *dev = adapter->pdev;
  3925. int size;
  3926. int i;
  3927. if (adapter->config_space == NULL)
  3928. return;
  3929. if (adapter->hw.mac_type >= e1000_82571)
  3930. size = PCIE_CONFIG_SPACE_LEN;
  3931. else
  3932. size = PCI_CONFIG_SPACE_LEN;
  3933. for (i = 0; i < (size / 4); i++)
  3934. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3935. kfree(adapter->config_space);
  3936. adapter->config_space = NULL;
  3937. return;
  3938. }
  3939. #endif /* CONFIG_PM */
  3940. static int
  3941. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3942. {
  3943. struct net_device *netdev = pci_get_drvdata(pdev);
  3944. struct e1000_adapter *adapter = netdev_priv(netdev);
  3945. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3946. uint32_t wufc = adapter->wol;
  3947. #ifdef CONFIG_PM
  3948. int retval = 0;
  3949. #endif
  3950. netif_device_detach(netdev);
  3951. if (netif_running(netdev)) {
  3952. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3953. e1000_down(adapter);
  3954. }
  3955. #ifdef CONFIG_PM
  3956. /* Implement our own version of pci_save_state(pdev) because pci-
  3957. * express adapters have 256-byte config spaces. */
  3958. retval = e1000_pci_save_state(adapter);
  3959. if (retval)
  3960. return retval;
  3961. #endif
  3962. status = E1000_READ_REG(&adapter->hw, STATUS);
  3963. if (status & E1000_STATUS_LU)
  3964. wufc &= ~E1000_WUFC_LNKC;
  3965. if (wufc) {
  3966. e1000_setup_rctl(adapter);
  3967. e1000_set_multi(netdev);
  3968. /* turn on all-multi mode if wake on multicast is enabled */
  3969. if (adapter->wol & E1000_WUFC_MC) {
  3970. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3971. rctl |= E1000_RCTL_MPE;
  3972. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3973. }
  3974. if (adapter->hw.mac_type >= e1000_82540) {
  3975. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3976. /* advertise wake from D3Cold */
  3977. #define E1000_CTRL_ADVD3WUC 0x00100000
  3978. /* phy power management enable */
  3979. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3980. ctrl |= E1000_CTRL_ADVD3WUC |
  3981. E1000_CTRL_EN_PHY_PWR_MGMT;
  3982. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3983. }
  3984. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3985. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3986. /* keep the laser running in D3 */
  3987. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3988. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3989. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3990. }
  3991. /* Allow time for pending master requests to run */
  3992. e1000_disable_pciex_master(&adapter->hw);
  3993. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3994. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3995. pci_enable_wake(pdev, PCI_D3hot, 1);
  3996. pci_enable_wake(pdev, PCI_D3cold, 1);
  3997. } else {
  3998. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3999. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4000. pci_enable_wake(pdev, PCI_D3hot, 0);
  4001. pci_enable_wake(pdev, PCI_D3cold, 0);
  4002. }
  4003. /* FIXME: this code is incorrect for PCI Express */
  4004. if (adapter->hw.mac_type >= e1000_82540 &&
  4005. adapter->hw.mac_type != e1000_ich8lan &&
  4006. adapter->hw.media_type == e1000_media_type_copper) {
  4007. manc = E1000_READ_REG(&adapter->hw, MANC);
  4008. if (manc & E1000_MANC_SMBUS_EN) {
  4009. manc |= E1000_MANC_ARP_EN;
  4010. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4011. pci_enable_wake(pdev, PCI_D3hot, 1);
  4012. pci_enable_wake(pdev, PCI_D3cold, 1);
  4013. }
  4014. }
  4015. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4016. e1000_phy_powerdown_workaround(&adapter->hw);
  4017. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4018. * would have already happened in close and is redundant. */
  4019. e1000_release_hw_control(adapter);
  4020. pci_disable_device(pdev);
  4021. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4022. return 0;
  4023. }
  4024. #ifdef CONFIG_PM
  4025. static int
  4026. e1000_resume(struct pci_dev *pdev)
  4027. {
  4028. struct net_device *netdev = pci_get_drvdata(pdev);
  4029. struct e1000_adapter *adapter = netdev_priv(netdev);
  4030. uint32_t manc, ret_val;
  4031. pci_set_power_state(pdev, PCI_D0);
  4032. e1000_pci_restore_state(adapter);
  4033. ret_val = pci_enable_device(pdev);
  4034. pci_set_master(pdev);
  4035. pci_enable_wake(pdev, PCI_D3hot, 0);
  4036. pci_enable_wake(pdev, PCI_D3cold, 0);
  4037. e1000_reset(adapter);
  4038. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4039. if (netif_running(netdev))
  4040. e1000_up(adapter);
  4041. netif_device_attach(netdev);
  4042. /* FIXME: this code is incorrect for PCI Express */
  4043. if (adapter->hw.mac_type >= e1000_82540 &&
  4044. adapter->hw.mac_type != e1000_ich8lan &&
  4045. adapter->hw.media_type == e1000_media_type_copper) {
  4046. manc = E1000_READ_REG(&adapter->hw, MANC);
  4047. manc &= ~(E1000_MANC_ARP_EN);
  4048. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4049. }
  4050. /* If the controller is 82573 and f/w is AMT, do not set
  4051. * DRV_LOAD until the interface is up. For all other cases,
  4052. * let the f/w know that the h/w is now under the control
  4053. * of the driver. */
  4054. if (adapter->hw.mac_type != e1000_82573 ||
  4055. !e1000_check_mng_mode(&adapter->hw))
  4056. e1000_get_hw_control(adapter);
  4057. return 0;
  4058. }
  4059. #endif
  4060. static void e1000_shutdown(struct pci_dev *pdev)
  4061. {
  4062. e1000_suspend(pdev, PMSG_SUSPEND);
  4063. }
  4064. #ifdef CONFIG_NET_POLL_CONTROLLER
  4065. /*
  4066. * Polling 'interrupt' - used by things like netconsole to send skbs
  4067. * without having to re-enable interrupts. It's not called while
  4068. * the interrupt routine is executing.
  4069. */
  4070. static void
  4071. e1000_netpoll(struct net_device *netdev)
  4072. {
  4073. struct e1000_adapter *adapter = netdev_priv(netdev);
  4074. disable_irq(adapter->pdev->irq);
  4075. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4076. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4077. #ifndef CONFIG_E1000_NAPI
  4078. adapter->clean_rx(adapter, adapter->rx_ring);
  4079. #endif
  4080. enable_irq(adapter->pdev->irq);
  4081. }
  4082. #endif
  4083. /**
  4084. * e1000_io_error_detected - called when PCI error is detected
  4085. * @pdev: Pointer to PCI device
  4086. * @state: The current pci conneection state
  4087. *
  4088. * This function is called after a PCI bus error affecting
  4089. * this device has been detected.
  4090. */
  4091. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4092. {
  4093. struct net_device *netdev = pci_get_drvdata(pdev);
  4094. struct e1000_adapter *adapter = netdev->priv;
  4095. netif_device_detach(netdev);
  4096. if (netif_running(netdev))
  4097. e1000_down(adapter);
  4098. /* Request a slot slot reset. */
  4099. return PCI_ERS_RESULT_NEED_RESET;
  4100. }
  4101. /**
  4102. * e1000_io_slot_reset - called after the pci bus has been reset.
  4103. * @pdev: Pointer to PCI device
  4104. *
  4105. * Restart the card from scratch, as if from a cold-boot. Implementation
  4106. * resembles the first-half of the e1000_resume routine.
  4107. */
  4108. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4109. {
  4110. struct net_device *netdev = pci_get_drvdata(pdev);
  4111. struct e1000_adapter *adapter = netdev->priv;
  4112. if (pci_enable_device(pdev)) {
  4113. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4114. return PCI_ERS_RESULT_DISCONNECT;
  4115. }
  4116. pci_set_master(pdev);
  4117. pci_enable_wake(pdev, 3, 0);
  4118. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4119. /* Perform card reset only on one instance of the card */
  4120. if (PCI_FUNC (pdev->devfn) != 0)
  4121. return PCI_ERS_RESULT_RECOVERED;
  4122. e1000_reset(adapter);
  4123. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4124. return PCI_ERS_RESULT_RECOVERED;
  4125. }
  4126. /**
  4127. * e1000_io_resume - called when traffic can start flowing again.
  4128. * @pdev: Pointer to PCI device
  4129. *
  4130. * This callback is called when the error recovery driver tells us that
  4131. * its OK to resume normal operation. Implementation resembles the
  4132. * second-half of the e1000_resume routine.
  4133. */
  4134. static void e1000_io_resume(struct pci_dev *pdev)
  4135. {
  4136. struct net_device *netdev = pci_get_drvdata(pdev);
  4137. struct e1000_adapter *adapter = netdev->priv;
  4138. uint32_t manc, swsm;
  4139. if (netif_running(netdev)) {
  4140. if (e1000_up(adapter)) {
  4141. printk("e1000: can't bring device back up after reset\n");
  4142. return;
  4143. }
  4144. }
  4145. netif_device_attach(netdev);
  4146. if (adapter->hw.mac_type >= e1000_82540 &&
  4147. adapter->hw.media_type == e1000_media_type_copper) {
  4148. manc = E1000_READ_REG(&adapter->hw, MANC);
  4149. manc &= ~(E1000_MANC_ARP_EN);
  4150. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4151. }
  4152. switch (adapter->hw.mac_type) {
  4153. case e1000_82573:
  4154. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4155. E1000_WRITE_REG(&adapter->hw, SWSM,
  4156. swsm | E1000_SWSM_DRV_LOAD);
  4157. break;
  4158. default:
  4159. break;
  4160. }
  4161. if (netif_running(netdev))
  4162. mod_timer(&adapter->watchdog_timer, jiffies);
  4163. }
  4164. /* e1000_main.c */