atl1_main.c 69 KB

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  1. /*
  2. * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
  3. * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
  4. * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  5. *
  6. * Derived from Intel e1000 driver
  7. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the Free
  11. * Software Foundation; either version 2 of the License, or (at your option)
  12. * any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program; if not, write to the Free Software Foundation, Inc., 59
  21. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. *
  23. * The full GNU General Public License is included in this distribution in the
  24. * file called COPYING.
  25. *
  26. * Contact Information:
  27. * Xiong Huang <xiong_huang@attansic.com>
  28. * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29. * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
  30. *
  31. * Chris Snook <csnook@redhat.com>
  32. * Jay Cliburn <jcliburn@gmail.com>
  33. *
  34. * This version is adapted from the Attansic reference driver for
  35. * inclusion in the Linux kernel. It is currently under heavy development.
  36. * A very incomplete list of things that need to be dealt with:
  37. *
  38. * TODO:
  39. * Fix TSO; tx performance is horrible with TSO enabled.
  40. * Wake on LAN.
  41. * Add more ethtool functions, including set ring parameters.
  42. * Fix abstruse irq enable/disable condition described here:
  43. * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  44. *
  45. * NEEDS TESTING:
  46. * VLAN
  47. * multicast
  48. * promiscuous mode
  49. * interrupt coalescing
  50. * SMP torture testing
  51. */
  52. #include <linux/types.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/pci.h>
  55. #include <linux/spinlock.h>
  56. #include <linux/slab.h>
  57. #include <linux/string.h>
  58. #include <linux/skbuff.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/if_vlan.h>
  61. #include <linux/irqreturn.h>
  62. #include <linux/workqueue.h>
  63. #include <linux/timer.h>
  64. #include <linux/jiffies.h>
  65. #include <linux/hardirq.h>
  66. #include <linux/interrupt.h>
  67. #include <linux/irqflags.h>
  68. #include <linux/dma-mapping.h>
  69. #include <linux/net.h>
  70. #include <linux/pm.h>
  71. #include <linux/in.h>
  72. #include <linux/ip.h>
  73. #include <linux/tcp.h>
  74. #include <linux/compiler.h>
  75. #include <linux/delay.h>
  76. #include <linux/mii.h>
  77. #include <net/checksum.h>
  78. #include <asm/atomic.h>
  79. #include <asm/byteorder.h>
  80. #include "atl1.h"
  81. #define DRIVER_VERSION "2.0.7"
  82. char atl1_driver_name[] = "atl1";
  83. static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
  84. static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
  85. char atl1_driver_version[] = DRIVER_VERSION;
  86. MODULE_AUTHOR
  87. ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
  88. MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
  89. MODULE_LICENSE("GPL");
  90. MODULE_VERSION(DRIVER_VERSION);
  91. /*
  92. * atl1_pci_tbl - PCI Device ID Table
  93. */
  94. static const struct pci_device_id atl1_pci_tbl[] = {
  95. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  96. /* required last entry */
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
  100. /*
  101. * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
  102. * @adapter: board private structure to initialize
  103. *
  104. * atl1_sw_init initializes the Adapter private data structure.
  105. * Fields are initialized based on PCI device information and
  106. * OS network device settings (MTU size).
  107. */
  108. static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
  109. {
  110. struct atl1_hw *hw = &adapter->hw;
  111. struct net_device *netdev = adapter->netdev;
  112. struct pci_dev *pdev = adapter->pdev;
  113. /* PCI config space info */
  114. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  115. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  116. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  117. adapter->wol = 0;
  118. adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
  119. adapter->ict = 50000; /* 100ms */
  120. adapter->link_speed = SPEED_0; /* hardware init */
  121. adapter->link_duplex = FULL_DUPLEX;
  122. hw->phy_configured = false;
  123. hw->preamble_len = 7;
  124. hw->ipgt = 0x60;
  125. hw->min_ifg = 0x50;
  126. hw->ipgr1 = 0x40;
  127. hw->ipgr2 = 0x60;
  128. hw->max_retry = 0xf;
  129. hw->lcol = 0x37;
  130. hw->jam_ipg = 7;
  131. hw->rfd_burst = 8;
  132. hw->rrd_burst = 8;
  133. hw->rfd_fetch_gap = 1;
  134. hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
  135. hw->rx_jumbo_lkah = 1;
  136. hw->rrd_ret_timer = 16;
  137. hw->tpd_burst = 4;
  138. hw->tpd_fetch_th = 16;
  139. hw->txf_burst = 0x100;
  140. hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
  141. hw->tpd_fetch_gap = 1;
  142. hw->rcb_value = atl1_rcb_64;
  143. hw->dma_ord = atl1_dma_ord_enh;
  144. hw->dmar_block = atl1_dma_req_256;
  145. hw->dmaw_block = atl1_dma_req_256;
  146. hw->cmb_rrd = 4;
  147. hw->cmb_tpd = 4;
  148. hw->cmb_rx_timer = 1; /* about 2us */
  149. hw->cmb_tx_timer = 1; /* about 2us */
  150. hw->smb_timer = 100000; /* about 200ms */
  151. atomic_set(&adapter->irq_sem, 0);
  152. spin_lock_init(&adapter->lock);
  153. spin_lock_init(&adapter->mb_lock);
  154. return 0;
  155. }
  156. /*
  157. * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
  158. * @adapter: board private structure
  159. *
  160. * Return 0 on success, negative on failure
  161. */
  162. s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
  163. {
  164. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  165. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  166. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  167. struct atl1_ring_header *ring_header = &adapter->ring_header;
  168. struct pci_dev *pdev = adapter->pdev;
  169. int size;
  170. u8 offset = 0;
  171. size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
  172. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  173. if (unlikely(!tpd_ring->buffer_info)) {
  174. printk(KERN_WARNING "%s: kzalloc failed , size = D%d\n",
  175. atl1_driver_name, size);
  176. goto err_nomem;
  177. }
  178. rfd_ring->buffer_info =
  179. (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
  180. /* real ring DMA buffer */
  181. ring_header->size = size = sizeof(struct tx_packet_desc) *
  182. tpd_ring->count
  183. + sizeof(struct rx_free_desc) * rfd_ring->count
  184. + sizeof(struct rx_return_desc) * rrd_ring->count
  185. + sizeof(struct coals_msg_block)
  186. + sizeof(struct stats_msg_block)
  187. + 40; /* "40: for 8 bytes align" huh? -- CHS */
  188. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  189. &ring_header->dma);
  190. if (unlikely(!ring_header->desc)) {
  191. printk(KERN_WARNING
  192. "%s: pci_alloc_consistent failed, size = D%d\n",
  193. atl1_driver_name, size);
  194. goto err_nomem;
  195. }
  196. memset(ring_header->desc, 0, ring_header->size);
  197. /* init TPD ring */
  198. tpd_ring->dma = ring_header->dma;
  199. offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
  200. tpd_ring->dma += offset;
  201. tpd_ring->desc = (u8 *) ring_header->desc + offset;
  202. tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
  203. atomic_set(&tpd_ring->next_to_use, 0);
  204. atomic_set(&tpd_ring->next_to_clean, 0);
  205. /* init RFD ring */
  206. rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
  207. offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
  208. rfd_ring->dma += offset;
  209. rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
  210. rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
  211. rfd_ring->next_to_clean = 0;
  212. /* rfd_ring->next_to_use = rfd_ring->count - 1; */
  213. atomic_set(&rfd_ring->next_to_use, 0);
  214. /* init RRD ring */
  215. rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
  216. offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
  217. rrd_ring->dma += offset;
  218. rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
  219. rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
  220. rrd_ring->next_to_use = 0;
  221. atomic_set(&rrd_ring->next_to_clean, 0);
  222. /* init CMB */
  223. adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
  224. offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
  225. adapter->cmb.dma += offset;
  226. adapter->cmb.cmb =
  227. (struct coals_msg_block *) ((u8 *) rrd_ring->desc +
  228. (rrd_ring->size + offset));
  229. /* init SMB */
  230. adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
  231. offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
  232. adapter->smb.dma += offset;
  233. adapter->smb.smb = (struct stats_msg_block *)
  234. ((u8 *) adapter->cmb.cmb + (sizeof(struct coals_msg_block) + offset));
  235. return ATL1_SUCCESS;
  236. err_nomem:
  237. kfree(tpd_ring->buffer_info);
  238. return -ENOMEM;
  239. }
  240. /*
  241. * atl1_irq_enable - Enable default interrupt generation settings
  242. * @adapter: board private structure
  243. */
  244. static void atl1_irq_enable(struct atl1_adapter *adapter)
  245. {
  246. if (likely(!atomic_dec_and_test(&adapter->irq_sem)))
  247. iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
  248. }
  249. static void atl1_clear_phy_int(struct atl1_adapter *adapter)
  250. {
  251. u16 phy_data;
  252. unsigned long flags;
  253. spin_lock_irqsave(&adapter->lock, flags);
  254. atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
  255. spin_unlock_irqrestore(&adapter->lock, flags);
  256. }
  257. static void atl1_inc_smb(struct atl1_adapter *adapter)
  258. {
  259. struct stats_msg_block *smb = adapter->smb.smb;
  260. /* Fill out the OS statistics structure */
  261. adapter->soft_stats.rx_packets += smb->rx_ok;
  262. adapter->soft_stats.tx_packets += smb->tx_ok;
  263. adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
  264. adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
  265. adapter->soft_stats.multicast += smb->rx_mcast;
  266. adapter->soft_stats.collisions += (smb->tx_1_col +
  267. smb->tx_2_col * 2 +
  268. smb->tx_late_col +
  269. smb->tx_abort_col *
  270. adapter->hw.max_retry);
  271. /* Rx Errors */
  272. adapter->soft_stats.rx_errors += (smb->rx_frag +
  273. smb->rx_fcs_err +
  274. smb->rx_len_err +
  275. smb->rx_sz_ov +
  276. smb->rx_rxf_ov +
  277. smb->rx_rrd_ov + smb->rx_align_err);
  278. adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
  279. adapter->soft_stats.rx_length_errors += smb->rx_len_err;
  280. adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
  281. adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
  282. adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
  283. smb->rx_rxf_ov);
  284. adapter->soft_stats.rx_pause += smb->rx_pause;
  285. adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
  286. adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
  287. /* Tx Errors */
  288. adapter->soft_stats.tx_errors += (smb->tx_late_col +
  289. smb->tx_abort_col +
  290. smb->tx_underrun + smb->tx_trunc);
  291. adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
  292. adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
  293. adapter->soft_stats.tx_window_errors += smb->tx_late_col;
  294. adapter->soft_stats.excecol += smb->tx_abort_col;
  295. adapter->soft_stats.deffer += smb->tx_defer;
  296. adapter->soft_stats.scc += smb->tx_1_col;
  297. adapter->soft_stats.mcc += smb->tx_2_col;
  298. adapter->soft_stats.latecol += smb->tx_late_col;
  299. adapter->soft_stats.tx_underun += smb->tx_underrun;
  300. adapter->soft_stats.tx_trunc += smb->tx_trunc;
  301. adapter->soft_stats.tx_pause += smb->tx_pause;
  302. adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
  303. adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
  304. adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
  305. adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
  306. adapter->net_stats.multicast = adapter->soft_stats.multicast;
  307. adapter->net_stats.collisions = adapter->soft_stats.collisions;
  308. adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
  309. adapter->net_stats.rx_over_errors =
  310. adapter->soft_stats.rx_missed_errors;
  311. adapter->net_stats.rx_length_errors =
  312. adapter->soft_stats.rx_length_errors;
  313. adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
  314. adapter->net_stats.rx_frame_errors =
  315. adapter->soft_stats.rx_frame_errors;
  316. adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
  317. adapter->net_stats.rx_missed_errors =
  318. adapter->soft_stats.rx_missed_errors;
  319. adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
  320. adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
  321. adapter->net_stats.tx_aborted_errors =
  322. adapter->soft_stats.tx_aborted_errors;
  323. adapter->net_stats.tx_window_errors =
  324. adapter->soft_stats.tx_window_errors;
  325. adapter->net_stats.tx_carrier_errors =
  326. adapter->soft_stats.tx_carrier_errors;
  327. }
  328. static void atl1_rx_checksum(struct atl1_adapter *adapter,
  329. struct rx_return_desc *rrd,
  330. struct sk_buff *skb)
  331. {
  332. skb->ip_summed = CHECKSUM_NONE;
  333. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  334. if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
  335. ERR_FLAG_CODE | ERR_FLAG_OV)) {
  336. adapter->hw_csum_err++;
  337. printk(KERN_DEBUG "%s: rx checksum error\n",
  338. atl1_driver_name);
  339. return;
  340. }
  341. }
  342. /* not IPv4 */
  343. if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
  344. /* checksum is invalid, but it's not an IPv4 pkt, so ok */
  345. return;
  346. /* IPv4 packet */
  347. if (likely(!(rrd->err_flg &
  348. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
  349. skb->ip_summed = CHECKSUM_UNNECESSARY;
  350. adapter->hw_csum_good++;
  351. return;
  352. }
  353. /* IPv4, but hardware thinks its checksum is wrong */
  354. printk(KERN_DEBUG "%s: hw csum wrong pkt_flag:%x, err_flag:%x\n",
  355. atl1_driver_name, rrd->pkt_flg, rrd->err_flg);
  356. skb->ip_summed = CHECKSUM_COMPLETE;
  357. skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
  358. adapter->hw_csum_err++;
  359. return;
  360. }
  361. /*
  362. * atl1_alloc_rx_buffers - Replace used receive buffers
  363. * @adapter: address of board private structure
  364. */
  365. static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
  366. {
  367. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  368. struct pci_dev *pdev = adapter->pdev;
  369. struct page *page;
  370. unsigned long offset;
  371. struct atl1_buffer *buffer_info, *next_info;
  372. struct sk_buff *skb;
  373. u16 num_alloc = 0;
  374. u16 rfd_next_to_use, next_next;
  375. struct rx_free_desc *rfd_desc;
  376. next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
  377. if (++next_next == rfd_ring->count)
  378. next_next = 0;
  379. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  380. next_info = &rfd_ring->buffer_info[next_next];
  381. while (!buffer_info->alloced && !next_info->alloced) {
  382. if (buffer_info->skb) {
  383. buffer_info->alloced = 1;
  384. goto next;
  385. }
  386. rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
  387. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  388. if (unlikely(!skb)) { /* Better luck next round */
  389. adapter->net_stats.rx_dropped++;
  390. break;
  391. }
  392. /*
  393. * Make buffer alignment 2 beyond a 16 byte boundary
  394. * this will result in a 16 byte aligned IP header after
  395. * the 14 byte MAC header is removed
  396. */
  397. skb_reserve(skb, NET_IP_ALIGN);
  398. buffer_info->alloced = 1;
  399. buffer_info->skb = skb;
  400. buffer_info->length = (u16) adapter->rx_buffer_len;
  401. page = virt_to_page(skb->data);
  402. offset = (unsigned long)skb->data & ~PAGE_MASK;
  403. buffer_info->dma = pci_map_page(pdev, page, offset,
  404. adapter->rx_buffer_len,
  405. PCI_DMA_FROMDEVICE);
  406. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  407. rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
  408. rfd_desc->coalese = 0;
  409. next:
  410. rfd_next_to_use = next_next;
  411. if (unlikely(++next_next == rfd_ring->count))
  412. next_next = 0;
  413. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  414. next_info = &rfd_ring->buffer_info[next_next];
  415. num_alloc++;
  416. }
  417. if (num_alloc) {
  418. /*
  419. * Force memory writes to complete before letting h/w
  420. * know there are new descriptors to fetch. (Only
  421. * applicable for weak-ordered memory model archs,
  422. * such as IA-64).
  423. */
  424. wmb();
  425. atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
  426. }
  427. return num_alloc;
  428. }
  429. static void atl1_intr_rx(struct atl1_adapter *adapter)
  430. {
  431. int i, count;
  432. u16 length;
  433. u16 rrd_next_to_clean;
  434. u32 value;
  435. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  436. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  437. struct atl1_buffer *buffer_info;
  438. struct rx_return_desc *rrd;
  439. struct sk_buff *skb;
  440. count = 0;
  441. rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
  442. while (1) {
  443. rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
  444. i = 1;
  445. if (likely(rrd->xsz.valid)) { /* packet valid */
  446. chk_rrd:
  447. /* check rrd status */
  448. if (likely(rrd->num_buf == 1))
  449. goto rrd_ok;
  450. /* rrd seems to be bad */
  451. if (unlikely(i-- > 0)) {
  452. /* rrd may not be DMAed completely */
  453. printk(KERN_DEBUG
  454. "%s: RRD may not be DMAed completely\n",
  455. atl1_driver_name);
  456. udelay(1);
  457. goto chk_rrd;
  458. }
  459. /* bad rrd */
  460. printk(KERN_DEBUG "%s: bad RRD\n", atl1_driver_name);
  461. /* see if update RFD index */
  462. if (rrd->num_buf > 1) {
  463. u16 num_buf;
  464. num_buf =
  465. (rrd->xsz.xsum_sz.pkt_size +
  466. adapter->rx_buffer_len -
  467. 1) / adapter->rx_buffer_len;
  468. if (rrd->num_buf == num_buf) {
  469. /* clean alloc flag for bad rrd */
  470. while (rfd_ring->next_to_clean !=
  471. (rrd->buf_indx + num_buf)) {
  472. rfd_ring->buffer_info[rfd_ring->
  473. next_to_clean].alloced = 0;
  474. if (++rfd_ring->next_to_clean ==
  475. rfd_ring->count) {
  476. rfd_ring->
  477. next_to_clean = 0;
  478. }
  479. }
  480. }
  481. }
  482. /* update rrd */
  483. rrd->xsz.valid = 0;
  484. if (++rrd_next_to_clean == rrd_ring->count)
  485. rrd_next_to_clean = 0;
  486. count++;
  487. continue;
  488. } else { /* current rrd still not be updated */
  489. break;
  490. }
  491. rrd_ok:
  492. /* clean alloc flag for bad rrd */
  493. while (rfd_ring->next_to_clean != rrd->buf_indx) {
  494. rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced =
  495. 0;
  496. if (++rfd_ring->next_to_clean == rfd_ring->count)
  497. rfd_ring->next_to_clean = 0;
  498. }
  499. buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
  500. if (++rfd_ring->next_to_clean == rfd_ring->count)
  501. rfd_ring->next_to_clean = 0;
  502. /* update rrd next to clean */
  503. if (++rrd_next_to_clean == rrd_ring->count)
  504. rrd_next_to_clean = 0;
  505. count++;
  506. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  507. if (!(rrd->err_flg &
  508. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
  509. | ERR_FLAG_LEN))) {
  510. /* packet error, don't need upstream */
  511. buffer_info->alloced = 0;
  512. rrd->xsz.valid = 0;
  513. continue;
  514. }
  515. }
  516. /* Good Receive */
  517. pci_unmap_page(adapter->pdev, buffer_info->dma,
  518. buffer_info->length, PCI_DMA_FROMDEVICE);
  519. skb = buffer_info->skb;
  520. length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
  521. skb_put(skb, length - ETHERNET_FCS_SIZE);
  522. /* Receive Checksum Offload */
  523. atl1_rx_checksum(adapter, rrd, skb);
  524. skb->protocol = eth_type_trans(skb, adapter->netdev);
  525. if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
  526. u16 vlan_tag = (rrd->vlan_tag >> 4) |
  527. ((rrd->vlan_tag & 7) << 13) |
  528. ((rrd->vlan_tag & 8) << 9);
  529. vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
  530. } else
  531. netif_rx(skb);
  532. /* let protocol layer free skb */
  533. buffer_info->skb = NULL;
  534. buffer_info->alloced = 0;
  535. rrd->xsz.valid = 0;
  536. adapter->netdev->last_rx = jiffies;
  537. }
  538. atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
  539. atl1_alloc_rx_buffers(adapter);
  540. /* update mailbox ? */
  541. if (count) {
  542. u32 tpd_next_to_use;
  543. u32 rfd_next_to_use;
  544. u32 rrd_next_to_clean;
  545. spin_lock(&adapter->mb_lock);
  546. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  547. rfd_next_to_use =
  548. atomic_read(&adapter->rfd_ring.next_to_use);
  549. rrd_next_to_clean =
  550. atomic_read(&adapter->rrd_ring.next_to_clean);
  551. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  552. MB_RFD_PROD_INDX_SHIFT) |
  553. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  554. MB_RRD_CONS_INDX_SHIFT) |
  555. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  556. MB_TPD_PROD_INDX_SHIFT);
  557. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  558. spin_unlock(&adapter->mb_lock);
  559. }
  560. }
  561. static void atl1_intr_tx(struct atl1_adapter *adapter)
  562. {
  563. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  564. struct atl1_buffer *buffer_info;
  565. u16 sw_tpd_next_to_clean;
  566. u16 cmb_tpd_next_to_clean;
  567. u8 update = 0;
  568. sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  569. cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
  570. while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
  571. struct tx_packet_desc *tpd;
  572. update = 1;
  573. tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
  574. buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
  575. if (buffer_info->dma) {
  576. pci_unmap_page(adapter->pdev, buffer_info->dma,
  577. buffer_info->length, PCI_DMA_TODEVICE);
  578. buffer_info->dma = 0;
  579. }
  580. if (buffer_info->skb) {
  581. dev_kfree_skb_irq(buffer_info->skb);
  582. buffer_info->skb = NULL;
  583. }
  584. tpd->buffer_addr = 0;
  585. tpd->desc.data = 0;
  586. if (++sw_tpd_next_to_clean == tpd_ring->count)
  587. sw_tpd_next_to_clean = 0;
  588. }
  589. atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
  590. if (netif_queue_stopped(adapter->netdev)
  591. && netif_carrier_ok(adapter->netdev))
  592. netif_wake_queue(adapter->netdev);
  593. }
  594. static void atl1_check_for_link(struct atl1_adapter *adapter)
  595. {
  596. struct net_device *netdev = adapter->netdev;
  597. u16 phy_data = 0;
  598. spin_lock(&adapter->lock);
  599. adapter->phy_timer_pending = false;
  600. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  601. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  602. spin_unlock(&adapter->lock);
  603. /* notify upper layer link down ASAP */
  604. if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
  605. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  606. printk(KERN_INFO "%s: %s link is down\n",
  607. atl1_driver_name, netdev->name);
  608. adapter->link_speed = SPEED_0;
  609. netif_carrier_off(netdev);
  610. netif_stop_queue(netdev);
  611. }
  612. }
  613. schedule_work(&adapter->link_chg_task);
  614. }
  615. /*
  616. * atl1_intr - Interrupt Handler
  617. * @irq: interrupt number
  618. * @data: pointer to a network interface device structure
  619. * @pt_regs: CPU registers structure
  620. */
  621. static irqreturn_t atl1_intr(int irq, void *data)
  622. {
  623. /*struct atl1_adapter *adapter = ((struct net_device *)data)->priv;*/
  624. struct atl1_adapter *adapter = netdev_priv(data);
  625. u32 status;
  626. u8 update_rx;
  627. int max_ints = 10;
  628. status = adapter->cmb.cmb->int_stats;
  629. if (!status)
  630. return IRQ_NONE;
  631. update_rx = 0;
  632. do {
  633. /* clear CMB interrupt status at once */
  634. adapter->cmb.cmb->int_stats = 0;
  635. if (status & ISR_GPHY) /* clear phy status */
  636. atl1_clear_phy_int(adapter);
  637. /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
  638. iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
  639. /* check if SMB intr */
  640. if (status & ISR_SMB)
  641. atl1_inc_smb(adapter);
  642. /* check if PCIE PHY Link down */
  643. if (status & ISR_PHY_LINKDOWN) {
  644. printk(KERN_DEBUG "%s: pcie phy link down %x\n",
  645. atl1_driver_name, status);
  646. if (netif_running(adapter->netdev)) { /* reset MAC */
  647. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  648. schedule_work(&adapter->pcie_dma_to_rst_task);
  649. return IRQ_HANDLED;
  650. }
  651. }
  652. /* check if DMA read/write error ? */
  653. if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
  654. printk(KERN_DEBUG
  655. "%s: pcie DMA r/w error (status = 0x%x)\n",
  656. atl1_driver_name, status);
  657. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  658. schedule_work(&adapter->pcie_dma_to_rst_task);
  659. return IRQ_HANDLED;
  660. }
  661. /* link event */
  662. if (status & ISR_GPHY) {
  663. adapter->soft_stats.tx_carrier_errors++;
  664. atl1_check_for_link(adapter);
  665. }
  666. /* transmit event */
  667. if (status & ISR_CMB_TX)
  668. atl1_intr_tx(adapter);
  669. /* rx exception */
  670. if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  671. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  672. ISR_HOST_RRD_OV | ISR_CMB_RX))) {
  673. if (status &
  674. (ISR_RXF_OV | ISR_RFD_UNRUN | ISR_RRD_OV |
  675. ISR_HOST_RFD_UNRUN | ISR_HOST_RRD_OV))
  676. printk(KERN_INFO
  677. "%s: rx exception: status = 0x%x\n",
  678. atl1_driver_name, status);
  679. atl1_intr_rx(adapter);
  680. }
  681. if (--max_ints < 0)
  682. break;
  683. } while ((status = adapter->cmb.cmb->int_stats));
  684. /* re-enable Interrupt */
  685. iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
  686. return IRQ_HANDLED;
  687. }
  688. /*
  689. * atl1_set_multi - Multicast and Promiscuous mode set
  690. * @netdev: network interface device structure
  691. *
  692. * The set_multi entry point is called whenever the multicast address
  693. * list or the network interface flags are updated. This routine is
  694. * responsible for configuring the hardware for proper multicast,
  695. * promiscuous mode, and all-multi behavior.
  696. */
  697. static void atl1_set_multi(struct net_device *netdev)
  698. {
  699. struct atl1_adapter *adapter = netdev_priv(netdev);
  700. struct atl1_hw *hw = &adapter->hw;
  701. struct dev_mc_list *mc_ptr;
  702. u32 rctl;
  703. u32 hash_value;
  704. /* Check for Promiscuous and All Multicast modes */
  705. rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  706. if (netdev->flags & IFF_PROMISC)
  707. rctl |= MAC_CTRL_PROMIS_EN;
  708. else if (netdev->flags & IFF_ALLMULTI) {
  709. rctl |= MAC_CTRL_MC_ALL_EN;
  710. rctl &= ~MAC_CTRL_PROMIS_EN;
  711. } else
  712. rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  713. iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
  714. /* clear the old settings from the multicast hash table */
  715. iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
  716. iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
  717. /* compute mc addresses' hash value ,and put it into hash table */
  718. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  719. hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
  720. atl1_hash_set(hw, hash_value);
  721. }
  722. }
  723. static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
  724. {
  725. u32 value;
  726. struct atl1_hw *hw = &adapter->hw;
  727. struct net_device *netdev = adapter->netdev;
  728. /* Config MAC CTRL Register */
  729. value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  730. /* duplex */
  731. if (FULL_DUPLEX == adapter->link_duplex)
  732. value |= MAC_CTRL_DUPLX;
  733. /* speed */
  734. value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
  735. MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
  736. MAC_CTRL_SPEED_SHIFT);
  737. /* flow control */
  738. value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  739. /* PAD & CRC */
  740. value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  741. /* preamble length */
  742. value |= (((u32) adapter->hw.preamble_len
  743. & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
  744. /* vlan */
  745. if (adapter->vlgrp)
  746. value |= MAC_CTRL_RMV_VLAN;
  747. /* rx checksum
  748. if (adapter->rx_csum)
  749. value |= MAC_CTRL_RX_CHKSUM_EN;
  750. */
  751. /* filter mode */
  752. value |= MAC_CTRL_BC_EN;
  753. if (netdev->flags & IFF_PROMISC)
  754. value |= MAC_CTRL_PROMIS_EN;
  755. else if (netdev->flags & IFF_ALLMULTI)
  756. value |= MAC_CTRL_MC_ALL_EN;
  757. /* value |= MAC_CTRL_LOOPBACK; */
  758. iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
  759. }
  760. static u32 atl1_check_link(struct atl1_adapter *adapter)
  761. {
  762. struct atl1_hw *hw = &adapter->hw;
  763. struct net_device *netdev = adapter->netdev;
  764. u32 ret_val;
  765. u16 speed, duplex, phy_data;
  766. int reconfig = 0;
  767. /* MII_BMSR must read twice */
  768. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  769. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  770. if (!(phy_data & BMSR_LSTATUS)) { /* link down */
  771. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  772. printk(KERN_INFO "%s: link is down\n",
  773. atl1_driver_name);
  774. adapter->link_speed = SPEED_0;
  775. netif_carrier_off(netdev);
  776. netif_stop_queue(netdev);
  777. }
  778. return ATL1_SUCCESS;
  779. }
  780. /* Link Up */
  781. ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
  782. if (ret_val)
  783. return ret_val;
  784. switch (hw->media_type) {
  785. case MEDIA_TYPE_1000M_FULL:
  786. if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
  787. reconfig = 1;
  788. break;
  789. case MEDIA_TYPE_100M_FULL:
  790. if (speed != SPEED_100 || duplex != FULL_DUPLEX)
  791. reconfig = 1;
  792. break;
  793. case MEDIA_TYPE_100M_HALF:
  794. if (speed != SPEED_100 || duplex != HALF_DUPLEX)
  795. reconfig = 1;
  796. break;
  797. case MEDIA_TYPE_10M_FULL:
  798. if (speed != SPEED_10 || duplex != FULL_DUPLEX)
  799. reconfig = 1;
  800. break;
  801. case MEDIA_TYPE_10M_HALF:
  802. if (speed != SPEED_10 || duplex != HALF_DUPLEX)
  803. reconfig = 1;
  804. break;
  805. }
  806. /* link result is our setting */
  807. if (!reconfig) {
  808. if (adapter->link_speed != speed
  809. || adapter->link_duplex != duplex) {
  810. adapter->link_speed = speed;
  811. adapter->link_duplex = duplex;
  812. atl1_setup_mac_ctrl(adapter);
  813. printk(KERN_INFO "%s: %s link is up %d Mbps %s\n",
  814. atl1_driver_name, netdev->name,
  815. adapter->link_speed,
  816. adapter->link_duplex ==
  817. FULL_DUPLEX ? "full duplex" : "half duplex");
  818. }
  819. if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
  820. netif_carrier_on(netdev);
  821. netif_wake_queue(netdev);
  822. }
  823. return ATL1_SUCCESS;
  824. }
  825. /* change orignal link status */
  826. if (netif_carrier_ok(netdev)) {
  827. adapter->link_speed = SPEED_0;
  828. netif_carrier_off(netdev);
  829. netif_stop_queue(netdev);
  830. }
  831. if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
  832. hw->media_type != MEDIA_TYPE_1000M_FULL) {
  833. switch (hw->media_type) {
  834. case MEDIA_TYPE_100M_FULL:
  835. phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
  836. MII_CR_RESET;
  837. break;
  838. case MEDIA_TYPE_100M_HALF:
  839. phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
  840. break;
  841. case MEDIA_TYPE_10M_FULL:
  842. phy_data =
  843. MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
  844. break;
  845. default: /* MEDIA_TYPE_10M_HALF: */
  846. phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
  847. break;
  848. }
  849. atl1_write_phy_reg(hw, MII_BMCR, phy_data);
  850. return ATL1_SUCCESS;
  851. }
  852. /* auto-neg, insert timer to re-config phy */
  853. if (!adapter->phy_timer_pending) {
  854. adapter->phy_timer_pending = true;
  855. mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
  856. }
  857. return ATL1_SUCCESS;
  858. }
  859. static void set_flow_ctrl_old(struct atl1_adapter *adapter)
  860. {
  861. u32 hi, lo, value;
  862. /* RFD Flow Control */
  863. value = adapter->rfd_ring.count;
  864. hi = value / 16;
  865. if (hi < 2)
  866. hi = 2;
  867. lo = value * 7 / 8;
  868. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  869. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  870. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  871. /* RRD Flow Control */
  872. value = adapter->rrd_ring.count;
  873. lo = value / 16;
  874. hi = value * 7 / 8;
  875. if (lo < 2)
  876. lo = 2;
  877. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  878. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  879. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  880. }
  881. static void set_flow_ctrl_new(struct atl1_hw *hw)
  882. {
  883. u32 hi, lo, value;
  884. /* RXF Flow Control */
  885. value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
  886. lo = value / 16;
  887. if (lo < 192)
  888. lo = 192;
  889. hi = value * 7 / 8;
  890. if (hi < lo)
  891. hi = lo + 16;
  892. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  893. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  894. iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  895. /* RRD Flow Control */
  896. value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
  897. lo = value / 8;
  898. hi = value * 7 / 8;
  899. if (lo < 2)
  900. lo = 2;
  901. if (hi < lo)
  902. hi = lo + 3;
  903. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  904. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  905. iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  906. }
  907. /*
  908. * atl1_configure - Configure Transmit&Receive Unit after Reset
  909. * @adapter: board private structure
  910. *
  911. * Configure the Tx /Rx unit of the MAC after a reset.
  912. */
  913. static u32 atl1_configure(struct atl1_adapter *adapter)
  914. {
  915. struct atl1_hw *hw = &adapter->hw;
  916. u32 value;
  917. /* clear interrupt status */
  918. iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
  919. /* set MAC Address */
  920. value = (((u32) hw->mac_addr[2]) << 24) |
  921. (((u32) hw->mac_addr[3]) << 16) |
  922. (((u32) hw->mac_addr[4]) << 8) |
  923. (((u32) hw->mac_addr[5]));
  924. iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
  925. value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
  926. iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
  927. /* tx / rx ring */
  928. /* HI base address */
  929. iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
  930. hw->hw_addr + REG_DESC_BASE_ADDR_HI);
  931. /* LO base address */
  932. iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
  933. hw->hw_addr + REG_DESC_RFD_ADDR_LO);
  934. iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
  935. hw->hw_addr + REG_DESC_RRD_ADDR_LO);
  936. iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
  937. hw->hw_addr + REG_DESC_TPD_ADDR_LO);
  938. iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
  939. hw->hw_addr + REG_DESC_CMB_ADDR_LO);
  940. iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
  941. hw->hw_addr + REG_DESC_SMB_ADDR_LO);
  942. /* element count */
  943. value = adapter->rrd_ring.count;
  944. value <<= 16;
  945. value += adapter->rfd_ring.count;
  946. iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
  947. iowrite32(adapter->tpd_ring.count, hw->hw_addr + REG_DESC_TPD_RING_SIZE);
  948. /* Load Ptr */
  949. iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
  950. /* config Mailbox */
  951. value = ((atomic_read(&adapter->tpd_ring.next_to_use)
  952. & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
  953. ((atomic_read(&adapter->rrd_ring.next_to_clean)
  954. & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
  955. ((atomic_read(&adapter->rfd_ring.next_to_use)
  956. & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
  957. iowrite32(value, hw->hw_addr + REG_MAILBOX);
  958. /* config IPG/IFG */
  959. value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
  960. << MAC_IPG_IFG_IPGT_SHIFT) |
  961. (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
  962. << MAC_IPG_IFG_MIFG_SHIFT) |
  963. (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
  964. << MAC_IPG_IFG_IPGR1_SHIFT) |
  965. (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
  966. << MAC_IPG_IFG_IPGR2_SHIFT);
  967. iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
  968. /* config Half-Duplex Control */
  969. value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
  970. (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
  971. << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
  972. MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
  973. (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
  974. (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
  975. << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
  976. iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
  977. /* set Interrupt Moderator Timer */
  978. iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
  979. iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
  980. /* set Interrupt Clear Timer */
  981. iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
  982. /* set MTU, 4 : VLAN */
  983. iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
  984. /* jumbo size & rrd retirement timer */
  985. value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
  986. << RXQ_JMBOSZ_TH_SHIFT) |
  987. (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
  988. << RXQ_JMBO_LKAH_SHIFT) |
  989. (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
  990. << RXQ_RRD_TIMER_SHIFT);
  991. iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
  992. /* Flow Control */
  993. switch (hw->dev_rev) {
  994. case 0x8001:
  995. case 0x9001:
  996. case 0x9002:
  997. case 0x9003:
  998. set_flow_ctrl_old(adapter);
  999. break;
  1000. default:
  1001. set_flow_ctrl_new(hw);
  1002. break;
  1003. }
  1004. /* config TXQ */
  1005. value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
  1006. << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
  1007. (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
  1008. << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
  1009. (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
  1010. << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN;
  1011. iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
  1012. /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
  1013. value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
  1014. << TX_JUMBO_TASK_TH_SHIFT) |
  1015. (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
  1016. << TX_TPD_MIN_IPG_SHIFT);
  1017. iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
  1018. /* config RXQ */
  1019. value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
  1020. << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
  1021. (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
  1022. << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
  1023. (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
  1024. << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) |
  1025. RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
  1026. iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
  1027. /* config DMA Engine */
  1028. value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1029. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  1030. ((((u32) hw->dmaw_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1031. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  1032. DMA_CTRL_DMAR_EN | DMA_CTRL_DMAW_EN;
  1033. value |= (u32) hw->dma_ord;
  1034. if (atl1_rcb_128 == hw->rcb_value)
  1035. value |= DMA_CTRL_RCB_VALUE;
  1036. iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
  1037. /* config CMB / SMB */
  1038. value = hw->cmb_rrd | ((u32) hw->cmb_tpd << 16);
  1039. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
  1040. value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
  1041. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
  1042. iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
  1043. /* --- enable CMB / SMB */
  1044. value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
  1045. iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
  1046. value = ioread32(adapter->hw.hw_addr + REG_ISR);
  1047. if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
  1048. value = 1; /* config failed */
  1049. else
  1050. value = 0;
  1051. /* clear all interrupt status */
  1052. iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
  1053. iowrite32(0, adapter->hw.hw_addr + REG_ISR);
  1054. return value;
  1055. }
  1056. /*
  1057. * atl1_irq_disable - Mask off interrupt generation on the NIC
  1058. * @adapter: board private structure
  1059. */
  1060. static void atl1_irq_disable(struct atl1_adapter *adapter)
  1061. {
  1062. atomic_inc(&adapter->irq_sem);
  1063. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1064. ioread32(adapter->hw.hw_addr + REG_IMR);
  1065. synchronize_irq(adapter->pdev->irq);
  1066. }
  1067. static void atl1_vlan_rx_register(struct net_device *netdev,
  1068. struct vlan_group *grp)
  1069. {
  1070. struct atl1_adapter *adapter = netdev_priv(netdev);
  1071. unsigned long flags;
  1072. u32 ctrl;
  1073. spin_lock_irqsave(&adapter->lock, flags);
  1074. /* atl1_irq_disable(adapter); */
  1075. adapter->vlgrp = grp;
  1076. if (grp) {
  1077. /* enable VLAN tag insert/strip */
  1078. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1079. ctrl |= MAC_CTRL_RMV_VLAN;
  1080. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1081. } else {
  1082. /* disable VLAN tag insert/strip */
  1083. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1084. ctrl &= ~MAC_CTRL_RMV_VLAN;
  1085. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1086. }
  1087. /* atl1_irq_enable(adapter); */
  1088. spin_unlock_irqrestore(&adapter->lock, flags);
  1089. }
  1090. /* FIXME: justify or remove -- CHS */
  1091. static void atl1_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
  1092. {
  1093. /* We don't do Vlan filtering */
  1094. return;
  1095. }
  1096. /* FIXME: this looks wrong too -- CHS */
  1097. static void atl1_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
  1098. {
  1099. struct atl1_adapter *adapter = netdev_priv(netdev);
  1100. unsigned long flags;
  1101. spin_lock_irqsave(&adapter->lock, flags);
  1102. /* atl1_irq_disable(adapter); */
  1103. vlan_group_set_device(adapter->vlgrp, vid, NULL);
  1104. /* atl1_irq_enable(adapter); */
  1105. spin_unlock_irqrestore(&adapter->lock, flags);
  1106. /* We don't do Vlan filtering */
  1107. return;
  1108. }
  1109. static void atl1_restore_vlan(struct atl1_adapter *adapter)
  1110. {
  1111. atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1112. if (adapter->vlgrp) {
  1113. u16 vid;
  1114. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1115. if (!vlan_group_get_device(adapter->vlgrp, vid))
  1116. continue;
  1117. atl1_vlan_rx_add_vid(adapter->netdev, vid);
  1118. }
  1119. }
  1120. }
  1121. static u16 tpd_avail(struct atl1_tpd_ring *tpd_ring)
  1122. {
  1123. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1124. u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
  1125. return ((next_to_clean >
  1126. next_to_use) ? next_to_clean - next_to_use -
  1127. 1 : tpd_ring->count + next_to_clean - next_to_use - 1);
  1128. }
  1129. static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
  1130. struct tso_param *tso)
  1131. {
  1132. /* We enter this function holding a spinlock. */
  1133. u8 ipofst;
  1134. int err;
  1135. if (skb_shinfo(skb)->gso_size) {
  1136. if (skb_header_cloned(skb)) {
  1137. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1138. if (unlikely(err))
  1139. return err;
  1140. }
  1141. if (skb->protocol == ntohs(ETH_P_IP)) {
  1142. struct iphdr *iph = ip_hdr(skb);
  1143. iph->tot_len = 0;
  1144. iph->check = 0;
  1145. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  1146. iph->daddr, 0,
  1147. IPPROTO_TCP,
  1148. 0);
  1149. ipofst = skb_network_offset(skb);
  1150. if (ipofst != ENET_HEADER_SIZE) /* 802.3 frame */
  1151. tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
  1152. tso->tsopl |= (iph->ihl &
  1153. CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
  1154. tso->tsopl |= (tcp_hdrlen(skb) &
  1155. TSO_PARAM_TCPHDRLEN_MASK) << TSO_PARAM_TCPHDRLEN_SHIFT;
  1156. tso->tsopl |= (skb_shinfo(skb)->gso_size &
  1157. TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
  1158. tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
  1159. tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
  1160. tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
  1161. return true;
  1162. }
  1163. }
  1164. return false;
  1165. }
  1166. static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
  1167. struct csum_param *csum)
  1168. {
  1169. u8 css, cso;
  1170. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1171. cso = skb_transport_offset(skb);
  1172. css = cso + skb->csum_offset;
  1173. if (unlikely(cso & 0x1)) {
  1174. printk(KERN_DEBUG "%s: payload offset != even number\n",
  1175. atl1_driver_name);
  1176. return -1;
  1177. }
  1178. csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
  1179. CSUM_PARAM_PLOADOFFSET_SHIFT;
  1180. csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
  1181. CSUM_PARAM_XSUMOFFSET_SHIFT;
  1182. csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
  1183. return true;
  1184. }
  1185. return true;
  1186. }
  1187. static void atl1_tx_map(struct atl1_adapter *adapter,
  1188. struct sk_buff *skb, bool tcp_seg)
  1189. {
  1190. /* We enter this function holding a spinlock. */
  1191. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1192. struct atl1_buffer *buffer_info;
  1193. struct page *page;
  1194. int first_buf_len = skb->len;
  1195. unsigned long offset;
  1196. unsigned int nr_frags;
  1197. unsigned int f;
  1198. u16 tpd_next_to_use;
  1199. u16 proto_hdr_len;
  1200. u16 i, m, len12;
  1201. first_buf_len -= skb->data_len;
  1202. nr_frags = skb_shinfo(skb)->nr_frags;
  1203. tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1204. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1205. if (unlikely(buffer_info->skb))
  1206. BUG();
  1207. buffer_info->skb = NULL; /* put skb in last TPD */
  1208. if (tcp_seg) {
  1209. /* TSO/GSO */
  1210. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1211. buffer_info->length = proto_hdr_len;
  1212. page = virt_to_page(skb->data);
  1213. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1214. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1215. offset, proto_hdr_len,
  1216. PCI_DMA_TODEVICE);
  1217. if (++tpd_next_to_use == tpd_ring->count)
  1218. tpd_next_to_use = 0;
  1219. if (first_buf_len > proto_hdr_len) {
  1220. len12 = first_buf_len - proto_hdr_len;
  1221. m = (len12 + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1222. for (i = 0; i < m; i++) {
  1223. buffer_info =
  1224. &tpd_ring->buffer_info[tpd_next_to_use];
  1225. buffer_info->skb = NULL;
  1226. buffer_info->length =
  1227. (MAX_TX_BUF_LEN >=
  1228. len12) ? MAX_TX_BUF_LEN : len12;
  1229. len12 -= buffer_info->length;
  1230. page = virt_to_page(skb->data +
  1231. (proto_hdr_len +
  1232. i * MAX_TX_BUF_LEN));
  1233. offset = (unsigned long)(skb->data +
  1234. (proto_hdr_len +
  1235. i * MAX_TX_BUF_LEN)) &
  1236. ~PAGE_MASK;
  1237. buffer_info->dma =
  1238. pci_map_page(adapter->pdev, page, offset,
  1239. buffer_info->length,
  1240. PCI_DMA_TODEVICE);
  1241. if (++tpd_next_to_use == tpd_ring->count)
  1242. tpd_next_to_use = 0;
  1243. }
  1244. }
  1245. } else {
  1246. /* not TSO/GSO */
  1247. buffer_info->length = first_buf_len;
  1248. page = virt_to_page(skb->data);
  1249. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1250. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1251. offset, first_buf_len,
  1252. PCI_DMA_TODEVICE);
  1253. if (++tpd_next_to_use == tpd_ring->count)
  1254. tpd_next_to_use = 0;
  1255. }
  1256. for (f = 0; f < nr_frags; f++) {
  1257. struct skb_frag_struct *frag;
  1258. u16 lenf, i, m;
  1259. frag = &skb_shinfo(skb)->frags[f];
  1260. lenf = frag->size;
  1261. m = (lenf + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1262. for (i = 0; i < m; i++) {
  1263. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1264. if (unlikely(buffer_info->skb))
  1265. BUG();
  1266. buffer_info->skb = NULL;
  1267. buffer_info->length =
  1268. (lenf > MAX_TX_BUF_LEN) ? MAX_TX_BUF_LEN : lenf;
  1269. lenf -= buffer_info->length;
  1270. buffer_info->dma =
  1271. pci_map_page(adapter->pdev, frag->page,
  1272. frag->page_offset + i * MAX_TX_BUF_LEN,
  1273. buffer_info->length, PCI_DMA_TODEVICE);
  1274. if (++tpd_next_to_use == tpd_ring->count)
  1275. tpd_next_to_use = 0;
  1276. }
  1277. }
  1278. /* last tpd's buffer-info */
  1279. buffer_info->skb = skb;
  1280. }
  1281. static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
  1282. union tpd_descr *descr)
  1283. {
  1284. /* We enter this function holding a spinlock. */
  1285. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1286. int j;
  1287. u32 val;
  1288. struct atl1_buffer *buffer_info;
  1289. struct tx_packet_desc *tpd;
  1290. u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1291. for (j = 0; j < count; j++) {
  1292. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1293. tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
  1294. tpd->desc.csum.csumpu = descr->csum.csumpu;
  1295. tpd->desc.csum.csumpl = descr->csum.csumpl;
  1296. tpd->desc.tso.tsopu = descr->tso.tsopu;
  1297. tpd->desc.tso.tsopl = descr->tso.tsopl;
  1298. tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1299. tpd->desc.data = descr->data;
  1300. tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
  1301. CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
  1302. val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
  1303. TSO_PARAM_SEGMENT_MASK;
  1304. if (val && !j)
  1305. tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
  1306. if (j == (count - 1))
  1307. tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
  1308. if (++tpd_next_to_use == tpd_ring->count)
  1309. tpd_next_to_use = 0;
  1310. }
  1311. /*
  1312. * Force memory writes to complete before letting h/w
  1313. * know there are new descriptors to fetch. (Only
  1314. * applicable for weak-ordered memory model archs,
  1315. * such as IA-64).
  1316. */
  1317. wmb();
  1318. atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
  1319. }
  1320. static void atl1_update_mailbox(struct atl1_adapter *adapter)
  1321. {
  1322. unsigned long flags;
  1323. u32 tpd_next_to_use;
  1324. u32 rfd_next_to_use;
  1325. u32 rrd_next_to_clean;
  1326. u32 value;
  1327. spin_lock_irqsave(&adapter->mb_lock, flags);
  1328. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  1329. rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
  1330. rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
  1331. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  1332. MB_RFD_PROD_INDX_SHIFT) |
  1333. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  1334. MB_RRD_CONS_INDX_SHIFT) |
  1335. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  1336. MB_TPD_PROD_INDX_SHIFT);
  1337. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  1338. spin_unlock_irqrestore(&adapter->mb_lock, flags);
  1339. }
  1340. static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1341. {
  1342. struct atl1_adapter *adapter = netdev_priv(netdev);
  1343. int len = skb->len;
  1344. int tso;
  1345. int count = 1;
  1346. int ret_val;
  1347. u32 val;
  1348. union tpd_descr param;
  1349. u16 frag_size;
  1350. u16 vlan_tag;
  1351. unsigned long flags;
  1352. unsigned int nr_frags = 0;
  1353. unsigned int mss = 0;
  1354. unsigned int f;
  1355. unsigned int proto_hdr_len;
  1356. len -= skb->data_len;
  1357. if (unlikely(skb->len == 0)) {
  1358. dev_kfree_skb_any(skb);
  1359. return NETDEV_TX_OK;
  1360. }
  1361. param.data = 0;
  1362. param.tso.tsopu = 0;
  1363. param.tso.tsopl = 0;
  1364. param.csum.csumpu = 0;
  1365. param.csum.csumpl = 0;
  1366. /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
  1367. nr_frags = skb_shinfo(skb)->nr_frags;
  1368. for (f = 0; f < nr_frags; f++) {
  1369. frag_size = skb_shinfo(skb)->frags[f].size;
  1370. if (frag_size)
  1371. count +=
  1372. (frag_size + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1373. }
  1374. /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
  1375. mss = skb_shinfo(skb)->gso_size;
  1376. if (mss) {
  1377. if (skb->protocol == htons(ETH_P_IP)) {
  1378. proto_hdr_len = (skb_transport_offset(skb) +
  1379. tcp_hdrlen(skb));
  1380. if (unlikely(proto_hdr_len > len)) {
  1381. dev_kfree_skb_any(skb);
  1382. return NETDEV_TX_OK;
  1383. }
  1384. /* need additional TPD ? */
  1385. if (proto_hdr_len != len)
  1386. count += (len - proto_hdr_len +
  1387. MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1388. }
  1389. }
  1390. local_irq_save(flags);
  1391. if (!spin_trylock(&adapter->lock)) {
  1392. /* Can't get lock - tell upper layer to requeue */
  1393. local_irq_restore(flags);
  1394. printk(KERN_DEBUG "%s: TX locked\n", atl1_driver_name);
  1395. return NETDEV_TX_LOCKED;
  1396. }
  1397. if (tpd_avail(&adapter->tpd_ring) < count) {
  1398. /* not enough descriptors */
  1399. netif_stop_queue(netdev);
  1400. spin_unlock_irqrestore(&adapter->lock, flags);
  1401. printk(KERN_DEBUG "%s: TX busy\n", atl1_driver_name);
  1402. return NETDEV_TX_BUSY;
  1403. }
  1404. param.data = 0;
  1405. if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1406. vlan_tag = vlan_tx_tag_get(skb);
  1407. vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
  1408. ((vlan_tag >> 9) & 0x8);
  1409. param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
  1410. param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
  1411. CSUM_PARAM_VALAN_SHIFT;
  1412. }
  1413. tso = atl1_tso(adapter, skb, &param.tso);
  1414. if (tso < 0) {
  1415. spin_unlock_irqrestore(&adapter->lock, flags);
  1416. dev_kfree_skb_any(skb);
  1417. return NETDEV_TX_OK;
  1418. }
  1419. if (!tso) {
  1420. ret_val = atl1_tx_csum(adapter, skb, &param.csum);
  1421. if (ret_val < 0) {
  1422. spin_unlock_irqrestore(&adapter->lock, flags);
  1423. dev_kfree_skb_any(skb);
  1424. return NETDEV_TX_OK;
  1425. }
  1426. }
  1427. val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
  1428. CSUM_PARAM_SEGMENT_MASK;
  1429. atl1_tx_map(adapter, skb, 1 == val);
  1430. atl1_tx_queue(adapter, count, &param);
  1431. netdev->trans_start = jiffies;
  1432. spin_unlock_irqrestore(&adapter->lock, flags);
  1433. atl1_update_mailbox(adapter);
  1434. return NETDEV_TX_OK;
  1435. }
  1436. /*
  1437. * atl1_get_stats - Get System Network Statistics
  1438. * @netdev: network interface device structure
  1439. *
  1440. * Returns the address of the device statistics structure.
  1441. * The statistics are actually updated from the timer callback.
  1442. */
  1443. static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
  1444. {
  1445. struct atl1_adapter *adapter = netdev_priv(netdev);
  1446. return &adapter->net_stats;
  1447. }
  1448. /*
  1449. * atl1_clean_rx_ring - Free RFD Buffers
  1450. * @adapter: board private structure
  1451. */
  1452. static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
  1453. {
  1454. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1455. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1456. struct atl1_buffer *buffer_info;
  1457. struct pci_dev *pdev = adapter->pdev;
  1458. unsigned long size;
  1459. unsigned int i;
  1460. /* Free all the Rx ring sk_buffs */
  1461. for (i = 0; i < rfd_ring->count; i++) {
  1462. buffer_info = &rfd_ring->buffer_info[i];
  1463. if (buffer_info->dma) {
  1464. pci_unmap_page(pdev,
  1465. buffer_info->dma,
  1466. buffer_info->length,
  1467. PCI_DMA_FROMDEVICE);
  1468. buffer_info->dma = 0;
  1469. }
  1470. if (buffer_info->skb) {
  1471. dev_kfree_skb(buffer_info->skb);
  1472. buffer_info->skb = NULL;
  1473. }
  1474. }
  1475. size = sizeof(struct atl1_buffer) * rfd_ring->count;
  1476. memset(rfd_ring->buffer_info, 0, size);
  1477. /* Zero out the descriptor ring */
  1478. memset(rfd_ring->desc, 0, rfd_ring->size);
  1479. rfd_ring->next_to_clean = 0;
  1480. atomic_set(&rfd_ring->next_to_use, 0);
  1481. rrd_ring->next_to_use = 0;
  1482. atomic_set(&rrd_ring->next_to_clean, 0);
  1483. }
  1484. /*
  1485. * atl1_clean_tx_ring - Free Tx Buffers
  1486. * @adapter: board private structure
  1487. */
  1488. static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
  1489. {
  1490. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1491. struct atl1_buffer *buffer_info;
  1492. struct pci_dev *pdev = adapter->pdev;
  1493. unsigned long size;
  1494. unsigned int i;
  1495. /* Free all the Tx ring sk_buffs */
  1496. for (i = 0; i < tpd_ring->count; i++) {
  1497. buffer_info = &tpd_ring->buffer_info[i];
  1498. if (buffer_info->dma) {
  1499. pci_unmap_page(pdev, buffer_info->dma,
  1500. buffer_info->length, PCI_DMA_TODEVICE);
  1501. buffer_info->dma = 0;
  1502. }
  1503. }
  1504. for (i = 0; i < tpd_ring->count; i++) {
  1505. buffer_info = &tpd_ring->buffer_info[i];
  1506. if (buffer_info->skb) {
  1507. dev_kfree_skb_any(buffer_info->skb);
  1508. buffer_info->skb = NULL;
  1509. }
  1510. }
  1511. size = sizeof(struct atl1_buffer) * tpd_ring->count;
  1512. memset(tpd_ring->buffer_info, 0, size);
  1513. /* Zero out the descriptor ring */
  1514. memset(tpd_ring->desc, 0, tpd_ring->size);
  1515. atomic_set(&tpd_ring->next_to_use, 0);
  1516. atomic_set(&tpd_ring->next_to_clean, 0);
  1517. }
  1518. /*
  1519. * atl1_free_ring_resources - Free Tx / RX descriptor Resources
  1520. * @adapter: board private structure
  1521. *
  1522. * Free all transmit software resources
  1523. */
  1524. void atl1_free_ring_resources(struct atl1_adapter *adapter)
  1525. {
  1526. struct pci_dev *pdev = adapter->pdev;
  1527. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1528. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1529. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1530. struct atl1_ring_header *ring_header = &adapter->ring_header;
  1531. atl1_clean_tx_ring(adapter);
  1532. atl1_clean_rx_ring(adapter);
  1533. kfree(tpd_ring->buffer_info);
  1534. pci_free_consistent(pdev, ring_header->size, ring_header->desc,
  1535. ring_header->dma);
  1536. tpd_ring->buffer_info = NULL;
  1537. tpd_ring->desc = NULL;
  1538. tpd_ring->dma = 0;
  1539. rfd_ring->buffer_info = NULL;
  1540. rfd_ring->desc = NULL;
  1541. rfd_ring->dma = 0;
  1542. rrd_ring->desc = NULL;
  1543. rrd_ring->dma = 0;
  1544. }
  1545. s32 atl1_up(struct atl1_adapter *adapter)
  1546. {
  1547. struct net_device *netdev = adapter->netdev;
  1548. int err;
  1549. int irq_flags = IRQF_SAMPLE_RANDOM;
  1550. /* hardware has been reset, we need to reload some things */
  1551. atl1_set_multi(netdev);
  1552. atl1_restore_vlan(adapter);
  1553. err = atl1_alloc_rx_buffers(adapter);
  1554. if (unlikely(!err)) /* no RX BUFFER allocated */
  1555. return -ENOMEM;
  1556. if (unlikely(atl1_configure(adapter))) {
  1557. err = -EIO;
  1558. goto err_up;
  1559. }
  1560. err = pci_enable_msi(adapter->pdev);
  1561. if (err) {
  1562. dev_info(&adapter->pdev->dev,
  1563. "Unable to enable MSI: %d\n", err);
  1564. irq_flags |= IRQF_SHARED;
  1565. }
  1566. err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
  1567. netdev->name, netdev);
  1568. if (unlikely(err))
  1569. goto err_up;
  1570. mod_timer(&adapter->watchdog_timer, jiffies);
  1571. atl1_irq_enable(adapter);
  1572. atl1_check_link(adapter);
  1573. return 0;
  1574. /* FIXME: unreachable code! -- CHS */
  1575. /* free irq disable any interrupt */
  1576. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1577. free_irq(adapter->pdev->irq, netdev);
  1578. err_up:
  1579. pci_disable_msi(adapter->pdev);
  1580. /* free rx_buffers */
  1581. atl1_clean_rx_ring(adapter);
  1582. return err;
  1583. }
  1584. void atl1_down(struct atl1_adapter *adapter)
  1585. {
  1586. struct net_device *netdev = adapter->netdev;
  1587. del_timer_sync(&adapter->watchdog_timer);
  1588. del_timer_sync(&adapter->phy_config_timer);
  1589. adapter->phy_timer_pending = false;
  1590. atl1_irq_disable(adapter);
  1591. free_irq(adapter->pdev->irq, netdev);
  1592. pci_disable_msi(adapter->pdev);
  1593. atl1_reset_hw(&adapter->hw);
  1594. adapter->cmb.cmb->int_stats = 0;
  1595. adapter->link_speed = SPEED_0;
  1596. adapter->link_duplex = -1;
  1597. netif_carrier_off(netdev);
  1598. netif_stop_queue(netdev);
  1599. atl1_clean_tx_ring(adapter);
  1600. atl1_clean_rx_ring(adapter);
  1601. }
  1602. /*
  1603. * atl1_change_mtu - Change the Maximum Transfer Unit
  1604. * @netdev: network interface device structure
  1605. * @new_mtu: new value for maximum frame size
  1606. *
  1607. * Returns 0 on success, negative on failure
  1608. */
  1609. static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
  1610. {
  1611. struct atl1_adapter *adapter = netdev_priv(netdev);
  1612. int old_mtu = netdev->mtu;
  1613. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1614. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  1615. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  1616. printk(KERN_WARNING "%s: invalid MTU setting\n",
  1617. atl1_driver_name);
  1618. return -EINVAL;
  1619. }
  1620. adapter->hw.max_frame_size = max_frame;
  1621. adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
  1622. adapter->rx_buffer_len = (max_frame + 7) & ~7;
  1623. adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
  1624. netdev->mtu = new_mtu;
  1625. if ((old_mtu != new_mtu) && netif_running(netdev)) {
  1626. atl1_down(adapter);
  1627. atl1_up(adapter);
  1628. }
  1629. return 0;
  1630. }
  1631. /*
  1632. * atl1_set_mac - Change the Ethernet Address of the NIC
  1633. * @netdev: network interface device structure
  1634. * @p: pointer to an address structure
  1635. *
  1636. * Returns 0 on success, negative on failure
  1637. */
  1638. static int atl1_set_mac(struct net_device *netdev, void *p)
  1639. {
  1640. struct atl1_adapter *adapter = netdev_priv(netdev);
  1641. struct sockaddr *addr = p;
  1642. if (netif_running(netdev))
  1643. return -EBUSY;
  1644. if (!is_valid_ether_addr(addr->sa_data))
  1645. return -EADDRNOTAVAIL;
  1646. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1647. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1648. atl1_set_mac_addr(&adapter->hw);
  1649. return 0;
  1650. }
  1651. /*
  1652. * atl1_watchdog - Timer Call-back
  1653. * @data: pointer to netdev cast into an unsigned long
  1654. */
  1655. static void atl1_watchdog(unsigned long data)
  1656. {
  1657. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1658. /* Reset the timer */
  1659. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1660. }
  1661. static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  1662. {
  1663. struct atl1_adapter *adapter = netdev_priv(netdev);
  1664. u16 result;
  1665. atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
  1666. return result;
  1667. }
  1668. static void mdio_write(struct net_device *netdev, int phy_id, int reg_num, int val)
  1669. {
  1670. struct atl1_adapter *adapter = netdev_priv(netdev);
  1671. atl1_write_phy_reg(&adapter->hw, reg_num, val);
  1672. }
  1673. /*
  1674. * atl1_mii_ioctl -
  1675. * @netdev:
  1676. * @ifreq:
  1677. * @cmd:
  1678. */
  1679. static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1680. {
  1681. struct atl1_adapter *adapter = netdev_priv(netdev);
  1682. unsigned long flags;
  1683. int retval;
  1684. if (!netif_running(netdev))
  1685. return -EINVAL;
  1686. spin_lock_irqsave(&adapter->lock, flags);
  1687. retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
  1688. spin_unlock_irqrestore(&adapter->lock, flags);
  1689. return retval;
  1690. }
  1691. /*
  1692. * atl1_ioctl -
  1693. * @netdev:
  1694. * @ifreq:
  1695. * @cmd:
  1696. */
  1697. static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1698. {
  1699. switch (cmd) {
  1700. case SIOCGMIIPHY:
  1701. case SIOCGMIIREG:
  1702. case SIOCSMIIREG:
  1703. return atl1_mii_ioctl(netdev, ifr, cmd);
  1704. default:
  1705. return -EOPNOTSUPP;
  1706. }
  1707. }
  1708. /*
  1709. * atl1_tx_timeout - Respond to a Tx Hang
  1710. * @netdev: network interface device structure
  1711. */
  1712. static void atl1_tx_timeout(struct net_device *netdev)
  1713. {
  1714. struct atl1_adapter *adapter = netdev_priv(netdev);
  1715. /* Do the reset outside of interrupt context */
  1716. schedule_work(&adapter->tx_timeout_task);
  1717. }
  1718. /*
  1719. * atl1_phy_config - Timer Call-back
  1720. * @data: pointer to netdev cast into an unsigned long
  1721. */
  1722. static void atl1_phy_config(unsigned long data)
  1723. {
  1724. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1725. struct atl1_hw *hw = &adapter->hw;
  1726. unsigned long flags;
  1727. spin_lock_irqsave(&adapter->lock, flags);
  1728. adapter->phy_timer_pending = false;
  1729. atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
  1730. atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
  1731. atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
  1732. spin_unlock_irqrestore(&adapter->lock, flags);
  1733. }
  1734. int atl1_reset(struct atl1_adapter *adapter)
  1735. {
  1736. int ret;
  1737. ret = atl1_reset_hw(&adapter->hw);
  1738. if (ret != ATL1_SUCCESS)
  1739. return ret;
  1740. return atl1_init_hw(&adapter->hw);
  1741. }
  1742. /*
  1743. * atl1_open - Called when a network interface is made active
  1744. * @netdev: network interface device structure
  1745. *
  1746. * Returns 0 on success, negative value on failure
  1747. *
  1748. * The open entry point is called when a network interface is made
  1749. * active by the system (IFF_UP). At this point all resources needed
  1750. * for transmit and receive operations are allocated, the interrupt
  1751. * handler is registered with the OS, the watchdog timer is started,
  1752. * and the stack is notified that the interface is ready.
  1753. */
  1754. static int atl1_open(struct net_device *netdev)
  1755. {
  1756. struct atl1_adapter *adapter = netdev_priv(netdev);
  1757. int err;
  1758. /* allocate transmit descriptors */
  1759. err = atl1_setup_ring_resources(adapter);
  1760. if (err)
  1761. return err;
  1762. err = atl1_up(adapter);
  1763. if (err)
  1764. goto err_up;
  1765. return 0;
  1766. err_up:
  1767. atl1_reset(adapter);
  1768. return err;
  1769. }
  1770. /*
  1771. * atl1_close - Disables a network interface
  1772. * @netdev: network interface device structure
  1773. *
  1774. * Returns 0, this is not allowed to fail
  1775. *
  1776. * The close entry point is called when an interface is de-activated
  1777. * by the OS. The hardware is still under the drivers control, but
  1778. * needs to be disabled. A global MAC reset is issued to stop the
  1779. * hardware, and all transmit and receive resources are freed.
  1780. */
  1781. static int atl1_close(struct net_device *netdev)
  1782. {
  1783. struct atl1_adapter *adapter = netdev_priv(netdev);
  1784. atl1_down(adapter);
  1785. atl1_free_ring_resources(adapter);
  1786. return 0;
  1787. }
  1788. /*
  1789. * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
  1790. * will assert. We do soft reset <0x1400=1> according
  1791. * with the SPEC. BUT, it seemes that PCIE or DMA
  1792. * state-machine will not be reset. DMAR_TO_INT will
  1793. * assert again and again.
  1794. */
  1795. static void atl1_tx_timeout_task(struct work_struct *work)
  1796. {
  1797. struct atl1_adapter *adapter =
  1798. container_of(work, struct atl1_adapter, tx_timeout_task);
  1799. struct net_device *netdev = adapter->netdev;
  1800. netif_device_detach(netdev);
  1801. atl1_down(adapter);
  1802. atl1_up(adapter);
  1803. netif_device_attach(netdev);
  1804. }
  1805. /*
  1806. * atl1_link_chg_task - deal with link change event Out of interrupt context
  1807. */
  1808. static void atl1_link_chg_task(struct work_struct *work)
  1809. {
  1810. struct atl1_adapter *adapter =
  1811. container_of(work, struct atl1_adapter, link_chg_task);
  1812. unsigned long flags;
  1813. spin_lock_irqsave(&adapter->lock, flags);
  1814. atl1_check_link(adapter);
  1815. spin_unlock_irqrestore(&adapter->lock, flags);
  1816. }
  1817. /*
  1818. * atl1_pcie_patch - Patch for PCIE module
  1819. */
  1820. static void atl1_pcie_patch(struct atl1_adapter *adapter)
  1821. {
  1822. u32 value;
  1823. value = 0x6500;
  1824. iowrite32(value, adapter->hw.hw_addr + 0x12FC);
  1825. /* pcie flow control mode change */
  1826. value = ioread32(adapter->hw.hw_addr + 0x1008);
  1827. value |= 0x8000;
  1828. iowrite32(value, adapter->hw.hw_addr + 0x1008);
  1829. }
  1830. /*
  1831. * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
  1832. * on PCI Command register is disable.
  1833. * The function enable this bit.
  1834. * Brackett, 2006/03/15
  1835. */
  1836. static void atl1_via_workaround(struct atl1_adapter *adapter)
  1837. {
  1838. unsigned long value;
  1839. value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
  1840. if (value & PCI_COMMAND_INTX_DISABLE)
  1841. value &= ~PCI_COMMAND_INTX_DISABLE;
  1842. iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
  1843. }
  1844. /*
  1845. * atl1_probe - Device Initialization Routine
  1846. * @pdev: PCI device information struct
  1847. * @ent: entry in atl1_pci_tbl
  1848. *
  1849. * Returns 0 on success, negative on failure
  1850. *
  1851. * atl1_probe initializes an adapter identified by a pci_dev structure.
  1852. * The OS initialization, configuring of the adapter private structure,
  1853. * and a hardware reset occur.
  1854. */
  1855. static int __devinit atl1_probe(struct pci_dev *pdev,
  1856. const struct pci_device_id *ent)
  1857. {
  1858. struct net_device *netdev;
  1859. struct atl1_adapter *adapter;
  1860. static int cards_found = 0;
  1861. bool pci_using_64 = true;
  1862. int err;
  1863. err = pci_enable_device(pdev);
  1864. if (err)
  1865. return err;
  1866. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1867. if (err) {
  1868. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1869. if (err) {
  1870. printk(KERN_DEBUG
  1871. "%s: no usable DMA configuration, aborting\n",
  1872. atl1_driver_name);
  1873. goto err_dma;
  1874. }
  1875. pci_using_64 = false;
  1876. }
  1877. /* Mark all PCI regions associated with PCI device
  1878. * pdev as being reserved by owner atl1_driver_name
  1879. */
  1880. err = pci_request_regions(pdev, atl1_driver_name);
  1881. if (err)
  1882. goto err_request_regions;
  1883. /* Enables bus-mastering on the device and calls
  1884. * pcibios_set_master to do the needed arch specific settings
  1885. */
  1886. pci_set_master(pdev);
  1887. netdev = alloc_etherdev(sizeof(struct atl1_adapter));
  1888. if (!netdev) {
  1889. err = -ENOMEM;
  1890. goto err_alloc_etherdev;
  1891. }
  1892. SET_MODULE_OWNER(netdev);
  1893. SET_NETDEV_DEV(netdev, &pdev->dev);
  1894. pci_set_drvdata(pdev, netdev);
  1895. adapter = netdev_priv(netdev);
  1896. adapter->netdev = netdev;
  1897. adapter->pdev = pdev;
  1898. adapter->hw.back = adapter;
  1899. adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
  1900. if (!adapter->hw.hw_addr) {
  1901. err = -EIO;
  1902. goto err_pci_iomap;
  1903. }
  1904. /* get device revision number */
  1905. adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr + (REG_MASTER_CTRL + 2));
  1906. /* set default ring resource counts */
  1907. adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
  1908. adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
  1909. adapter->mii.dev = netdev;
  1910. adapter->mii.mdio_read = mdio_read;
  1911. adapter->mii.mdio_write = mdio_write;
  1912. adapter->mii.phy_id_mask = 0x1f;
  1913. adapter->mii.reg_num_mask = 0x1f;
  1914. netdev->open = &atl1_open;
  1915. netdev->stop = &atl1_close;
  1916. netdev->hard_start_xmit = &atl1_xmit_frame;
  1917. netdev->get_stats = &atl1_get_stats;
  1918. netdev->set_multicast_list = &atl1_set_multi;
  1919. netdev->set_mac_address = &atl1_set_mac;
  1920. netdev->change_mtu = &atl1_change_mtu;
  1921. netdev->do_ioctl = &atl1_ioctl;
  1922. netdev->tx_timeout = &atl1_tx_timeout;
  1923. netdev->watchdog_timeo = 5 * HZ;
  1924. netdev->vlan_rx_register = atl1_vlan_rx_register;
  1925. netdev->vlan_rx_add_vid = atl1_vlan_rx_add_vid;
  1926. netdev->vlan_rx_kill_vid = atl1_vlan_rx_kill_vid;
  1927. netdev->ethtool_ops = &atl1_ethtool_ops;
  1928. adapter->bd_number = cards_found;
  1929. adapter->pci_using_64 = pci_using_64;
  1930. /* setup the private structure */
  1931. err = atl1_sw_init(adapter);
  1932. if (err)
  1933. goto err_common;
  1934. netdev->features = NETIF_F_HW_CSUM;
  1935. netdev->features |= NETIF_F_SG;
  1936. netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
  1937. /*
  1938. * FIXME - Until tso performance gets fixed, disable the feature.
  1939. * Enable it with ethtool -K if desired.
  1940. */
  1941. /* netdev->features |= NETIF_F_TSO; */
  1942. if (pci_using_64)
  1943. netdev->features |= NETIF_F_HIGHDMA;
  1944. netdev->features |= NETIF_F_LLTX;
  1945. /*
  1946. * patch for some L1 of old version,
  1947. * the final version of L1 may not need these
  1948. * patches
  1949. */
  1950. /* atl1_pcie_patch(adapter); */
  1951. /* really reset GPHY core */
  1952. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  1953. /*
  1954. * reset the controller to
  1955. * put the device in a known good starting state
  1956. */
  1957. if (atl1_reset_hw(&adapter->hw)) {
  1958. err = -EIO;
  1959. goto err_common;
  1960. }
  1961. /* copy the MAC address out of the EEPROM */
  1962. atl1_read_mac_addr(&adapter->hw);
  1963. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  1964. if (!is_valid_ether_addr(netdev->dev_addr)) {
  1965. err = -EIO;
  1966. goto err_common;
  1967. }
  1968. atl1_check_options(adapter);
  1969. /* pre-init the MAC, and setup link */
  1970. err = atl1_init_hw(&adapter->hw);
  1971. if (err) {
  1972. err = -EIO;
  1973. goto err_common;
  1974. }
  1975. atl1_pcie_patch(adapter);
  1976. /* assume we have no link for now */
  1977. netif_carrier_off(netdev);
  1978. netif_stop_queue(netdev);
  1979. init_timer(&adapter->watchdog_timer);
  1980. adapter->watchdog_timer.function = &atl1_watchdog;
  1981. adapter->watchdog_timer.data = (unsigned long)adapter;
  1982. init_timer(&adapter->phy_config_timer);
  1983. adapter->phy_config_timer.function = &atl1_phy_config;
  1984. adapter->phy_config_timer.data = (unsigned long)adapter;
  1985. adapter->phy_timer_pending = false;
  1986. INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
  1987. INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
  1988. INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
  1989. err = register_netdev(netdev);
  1990. if (err)
  1991. goto err_common;
  1992. cards_found++;
  1993. atl1_via_workaround(adapter);
  1994. return 0;
  1995. err_common:
  1996. pci_iounmap(pdev, adapter->hw.hw_addr);
  1997. err_pci_iomap:
  1998. free_netdev(netdev);
  1999. err_alloc_etherdev:
  2000. pci_release_regions(pdev);
  2001. err_dma:
  2002. err_request_regions:
  2003. pci_disable_device(pdev);
  2004. return err;
  2005. }
  2006. /*
  2007. * atl1_remove - Device Removal Routine
  2008. * @pdev: PCI device information struct
  2009. *
  2010. * atl1_remove is called by the PCI subsystem to alert the driver
  2011. * that it should release a PCI device. The could be caused by a
  2012. * Hot-Plug event, or because the driver is going to be removed from
  2013. * memory.
  2014. */
  2015. static void __devexit atl1_remove(struct pci_dev *pdev)
  2016. {
  2017. struct net_device *netdev = pci_get_drvdata(pdev);
  2018. struct atl1_adapter *adapter;
  2019. /* Device not available. Return. */
  2020. if (!netdev)
  2021. return;
  2022. adapter = netdev_priv(netdev);
  2023. /* Some atl1 boards lack persistent storage for their MAC, and get it
  2024. * from the BIOS during POST. If we've been messing with the MAC
  2025. * address, we need to save the permanent one.
  2026. */
  2027. if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
  2028. memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN);
  2029. atl1_set_mac_addr(&adapter->hw);
  2030. }
  2031. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2032. unregister_netdev(netdev);
  2033. pci_iounmap(pdev, adapter->hw.hw_addr);
  2034. pci_release_regions(pdev);
  2035. free_netdev(netdev);
  2036. pci_disable_device(pdev);
  2037. }
  2038. #ifdef CONFIG_PM
  2039. static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
  2040. {
  2041. struct net_device *netdev = pci_get_drvdata(pdev);
  2042. struct atl1_adapter *adapter = netdev_priv(netdev);
  2043. struct atl1_hw *hw = &adapter->hw;
  2044. u32 ctrl = 0;
  2045. u32 wufc = adapter->wol;
  2046. netif_device_detach(netdev);
  2047. if (netif_running(netdev))
  2048. atl1_down(adapter);
  2049. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2050. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2051. if (ctrl & BMSR_LSTATUS)
  2052. wufc &= ~ATL1_WUFC_LNKC;
  2053. /* reduce speed to 10/100M */
  2054. if (wufc) {
  2055. atl1_phy_enter_power_saving(hw);
  2056. /* if resume, let driver to re- setup link */
  2057. hw->phy_configured = false;
  2058. atl1_set_mac_addr(hw);
  2059. atl1_set_multi(netdev);
  2060. ctrl = 0;
  2061. /* turn on magic packet wol */
  2062. if (wufc & ATL1_WUFC_MAG)
  2063. ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  2064. /* turn on Link change WOL */
  2065. if (wufc & ATL1_WUFC_LNKC)
  2066. ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
  2067. iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
  2068. /* turn on all-multi mode if wake on multicast is enabled */
  2069. ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  2070. ctrl &= ~MAC_CTRL_DBG;
  2071. ctrl &= ~MAC_CTRL_PROMIS_EN;
  2072. if (wufc & ATL1_WUFC_MC)
  2073. ctrl |= MAC_CTRL_MC_ALL_EN;
  2074. else
  2075. ctrl &= ~MAC_CTRL_MC_ALL_EN;
  2076. /* turn on broadcast mode if wake on-BC is enabled */
  2077. if (wufc & ATL1_WUFC_BC)
  2078. ctrl |= MAC_CTRL_BC_EN;
  2079. else
  2080. ctrl &= ~MAC_CTRL_BC_EN;
  2081. /* enable RX */
  2082. ctrl |= MAC_CTRL_RX_EN;
  2083. iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
  2084. pci_enable_wake(pdev, PCI_D3hot, 1);
  2085. pci_enable_wake(pdev, PCI_D3cold, 1); /* 4 == D3 cold */
  2086. } else {
  2087. iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
  2088. pci_enable_wake(pdev, PCI_D3hot, 0);
  2089. pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  2090. }
  2091. pci_save_state(pdev);
  2092. pci_disable_device(pdev);
  2093. pci_set_power_state(pdev, PCI_D3hot);
  2094. return 0;
  2095. }
  2096. static int atl1_resume(struct pci_dev *pdev)
  2097. {
  2098. struct net_device *netdev = pci_get_drvdata(pdev);
  2099. struct atl1_adapter *adapter = netdev_priv(netdev);
  2100. u32 ret_val;
  2101. pci_set_power_state(pdev, 0);
  2102. pci_restore_state(pdev);
  2103. ret_val = pci_enable_device(pdev);
  2104. pci_enable_wake(pdev, PCI_D3hot, 0);
  2105. pci_enable_wake(pdev, PCI_D3cold, 0);
  2106. iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
  2107. atl1_reset(adapter);
  2108. if (netif_running(netdev))
  2109. atl1_up(adapter);
  2110. netif_device_attach(netdev);
  2111. atl1_via_workaround(adapter);
  2112. return 0;
  2113. }
  2114. #else
  2115. #define atl1_suspend NULL
  2116. #define atl1_resume NULL
  2117. #endif
  2118. static struct pci_driver atl1_driver = {
  2119. .name = atl1_driver_name,
  2120. .id_table = atl1_pci_tbl,
  2121. .probe = atl1_probe,
  2122. .remove = __devexit_p(atl1_remove),
  2123. /* Power Managment Hooks */
  2124. /* probably broken right now -- CHS */
  2125. .suspend = atl1_suspend,
  2126. .resume = atl1_resume
  2127. };
  2128. /*
  2129. * atl1_exit_module - Driver Exit Cleanup Routine
  2130. *
  2131. * atl1_exit_module is called just before the driver is removed
  2132. * from memory.
  2133. */
  2134. static void __exit atl1_exit_module(void)
  2135. {
  2136. pci_unregister_driver(&atl1_driver);
  2137. }
  2138. /*
  2139. * atl1_init_module - Driver Registration Routine
  2140. *
  2141. * atl1_init_module is the first routine called when the driver is
  2142. * loaded. All it does is register with the PCI subsystem.
  2143. */
  2144. static int __init atl1_init_module(void)
  2145. {
  2146. printk(KERN_INFO "%s - version %s\n", atl1_driver_string, DRIVER_VERSION);
  2147. printk(KERN_INFO "%s\n", atl1_copyright);
  2148. return pci_register_driver(&atl1_driver);
  2149. }
  2150. module_init(atl1_init_module);
  2151. module_exit(atl1_exit_module);