synclink_cs.c 110 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/seq_file.h>
  52. #include <linux/slab.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/vmalloc.h>
  55. #include <linux/init.h>
  56. #include <linux/delay.h>
  57. #include <linux/ioctl.h>
  58. #include <linux/synclink.h>
  59. #include <asm/system.h>
  60. #include <asm/io.h>
  61. #include <asm/irq.h>
  62. #include <asm/dma.h>
  63. #include <linux/bitops.h>
  64. #include <asm/types.h>
  65. #include <linux/termios.h>
  66. #include <linux/workqueue.h>
  67. #include <linux/hdlc.h>
  68. #include <pcmcia/cistpl.h>
  69. #include <pcmcia/cisreg.h>
  70. #include <pcmcia/ds.h>
  71. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  72. #define SYNCLINK_GENERIC_HDLC 1
  73. #else
  74. #define SYNCLINK_GENERIC_HDLC 0
  75. #endif
  76. #define GET_USER(error,value,addr) error = get_user(value,addr)
  77. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  78. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  79. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  80. #include <asm/uaccess.h>
  81. static MGSL_PARAMS default_params = {
  82. MGSL_MODE_HDLC, /* unsigned long mode */
  83. 0, /* unsigned char loopback; */
  84. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  85. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  86. 0, /* unsigned long clock_speed; */
  87. 0xff, /* unsigned char addr_filter; */
  88. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  89. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  90. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  91. 9600, /* unsigned long data_rate; */
  92. 8, /* unsigned char data_bits; */
  93. 1, /* unsigned char stop_bits; */
  94. ASYNC_PARITY_NONE /* unsigned char parity; */
  95. };
  96. typedef struct
  97. {
  98. int count;
  99. unsigned char status;
  100. char data[1];
  101. } RXBUF;
  102. /* The queue of BH actions to be performed */
  103. #define BH_RECEIVE 1
  104. #define BH_TRANSMIT 2
  105. #define BH_STATUS 4
  106. #define IO_PIN_SHUTDOWN_LIMIT 100
  107. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  108. struct _input_signal_events {
  109. int ri_up;
  110. int ri_down;
  111. int dsr_up;
  112. int dsr_down;
  113. int dcd_up;
  114. int dcd_down;
  115. int cts_up;
  116. int cts_down;
  117. };
  118. /*
  119. * Device instance data structure
  120. */
  121. typedef struct _mgslpc_info {
  122. struct tty_port port;
  123. void *if_ptr; /* General purpose pointer (used by SPPP) */
  124. int magic;
  125. int line;
  126. struct mgsl_icount icount;
  127. int timeout;
  128. int x_char; /* xon/xoff character */
  129. unsigned char read_status_mask;
  130. unsigned char ignore_status_mask;
  131. unsigned char *tx_buf;
  132. int tx_put;
  133. int tx_get;
  134. int tx_count;
  135. /* circular list of fixed length rx buffers */
  136. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  137. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  138. int rx_put; /* index of next empty rx buffer */
  139. int rx_get; /* index of next full rx buffer */
  140. int rx_buf_size; /* size in bytes of single rx buffer */
  141. int rx_buf_count; /* total number of rx buffers */
  142. int rx_frame_count; /* number of full rx buffers */
  143. wait_queue_head_t status_event_wait_q;
  144. wait_queue_head_t event_wait_q;
  145. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  146. struct _mgslpc_info *next_device; /* device list link */
  147. unsigned short imra_value;
  148. unsigned short imrb_value;
  149. unsigned char pim_value;
  150. spinlock_t lock;
  151. struct work_struct task; /* task structure for scheduling bh */
  152. u32 max_frame_size;
  153. u32 pending_bh;
  154. bool bh_running;
  155. bool bh_requested;
  156. int dcd_chkcount; /* check counts to prevent */
  157. int cts_chkcount; /* too many IRQs if a signal */
  158. int dsr_chkcount; /* is floating */
  159. int ri_chkcount;
  160. bool rx_enabled;
  161. bool rx_overflow;
  162. bool tx_enabled;
  163. bool tx_active;
  164. bool tx_aborting;
  165. u32 idle_mode;
  166. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  167. char device_name[25]; /* device instance name */
  168. unsigned int io_base; /* base I/O address of adapter */
  169. unsigned int irq_level;
  170. MGSL_PARAMS params; /* communications parameters */
  171. unsigned char serial_signals; /* current serial signal states */
  172. bool irq_occurred; /* for diagnostics use */
  173. char testing_irq;
  174. unsigned int init_error; /* startup error (DIAGS) */
  175. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  176. bool drop_rts_on_tx_done;
  177. struct _input_signal_events input_signal_events;
  178. /* PCMCIA support */
  179. struct pcmcia_device *p_dev;
  180. int stop;
  181. /* SPPP/Cisco HDLC device parts */
  182. int netcount;
  183. spinlock_t netlock;
  184. #if SYNCLINK_GENERIC_HDLC
  185. struct net_device *netdev;
  186. #endif
  187. } MGSLPC_INFO;
  188. #define MGSLPC_MAGIC 0x5402
  189. /*
  190. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  191. */
  192. #define TXBUFSIZE 4096
  193. #define CHA 0x00 /* channel A offset */
  194. #define CHB 0x40 /* channel B offset */
  195. /*
  196. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  197. */
  198. #undef PVR
  199. #define RXFIFO 0
  200. #define TXFIFO 0
  201. #define STAR 0x20
  202. #define CMDR 0x20
  203. #define RSTA 0x21
  204. #define PRE 0x21
  205. #define MODE 0x22
  206. #define TIMR 0x23
  207. #define XAD1 0x24
  208. #define XAD2 0x25
  209. #define RAH1 0x26
  210. #define RAH2 0x27
  211. #define DAFO 0x27
  212. #define RAL1 0x28
  213. #define RFC 0x28
  214. #define RHCR 0x29
  215. #define RAL2 0x29
  216. #define RBCL 0x2a
  217. #define XBCL 0x2a
  218. #define RBCH 0x2b
  219. #define XBCH 0x2b
  220. #define CCR0 0x2c
  221. #define CCR1 0x2d
  222. #define CCR2 0x2e
  223. #define CCR3 0x2f
  224. #define VSTR 0x34
  225. #define BGR 0x34
  226. #define RLCR 0x35
  227. #define AML 0x36
  228. #define AMH 0x37
  229. #define GIS 0x38
  230. #define IVA 0x38
  231. #define IPC 0x39
  232. #define ISR 0x3a
  233. #define IMR 0x3a
  234. #define PVR 0x3c
  235. #define PIS 0x3d
  236. #define PIM 0x3d
  237. #define PCR 0x3e
  238. #define CCR4 0x3f
  239. // IMR/ISR
  240. #define IRQ_BREAK_ON BIT15 // rx break detected
  241. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  242. #define IRQ_ALLSENT BIT13 // all sent
  243. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  244. #define IRQ_TIMER BIT11 // timer interrupt
  245. #define IRQ_CTS BIT10 // CTS status change
  246. #define IRQ_TXREPEAT BIT9 // tx message repeat
  247. #define IRQ_TXFIFO BIT8 // transmit pool ready
  248. #define IRQ_RXEOM BIT7 // receive message end
  249. #define IRQ_EXITHUNT BIT6 // receive frame start
  250. #define IRQ_RXTIME BIT6 // rx char timeout
  251. #define IRQ_DCD BIT2 // carrier detect status change
  252. #define IRQ_OVERRUN BIT1 // receive frame overflow
  253. #define IRQ_RXFIFO BIT0 // receive pool full
  254. // STAR
  255. #define XFW BIT6 // transmit FIFO write enable
  256. #define CEC BIT2 // command executing
  257. #define CTS BIT1 // CTS state
  258. #define PVR_DTR BIT0
  259. #define PVR_DSR BIT1
  260. #define PVR_RI BIT2
  261. #define PVR_AUTOCTS BIT3
  262. #define PVR_RS232 0x20 /* 0010b */
  263. #define PVR_V35 0xe0 /* 1110b */
  264. #define PVR_RS422 0x40 /* 0100b */
  265. /* Register access functions */
  266. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  267. #define read_reg(info, reg) inb((info)->io_base + (reg))
  268. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  269. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  270. #define set_reg_bits(info, reg, mask) \
  271. write_reg(info, (reg), \
  272. (unsigned char) (read_reg(info, (reg)) | (mask)))
  273. #define clear_reg_bits(info, reg, mask) \
  274. write_reg(info, (reg), \
  275. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  276. /*
  277. * interrupt enable/disable routines
  278. */
  279. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  280. {
  281. if (channel == CHA) {
  282. info->imra_value |= mask;
  283. write_reg16(info, CHA + IMR, info->imra_value);
  284. } else {
  285. info->imrb_value |= mask;
  286. write_reg16(info, CHB + IMR, info->imrb_value);
  287. }
  288. }
  289. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  290. {
  291. if (channel == CHA) {
  292. info->imra_value &= ~mask;
  293. write_reg16(info, CHA + IMR, info->imra_value);
  294. } else {
  295. info->imrb_value &= ~mask;
  296. write_reg16(info, CHB + IMR, info->imrb_value);
  297. }
  298. }
  299. #define port_irq_disable(info, mask) \
  300. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  301. #define port_irq_enable(info, mask) \
  302. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  303. static void rx_start(MGSLPC_INFO *info);
  304. static void rx_stop(MGSLPC_INFO *info);
  305. static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
  306. static void tx_stop(MGSLPC_INFO *info);
  307. static void tx_set_idle(MGSLPC_INFO *info);
  308. static void get_signals(MGSLPC_INFO *info);
  309. static void set_signals(MGSLPC_INFO *info);
  310. static void reset_device(MGSLPC_INFO *info);
  311. static void hdlc_mode(MGSLPC_INFO *info);
  312. static void async_mode(MGSLPC_INFO *info);
  313. static void tx_timeout(unsigned long context);
  314. static int carrier_raised(struct tty_port *port);
  315. static void dtr_rts(struct tty_port *port, int onoff);
  316. #if SYNCLINK_GENERIC_HDLC
  317. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  318. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  319. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  320. static int hdlcdev_init(MGSLPC_INFO *info);
  321. static void hdlcdev_exit(MGSLPC_INFO *info);
  322. #endif
  323. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  324. static bool register_test(MGSLPC_INFO *info);
  325. static bool irq_test(MGSLPC_INFO *info);
  326. static int adapter_test(MGSLPC_INFO *info);
  327. static int claim_resources(MGSLPC_INFO *info);
  328. static void release_resources(MGSLPC_INFO *info);
  329. static void mgslpc_add_device(MGSLPC_INFO *info);
  330. static void mgslpc_remove_device(MGSLPC_INFO *info);
  331. static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
  332. static void rx_reset_buffers(MGSLPC_INFO *info);
  333. static int rx_alloc_buffers(MGSLPC_INFO *info);
  334. static void rx_free_buffers(MGSLPC_INFO *info);
  335. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  336. /*
  337. * Bottom half interrupt handlers
  338. */
  339. static void bh_handler(struct work_struct *work);
  340. static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
  341. static void bh_status(MGSLPC_INFO *info);
  342. /*
  343. * ioctl handlers
  344. */
  345. static int tiocmget(struct tty_struct *tty, struct file *file);
  346. static int tiocmset(struct tty_struct *tty, struct file *file,
  347. unsigned int set, unsigned int clear);
  348. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  349. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  350. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
  351. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  352. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  353. static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
  354. static int tx_abort(MGSLPC_INFO *info);
  355. static int set_rxenable(MGSLPC_INFO *info, int enable);
  356. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  357. static MGSLPC_INFO *mgslpc_device_list = NULL;
  358. static int mgslpc_device_count = 0;
  359. /*
  360. * Set this param to non-zero to load eax with the
  361. * .text section address and breakpoint on module load.
  362. * This is useful for use with gdb and add-symbol-file command.
  363. */
  364. static int break_on_load=0;
  365. /*
  366. * Driver major number, defaults to zero to get auto
  367. * assigned major number. May be forced as module parameter.
  368. */
  369. static int ttymajor=0;
  370. static int debug_level = 0;
  371. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  372. module_param(break_on_load, bool, 0);
  373. module_param(ttymajor, int, 0);
  374. module_param(debug_level, int, 0);
  375. module_param_array(maxframe, int, NULL, 0);
  376. MODULE_LICENSE("GPL");
  377. static char *driver_name = "SyncLink PC Card driver";
  378. static char *driver_version = "$Revision: 4.34 $";
  379. static struct tty_driver *serial_driver;
  380. /* number of characters left in xmit buffer before we ask for more */
  381. #define WAKEUP_CHARS 256
  382. static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
  383. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  384. /* PCMCIA prototypes */
  385. static int mgslpc_config(struct pcmcia_device *link);
  386. static void mgslpc_release(u_long arg);
  387. static void mgslpc_detach(struct pcmcia_device *p_dev);
  388. /*
  389. * 1st function defined in .text section. Calling this function in
  390. * init_module() followed by a breakpoint allows a remote debugger
  391. * (gdb) to get the .text address for the add-symbol-file command.
  392. * This allows remote debugging of dynamically loadable modules.
  393. */
  394. static void* mgslpc_get_text_ptr(void)
  395. {
  396. return mgslpc_get_text_ptr;
  397. }
  398. /**
  399. * line discipline callback wrappers
  400. *
  401. * The wrappers maintain line discipline references
  402. * while calling into the line discipline.
  403. *
  404. * ldisc_receive_buf - pass receive data to line discipline
  405. */
  406. static void ldisc_receive_buf(struct tty_struct *tty,
  407. const __u8 *data, char *flags, int count)
  408. {
  409. struct tty_ldisc *ld;
  410. if (!tty)
  411. return;
  412. ld = tty_ldisc_ref(tty);
  413. if (ld) {
  414. if (ld->ops->receive_buf)
  415. ld->ops->receive_buf(tty, data, flags, count);
  416. tty_ldisc_deref(ld);
  417. }
  418. }
  419. static const struct tty_port_operations mgslpc_port_ops = {
  420. .carrier_raised = carrier_raised,
  421. .dtr_rts = dtr_rts
  422. };
  423. static int mgslpc_probe(struct pcmcia_device *link)
  424. {
  425. MGSLPC_INFO *info;
  426. int ret;
  427. if (debug_level >= DEBUG_LEVEL_INFO)
  428. printk("mgslpc_attach\n");
  429. info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  430. if (!info) {
  431. printk("Error can't allocate device instance data\n");
  432. return -ENOMEM;
  433. }
  434. info->magic = MGSLPC_MAGIC;
  435. tty_port_init(&info->port);
  436. info->port.ops = &mgslpc_port_ops;
  437. INIT_WORK(&info->task, bh_handler);
  438. info->max_frame_size = 4096;
  439. info->port.close_delay = 5*HZ/10;
  440. info->port.closing_wait = 30*HZ;
  441. init_waitqueue_head(&info->status_event_wait_q);
  442. init_waitqueue_head(&info->event_wait_q);
  443. spin_lock_init(&info->lock);
  444. spin_lock_init(&info->netlock);
  445. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  446. info->idle_mode = HDLC_TXIDLE_FLAGS;
  447. info->imra_value = 0xffff;
  448. info->imrb_value = 0xffff;
  449. info->pim_value = 0xff;
  450. info->p_dev = link;
  451. link->priv = info;
  452. /* Initialize the struct pcmcia_device structure */
  453. ret = mgslpc_config(link);
  454. if (ret)
  455. return ret;
  456. mgslpc_add_device(info);
  457. return 0;
  458. }
  459. /* Card has been inserted.
  460. */
  461. static int mgslpc_ioprobe(struct pcmcia_device *p_dev,
  462. cistpl_cftable_entry_t *cfg,
  463. cistpl_cftable_entry_t *dflt,
  464. unsigned int vcc,
  465. void *priv_data)
  466. {
  467. if (!cfg->io.nwin)
  468. return -ENODEV;
  469. p_dev->resource[0]->start = cfg->io.win[0].base;
  470. p_dev->resource[0]->end = cfg->io.win[0].len;
  471. p_dev->resource[0]->flags |= pcmcia_io_cfg_data_width(cfg->io.flags);
  472. p_dev->io_lines = cfg->io.flags & CISTPL_IO_LINES_MASK;
  473. return pcmcia_request_io(p_dev);
  474. }
  475. static int mgslpc_config(struct pcmcia_device *link)
  476. {
  477. MGSLPC_INFO *info = link->priv;
  478. int ret;
  479. if (debug_level >= DEBUG_LEVEL_INFO)
  480. printk("mgslpc_config(0x%p)\n", link);
  481. ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
  482. if (ret != 0)
  483. goto failed;
  484. link->config_flags |= CONF_ENABLE_IRQ;
  485. link->config_index = 8;
  486. link->config_regs = PRESENT_OPTION;
  487. ret = pcmcia_request_irq(link, mgslpc_isr);
  488. if (ret)
  489. goto failed;
  490. ret = pcmcia_enable_device(link);
  491. if (ret)
  492. goto failed;
  493. info->io_base = link->resource[0]->start;
  494. info->irq_level = link->irq;
  495. dev_info(&link->dev, "index 0x%02x:",
  496. link->config_index);
  497. printk(", irq %d", link->irq);
  498. if (link->resource[0])
  499. printk(", io %pR", link->resource[0]);
  500. printk("\n");
  501. return 0;
  502. failed:
  503. mgslpc_release((u_long)link);
  504. return -ENODEV;
  505. }
  506. /* Card has been removed.
  507. * Unregister device and release PCMCIA configuration.
  508. * If device is open, postpone until it is closed.
  509. */
  510. static void mgslpc_release(u_long arg)
  511. {
  512. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  513. if (debug_level >= DEBUG_LEVEL_INFO)
  514. printk("mgslpc_release(0x%p)\n", link);
  515. pcmcia_disable_device(link);
  516. }
  517. static void mgslpc_detach(struct pcmcia_device *link)
  518. {
  519. if (debug_level >= DEBUG_LEVEL_INFO)
  520. printk("mgslpc_detach(0x%p)\n", link);
  521. ((MGSLPC_INFO *)link->priv)->stop = 1;
  522. mgslpc_release((u_long)link);
  523. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  524. }
  525. static int mgslpc_suspend(struct pcmcia_device *link)
  526. {
  527. MGSLPC_INFO *info = link->priv;
  528. info->stop = 1;
  529. return 0;
  530. }
  531. static int mgslpc_resume(struct pcmcia_device *link)
  532. {
  533. MGSLPC_INFO *info = link->priv;
  534. info->stop = 0;
  535. return 0;
  536. }
  537. static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
  538. char *name, const char *routine)
  539. {
  540. #ifdef MGSLPC_PARANOIA_CHECK
  541. static const char *badmagic =
  542. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  543. static const char *badinfo =
  544. "Warning: null mgslpc_info for (%s) in %s\n";
  545. if (!info) {
  546. printk(badinfo, name, routine);
  547. return true;
  548. }
  549. if (info->magic != MGSLPC_MAGIC) {
  550. printk(badmagic, name, routine);
  551. return true;
  552. }
  553. #else
  554. if (!info)
  555. return true;
  556. #endif
  557. return false;
  558. }
  559. #define CMD_RXFIFO BIT7 // release current rx FIFO
  560. #define CMD_RXRESET BIT6 // receiver reset
  561. #define CMD_RXFIFO_READ BIT5
  562. #define CMD_START_TIMER BIT4
  563. #define CMD_TXFIFO BIT3 // release current tx FIFO
  564. #define CMD_TXEOM BIT1 // transmit end message
  565. #define CMD_TXRESET BIT0 // transmit reset
  566. static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  567. {
  568. int i = 0;
  569. /* wait for command completion */
  570. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  571. udelay(1);
  572. if (i++ == 1000)
  573. return false;
  574. }
  575. return true;
  576. }
  577. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  578. {
  579. wait_command_complete(info, channel);
  580. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  581. }
  582. static void tx_pause(struct tty_struct *tty)
  583. {
  584. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  585. unsigned long flags;
  586. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  587. return;
  588. if (debug_level >= DEBUG_LEVEL_INFO)
  589. printk("tx_pause(%s)\n",info->device_name);
  590. spin_lock_irqsave(&info->lock,flags);
  591. if (info->tx_enabled)
  592. tx_stop(info);
  593. spin_unlock_irqrestore(&info->lock,flags);
  594. }
  595. static void tx_release(struct tty_struct *tty)
  596. {
  597. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  598. unsigned long flags;
  599. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  600. return;
  601. if (debug_level >= DEBUG_LEVEL_INFO)
  602. printk("tx_release(%s)\n",info->device_name);
  603. spin_lock_irqsave(&info->lock,flags);
  604. if (!info->tx_enabled)
  605. tx_start(info, tty);
  606. spin_unlock_irqrestore(&info->lock,flags);
  607. }
  608. /* Return next bottom half action to perform.
  609. * or 0 if nothing to do.
  610. */
  611. static int bh_action(MGSLPC_INFO *info)
  612. {
  613. unsigned long flags;
  614. int rc = 0;
  615. spin_lock_irqsave(&info->lock,flags);
  616. if (info->pending_bh & BH_RECEIVE) {
  617. info->pending_bh &= ~BH_RECEIVE;
  618. rc = BH_RECEIVE;
  619. } else if (info->pending_bh & BH_TRANSMIT) {
  620. info->pending_bh &= ~BH_TRANSMIT;
  621. rc = BH_TRANSMIT;
  622. } else if (info->pending_bh & BH_STATUS) {
  623. info->pending_bh &= ~BH_STATUS;
  624. rc = BH_STATUS;
  625. }
  626. if (!rc) {
  627. /* Mark BH routine as complete */
  628. info->bh_running = false;
  629. info->bh_requested = false;
  630. }
  631. spin_unlock_irqrestore(&info->lock,flags);
  632. return rc;
  633. }
  634. static void bh_handler(struct work_struct *work)
  635. {
  636. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  637. struct tty_struct *tty;
  638. int action;
  639. if (!info)
  640. return;
  641. if (debug_level >= DEBUG_LEVEL_BH)
  642. printk( "%s(%d):bh_handler(%s) entry\n",
  643. __FILE__,__LINE__,info->device_name);
  644. info->bh_running = true;
  645. tty = tty_port_tty_get(&info->port);
  646. while((action = bh_action(info)) != 0) {
  647. /* Process work item */
  648. if ( debug_level >= DEBUG_LEVEL_BH )
  649. printk( "%s(%d):bh_handler() work item action=%d\n",
  650. __FILE__,__LINE__,action);
  651. switch (action) {
  652. case BH_RECEIVE:
  653. while(rx_get_frame(info, tty));
  654. break;
  655. case BH_TRANSMIT:
  656. bh_transmit(info, tty);
  657. break;
  658. case BH_STATUS:
  659. bh_status(info);
  660. break;
  661. default:
  662. /* unknown work item ID */
  663. printk("Unknown work item ID=%08X!\n", action);
  664. break;
  665. }
  666. }
  667. tty_kref_put(tty);
  668. if (debug_level >= DEBUG_LEVEL_BH)
  669. printk( "%s(%d):bh_handler(%s) exit\n",
  670. __FILE__,__LINE__,info->device_name);
  671. }
  672. static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
  673. {
  674. if (debug_level >= DEBUG_LEVEL_BH)
  675. printk("bh_transmit() entry on %s\n", info->device_name);
  676. if (tty)
  677. tty_wakeup(tty);
  678. }
  679. static void bh_status(MGSLPC_INFO *info)
  680. {
  681. info->ri_chkcount = 0;
  682. info->dsr_chkcount = 0;
  683. info->dcd_chkcount = 0;
  684. info->cts_chkcount = 0;
  685. }
  686. /* eom: non-zero = end of frame */
  687. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  688. {
  689. unsigned char data[2];
  690. unsigned char fifo_count, read_count, i;
  691. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  692. if (debug_level >= DEBUG_LEVEL_ISR)
  693. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  694. if (!info->rx_enabled)
  695. return;
  696. if (info->rx_frame_count >= info->rx_buf_count) {
  697. /* no more free buffers */
  698. issue_command(info, CHA, CMD_RXRESET);
  699. info->pending_bh |= BH_RECEIVE;
  700. info->rx_overflow = true;
  701. info->icount.buf_overrun++;
  702. return;
  703. }
  704. if (eom) {
  705. /* end of frame, get FIFO count from RBCL register */
  706. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  707. fifo_count = 32;
  708. } else
  709. fifo_count = 32;
  710. do {
  711. if (fifo_count == 1) {
  712. read_count = 1;
  713. data[0] = read_reg(info, CHA + RXFIFO);
  714. } else {
  715. read_count = 2;
  716. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  717. }
  718. fifo_count -= read_count;
  719. if (!fifo_count && eom)
  720. buf->status = data[--read_count];
  721. for (i = 0; i < read_count; i++) {
  722. if (buf->count >= info->max_frame_size) {
  723. /* frame too large, reset receiver and reset current buffer */
  724. issue_command(info, CHA, CMD_RXRESET);
  725. buf->count = 0;
  726. return;
  727. }
  728. *(buf->data + buf->count) = data[i];
  729. buf->count++;
  730. }
  731. } while (fifo_count);
  732. if (eom) {
  733. info->pending_bh |= BH_RECEIVE;
  734. info->rx_frame_count++;
  735. info->rx_put++;
  736. if (info->rx_put >= info->rx_buf_count)
  737. info->rx_put = 0;
  738. }
  739. issue_command(info, CHA, CMD_RXFIFO);
  740. }
  741. static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
  742. {
  743. unsigned char data, status, flag;
  744. int fifo_count;
  745. int work = 0;
  746. struct mgsl_icount *icount = &info->icount;
  747. if (tcd) {
  748. /* early termination, get FIFO count from RBCL register */
  749. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  750. /* Zero fifo count could mean 0 or 32 bytes available.
  751. * If BIT5 of STAR is set then at least 1 byte is available.
  752. */
  753. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  754. fifo_count = 32;
  755. } else
  756. fifo_count = 32;
  757. tty_buffer_request_room(tty, fifo_count);
  758. /* Flush received async data to receive data buffer. */
  759. while (fifo_count) {
  760. data = read_reg(info, CHA + RXFIFO);
  761. status = read_reg(info, CHA + RXFIFO);
  762. fifo_count -= 2;
  763. icount->rx++;
  764. flag = TTY_NORMAL;
  765. // if no frameing/crc error then save data
  766. // BIT7:parity error
  767. // BIT6:framing error
  768. if (status & (BIT7 + BIT6)) {
  769. if (status & BIT7)
  770. icount->parity++;
  771. else
  772. icount->frame++;
  773. /* discard char if tty control flags say so */
  774. if (status & info->ignore_status_mask)
  775. continue;
  776. status &= info->read_status_mask;
  777. if (status & BIT7)
  778. flag = TTY_PARITY;
  779. else if (status & BIT6)
  780. flag = TTY_FRAME;
  781. }
  782. work += tty_insert_flip_char(tty, data, flag);
  783. }
  784. issue_command(info, CHA, CMD_RXFIFO);
  785. if (debug_level >= DEBUG_LEVEL_ISR) {
  786. printk("%s(%d):rx_ready_async",
  787. __FILE__,__LINE__);
  788. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  789. __FILE__,__LINE__,icount->rx,icount->brk,
  790. icount->parity,icount->frame,icount->overrun);
  791. }
  792. if (work)
  793. tty_flip_buffer_push(tty);
  794. }
  795. static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
  796. {
  797. if (!info->tx_active)
  798. return;
  799. info->tx_active = false;
  800. info->tx_aborting = false;
  801. if (info->params.mode == MGSL_MODE_ASYNC)
  802. return;
  803. info->tx_count = info->tx_put = info->tx_get = 0;
  804. del_timer(&info->tx_timer);
  805. if (info->drop_rts_on_tx_done) {
  806. get_signals(info);
  807. if (info->serial_signals & SerialSignal_RTS) {
  808. info->serial_signals &= ~SerialSignal_RTS;
  809. set_signals(info);
  810. }
  811. info->drop_rts_on_tx_done = false;
  812. }
  813. #if SYNCLINK_GENERIC_HDLC
  814. if (info->netcount)
  815. hdlcdev_tx_done(info);
  816. else
  817. #endif
  818. {
  819. if (tty->stopped || tty->hw_stopped) {
  820. tx_stop(info);
  821. return;
  822. }
  823. info->pending_bh |= BH_TRANSMIT;
  824. }
  825. }
  826. static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
  827. {
  828. unsigned char fifo_count = 32;
  829. int c;
  830. if (debug_level >= DEBUG_LEVEL_ISR)
  831. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  832. if (info->params.mode == MGSL_MODE_HDLC) {
  833. if (!info->tx_active)
  834. return;
  835. } else {
  836. if (tty->stopped || tty->hw_stopped) {
  837. tx_stop(info);
  838. return;
  839. }
  840. if (!info->tx_count)
  841. info->tx_active = false;
  842. }
  843. if (!info->tx_count)
  844. return;
  845. while (info->tx_count && fifo_count) {
  846. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  847. if (c == 1) {
  848. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  849. } else {
  850. write_reg16(info, CHA + TXFIFO,
  851. *((unsigned short*)(info->tx_buf + info->tx_get)));
  852. }
  853. info->tx_count -= c;
  854. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  855. fifo_count -= c;
  856. }
  857. if (info->params.mode == MGSL_MODE_ASYNC) {
  858. if (info->tx_count < WAKEUP_CHARS)
  859. info->pending_bh |= BH_TRANSMIT;
  860. issue_command(info, CHA, CMD_TXFIFO);
  861. } else {
  862. if (info->tx_count)
  863. issue_command(info, CHA, CMD_TXFIFO);
  864. else
  865. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  866. }
  867. }
  868. static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
  869. {
  870. get_signals(info);
  871. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  872. irq_disable(info, CHB, IRQ_CTS);
  873. info->icount.cts++;
  874. if (info->serial_signals & SerialSignal_CTS)
  875. info->input_signal_events.cts_up++;
  876. else
  877. info->input_signal_events.cts_down++;
  878. wake_up_interruptible(&info->status_event_wait_q);
  879. wake_up_interruptible(&info->event_wait_q);
  880. if (info->port.flags & ASYNC_CTS_FLOW) {
  881. if (tty->hw_stopped) {
  882. if (info->serial_signals & SerialSignal_CTS) {
  883. if (debug_level >= DEBUG_LEVEL_ISR)
  884. printk("CTS tx start...");
  885. if (tty)
  886. tty->hw_stopped = 0;
  887. tx_start(info, tty);
  888. info->pending_bh |= BH_TRANSMIT;
  889. return;
  890. }
  891. } else {
  892. if (!(info->serial_signals & SerialSignal_CTS)) {
  893. if (debug_level >= DEBUG_LEVEL_ISR)
  894. printk("CTS tx stop...");
  895. if (tty)
  896. tty->hw_stopped = 1;
  897. tx_stop(info);
  898. }
  899. }
  900. }
  901. info->pending_bh |= BH_STATUS;
  902. }
  903. static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
  904. {
  905. get_signals(info);
  906. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  907. irq_disable(info, CHB, IRQ_DCD);
  908. info->icount.dcd++;
  909. if (info->serial_signals & SerialSignal_DCD) {
  910. info->input_signal_events.dcd_up++;
  911. }
  912. else
  913. info->input_signal_events.dcd_down++;
  914. #if SYNCLINK_GENERIC_HDLC
  915. if (info->netcount) {
  916. if (info->serial_signals & SerialSignal_DCD)
  917. netif_carrier_on(info->netdev);
  918. else
  919. netif_carrier_off(info->netdev);
  920. }
  921. #endif
  922. wake_up_interruptible(&info->status_event_wait_q);
  923. wake_up_interruptible(&info->event_wait_q);
  924. if (info->port.flags & ASYNC_CHECK_CD) {
  925. if (debug_level >= DEBUG_LEVEL_ISR)
  926. printk("%s CD now %s...", info->device_name,
  927. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  928. if (info->serial_signals & SerialSignal_DCD)
  929. wake_up_interruptible(&info->port.open_wait);
  930. else {
  931. if (debug_level >= DEBUG_LEVEL_ISR)
  932. printk("doing serial hangup...");
  933. if (tty)
  934. tty_hangup(tty);
  935. }
  936. }
  937. info->pending_bh |= BH_STATUS;
  938. }
  939. static void dsr_change(MGSLPC_INFO *info)
  940. {
  941. get_signals(info);
  942. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  943. port_irq_disable(info, PVR_DSR);
  944. info->icount.dsr++;
  945. if (info->serial_signals & SerialSignal_DSR)
  946. info->input_signal_events.dsr_up++;
  947. else
  948. info->input_signal_events.dsr_down++;
  949. wake_up_interruptible(&info->status_event_wait_q);
  950. wake_up_interruptible(&info->event_wait_q);
  951. info->pending_bh |= BH_STATUS;
  952. }
  953. static void ri_change(MGSLPC_INFO *info)
  954. {
  955. get_signals(info);
  956. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  957. port_irq_disable(info, PVR_RI);
  958. info->icount.rng++;
  959. if (info->serial_signals & SerialSignal_RI)
  960. info->input_signal_events.ri_up++;
  961. else
  962. info->input_signal_events.ri_down++;
  963. wake_up_interruptible(&info->status_event_wait_q);
  964. wake_up_interruptible(&info->event_wait_q);
  965. info->pending_bh |= BH_STATUS;
  966. }
  967. /* Interrupt service routine entry point.
  968. *
  969. * Arguments:
  970. *
  971. * irq interrupt number that caused interrupt
  972. * dev_id device ID supplied during interrupt registration
  973. */
  974. static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
  975. {
  976. MGSLPC_INFO *info = dev_id;
  977. struct tty_struct *tty;
  978. unsigned short isr;
  979. unsigned char gis, pis;
  980. int count=0;
  981. if (debug_level >= DEBUG_LEVEL_ISR)
  982. printk("mgslpc_isr(%d) entry.\n", info->irq_level);
  983. if (!(info->p_dev->_locked))
  984. return IRQ_HANDLED;
  985. tty = tty_port_tty_get(&info->port);
  986. spin_lock(&info->lock);
  987. while ((gis = read_reg(info, CHA + GIS))) {
  988. if (debug_level >= DEBUG_LEVEL_ISR)
  989. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  990. if ((gis & 0x70) || count > 1000) {
  991. printk("synclink_cs:hardware failed or ejected\n");
  992. break;
  993. }
  994. count++;
  995. if (gis & (BIT1 + BIT0)) {
  996. isr = read_reg16(info, CHB + ISR);
  997. if (isr & IRQ_DCD)
  998. dcd_change(info, tty);
  999. if (isr & IRQ_CTS)
  1000. cts_change(info, tty);
  1001. }
  1002. if (gis & (BIT3 + BIT2))
  1003. {
  1004. isr = read_reg16(info, CHA + ISR);
  1005. if (isr & IRQ_TIMER) {
  1006. info->irq_occurred = true;
  1007. irq_disable(info, CHA, IRQ_TIMER);
  1008. }
  1009. /* receive IRQs */
  1010. if (isr & IRQ_EXITHUNT) {
  1011. info->icount.exithunt++;
  1012. wake_up_interruptible(&info->event_wait_q);
  1013. }
  1014. if (isr & IRQ_BREAK_ON) {
  1015. info->icount.brk++;
  1016. if (info->port.flags & ASYNC_SAK)
  1017. do_SAK(tty);
  1018. }
  1019. if (isr & IRQ_RXTIME) {
  1020. issue_command(info, CHA, CMD_RXFIFO_READ);
  1021. }
  1022. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1023. if (info->params.mode == MGSL_MODE_HDLC)
  1024. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1025. else
  1026. rx_ready_async(info, isr & IRQ_RXEOM, tty);
  1027. }
  1028. /* transmit IRQs */
  1029. if (isr & IRQ_UNDERRUN) {
  1030. if (info->tx_aborting)
  1031. info->icount.txabort++;
  1032. else
  1033. info->icount.txunder++;
  1034. tx_done(info, tty);
  1035. }
  1036. else if (isr & IRQ_ALLSENT) {
  1037. info->icount.txok++;
  1038. tx_done(info, tty);
  1039. }
  1040. else if (isr & IRQ_TXFIFO)
  1041. tx_ready(info, tty);
  1042. }
  1043. if (gis & BIT7) {
  1044. pis = read_reg(info, CHA + PIS);
  1045. if (pis & BIT1)
  1046. dsr_change(info);
  1047. if (pis & BIT2)
  1048. ri_change(info);
  1049. }
  1050. }
  1051. /* Request bottom half processing if there's something
  1052. * for it to do and the bh is not already running
  1053. */
  1054. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1055. if ( debug_level >= DEBUG_LEVEL_ISR )
  1056. printk("%s(%d):%s queueing bh task.\n",
  1057. __FILE__,__LINE__,info->device_name);
  1058. schedule_work(&info->task);
  1059. info->bh_requested = true;
  1060. }
  1061. spin_unlock(&info->lock);
  1062. tty_kref_put(tty);
  1063. if (debug_level >= DEBUG_LEVEL_ISR)
  1064. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1065. __FILE__, __LINE__, info->irq_level);
  1066. return IRQ_HANDLED;
  1067. }
  1068. /* Initialize and start device.
  1069. */
  1070. static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
  1071. {
  1072. int retval = 0;
  1073. if (debug_level >= DEBUG_LEVEL_INFO)
  1074. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1075. if (info->port.flags & ASYNC_INITIALIZED)
  1076. return 0;
  1077. if (!info->tx_buf) {
  1078. /* allocate a page of memory for a transmit buffer */
  1079. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1080. if (!info->tx_buf) {
  1081. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1082. __FILE__,__LINE__,info->device_name);
  1083. return -ENOMEM;
  1084. }
  1085. }
  1086. info->pending_bh = 0;
  1087. memset(&info->icount, 0, sizeof(info->icount));
  1088. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1089. /* Allocate and claim adapter resources */
  1090. retval = claim_resources(info);
  1091. /* perform existance check and diagnostics */
  1092. if ( !retval )
  1093. retval = adapter_test(info);
  1094. if ( retval ) {
  1095. if (capable(CAP_SYS_ADMIN) && tty)
  1096. set_bit(TTY_IO_ERROR, &tty->flags);
  1097. release_resources(info);
  1098. return retval;
  1099. }
  1100. /* program hardware for current parameters */
  1101. mgslpc_change_params(info, tty);
  1102. if (tty)
  1103. clear_bit(TTY_IO_ERROR, &tty->flags);
  1104. info->port.flags |= ASYNC_INITIALIZED;
  1105. return 0;
  1106. }
  1107. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1108. */
  1109. static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
  1110. {
  1111. unsigned long flags;
  1112. if (!(info->port.flags & ASYNC_INITIALIZED))
  1113. return;
  1114. if (debug_level >= DEBUG_LEVEL_INFO)
  1115. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1116. __FILE__,__LINE__, info->device_name );
  1117. /* clear status wait queue because status changes */
  1118. /* can't happen after shutting down the hardware */
  1119. wake_up_interruptible(&info->status_event_wait_q);
  1120. wake_up_interruptible(&info->event_wait_q);
  1121. del_timer_sync(&info->tx_timer);
  1122. if (info->tx_buf) {
  1123. free_page((unsigned long) info->tx_buf);
  1124. info->tx_buf = NULL;
  1125. }
  1126. spin_lock_irqsave(&info->lock,flags);
  1127. rx_stop(info);
  1128. tx_stop(info);
  1129. /* TODO:disable interrupts instead of reset to preserve signal states */
  1130. reset_device(info);
  1131. if (!tty || tty->termios->c_cflag & HUPCL) {
  1132. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1133. set_signals(info);
  1134. }
  1135. spin_unlock_irqrestore(&info->lock,flags);
  1136. release_resources(info);
  1137. if (tty)
  1138. set_bit(TTY_IO_ERROR, &tty->flags);
  1139. info->port.flags &= ~ASYNC_INITIALIZED;
  1140. }
  1141. static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
  1142. {
  1143. unsigned long flags;
  1144. spin_lock_irqsave(&info->lock,flags);
  1145. rx_stop(info);
  1146. tx_stop(info);
  1147. info->tx_count = info->tx_put = info->tx_get = 0;
  1148. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1149. hdlc_mode(info);
  1150. else
  1151. async_mode(info);
  1152. set_signals(info);
  1153. info->dcd_chkcount = 0;
  1154. info->cts_chkcount = 0;
  1155. info->ri_chkcount = 0;
  1156. info->dsr_chkcount = 0;
  1157. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1158. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1159. get_signals(info);
  1160. if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
  1161. rx_start(info);
  1162. spin_unlock_irqrestore(&info->lock,flags);
  1163. }
  1164. /* Reconfigure adapter based on new parameters
  1165. */
  1166. static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
  1167. {
  1168. unsigned cflag;
  1169. int bits_per_char;
  1170. if (!tty || !tty->termios)
  1171. return;
  1172. if (debug_level >= DEBUG_LEVEL_INFO)
  1173. printk("%s(%d):mgslpc_change_params(%s)\n",
  1174. __FILE__,__LINE__, info->device_name );
  1175. cflag = tty->termios->c_cflag;
  1176. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1177. /* otherwise assert DTR and RTS */
  1178. if (cflag & CBAUD)
  1179. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1180. else
  1181. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1182. /* byte size and parity */
  1183. switch (cflag & CSIZE) {
  1184. case CS5: info->params.data_bits = 5; break;
  1185. case CS6: info->params.data_bits = 6; break;
  1186. case CS7: info->params.data_bits = 7; break;
  1187. case CS8: info->params.data_bits = 8; break;
  1188. default: info->params.data_bits = 7; break;
  1189. }
  1190. if (cflag & CSTOPB)
  1191. info->params.stop_bits = 2;
  1192. else
  1193. info->params.stop_bits = 1;
  1194. info->params.parity = ASYNC_PARITY_NONE;
  1195. if (cflag & PARENB) {
  1196. if (cflag & PARODD)
  1197. info->params.parity = ASYNC_PARITY_ODD;
  1198. else
  1199. info->params.parity = ASYNC_PARITY_EVEN;
  1200. #ifdef CMSPAR
  1201. if (cflag & CMSPAR)
  1202. info->params.parity = ASYNC_PARITY_SPACE;
  1203. #endif
  1204. }
  1205. /* calculate number of jiffies to transmit a full
  1206. * FIFO (32 bytes) at specified data rate
  1207. */
  1208. bits_per_char = info->params.data_bits +
  1209. info->params.stop_bits + 1;
  1210. /* if port data rate is set to 460800 or less then
  1211. * allow tty settings to override, otherwise keep the
  1212. * current data rate.
  1213. */
  1214. if (info->params.data_rate <= 460800) {
  1215. info->params.data_rate = tty_get_baud_rate(tty);
  1216. }
  1217. if ( info->params.data_rate ) {
  1218. info->timeout = (32*HZ*bits_per_char) /
  1219. info->params.data_rate;
  1220. }
  1221. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1222. if (cflag & CRTSCTS)
  1223. info->port.flags |= ASYNC_CTS_FLOW;
  1224. else
  1225. info->port.flags &= ~ASYNC_CTS_FLOW;
  1226. if (cflag & CLOCAL)
  1227. info->port.flags &= ~ASYNC_CHECK_CD;
  1228. else
  1229. info->port.flags |= ASYNC_CHECK_CD;
  1230. /* process tty input control flags */
  1231. info->read_status_mask = 0;
  1232. if (I_INPCK(tty))
  1233. info->read_status_mask |= BIT7 | BIT6;
  1234. if (I_IGNPAR(tty))
  1235. info->ignore_status_mask |= BIT7 | BIT6;
  1236. mgslpc_program_hw(info, tty);
  1237. }
  1238. /* Add a character to the transmit buffer
  1239. */
  1240. static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1241. {
  1242. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1243. unsigned long flags;
  1244. if (debug_level >= DEBUG_LEVEL_INFO) {
  1245. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1246. __FILE__,__LINE__,ch,info->device_name);
  1247. }
  1248. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1249. return 0;
  1250. if (!info->tx_buf)
  1251. return 0;
  1252. spin_lock_irqsave(&info->lock,flags);
  1253. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1254. if (info->tx_count < TXBUFSIZE - 1) {
  1255. info->tx_buf[info->tx_put++] = ch;
  1256. info->tx_put &= TXBUFSIZE-1;
  1257. info->tx_count++;
  1258. }
  1259. }
  1260. spin_unlock_irqrestore(&info->lock,flags);
  1261. return 1;
  1262. }
  1263. /* Enable transmitter so remaining characters in the
  1264. * transmit buffer are sent.
  1265. */
  1266. static void mgslpc_flush_chars(struct tty_struct *tty)
  1267. {
  1268. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1269. unsigned long flags;
  1270. if (debug_level >= DEBUG_LEVEL_INFO)
  1271. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1272. __FILE__,__LINE__,info->device_name,info->tx_count);
  1273. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1274. return;
  1275. if (info->tx_count <= 0 || tty->stopped ||
  1276. tty->hw_stopped || !info->tx_buf)
  1277. return;
  1278. if (debug_level >= DEBUG_LEVEL_INFO)
  1279. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1280. __FILE__,__LINE__,info->device_name);
  1281. spin_lock_irqsave(&info->lock,flags);
  1282. if (!info->tx_active)
  1283. tx_start(info, tty);
  1284. spin_unlock_irqrestore(&info->lock,flags);
  1285. }
  1286. /* Send a block of data
  1287. *
  1288. * Arguments:
  1289. *
  1290. * tty pointer to tty information structure
  1291. * buf pointer to buffer containing send data
  1292. * count size of send data in bytes
  1293. *
  1294. * Returns: number of characters written
  1295. */
  1296. static int mgslpc_write(struct tty_struct * tty,
  1297. const unsigned char *buf, int count)
  1298. {
  1299. int c, ret = 0;
  1300. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1301. unsigned long flags;
  1302. if (debug_level >= DEBUG_LEVEL_INFO)
  1303. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1304. __FILE__,__LINE__,info->device_name,count);
  1305. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1306. !info->tx_buf)
  1307. goto cleanup;
  1308. if (info->params.mode == MGSL_MODE_HDLC) {
  1309. if (count > TXBUFSIZE) {
  1310. ret = -EIO;
  1311. goto cleanup;
  1312. }
  1313. if (info->tx_active)
  1314. goto cleanup;
  1315. else if (info->tx_count)
  1316. goto start;
  1317. }
  1318. for (;;) {
  1319. c = min(count,
  1320. min(TXBUFSIZE - info->tx_count - 1,
  1321. TXBUFSIZE - info->tx_put));
  1322. if (c <= 0)
  1323. break;
  1324. memcpy(info->tx_buf + info->tx_put, buf, c);
  1325. spin_lock_irqsave(&info->lock,flags);
  1326. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1327. info->tx_count += c;
  1328. spin_unlock_irqrestore(&info->lock,flags);
  1329. buf += c;
  1330. count -= c;
  1331. ret += c;
  1332. }
  1333. start:
  1334. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1335. spin_lock_irqsave(&info->lock,flags);
  1336. if (!info->tx_active)
  1337. tx_start(info, tty);
  1338. spin_unlock_irqrestore(&info->lock,flags);
  1339. }
  1340. cleanup:
  1341. if (debug_level >= DEBUG_LEVEL_INFO)
  1342. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1343. __FILE__,__LINE__,info->device_name,ret);
  1344. return ret;
  1345. }
  1346. /* Return the count of free bytes in transmit buffer
  1347. */
  1348. static int mgslpc_write_room(struct tty_struct *tty)
  1349. {
  1350. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1351. int ret;
  1352. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1353. return 0;
  1354. if (info->params.mode == MGSL_MODE_HDLC) {
  1355. /* HDLC (frame oriented) mode */
  1356. if (info->tx_active)
  1357. return 0;
  1358. else
  1359. return HDLC_MAX_FRAME_SIZE;
  1360. } else {
  1361. ret = TXBUFSIZE - info->tx_count - 1;
  1362. if (ret < 0)
  1363. ret = 0;
  1364. }
  1365. if (debug_level >= DEBUG_LEVEL_INFO)
  1366. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1367. __FILE__,__LINE__, info->device_name, ret);
  1368. return ret;
  1369. }
  1370. /* Return the count of bytes in transmit buffer
  1371. */
  1372. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1373. {
  1374. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1375. int rc;
  1376. if (debug_level >= DEBUG_LEVEL_INFO)
  1377. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1378. __FILE__,__LINE__, info->device_name );
  1379. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1380. return 0;
  1381. if (info->params.mode == MGSL_MODE_HDLC)
  1382. rc = info->tx_active ? info->max_frame_size : 0;
  1383. else
  1384. rc = info->tx_count;
  1385. if (debug_level >= DEBUG_LEVEL_INFO)
  1386. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1387. __FILE__,__LINE__, info->device_name, rc);
  1388. return rc;
  1389. }
  1390. /* Discard all data in the send buffer
  1391. */
  1392. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1393. {
  1394. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1395. unsigned long flags;
  1396. if (debug_level >= DEBUG_LEVEL_INFO)
  1397. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1398. __FILE__,__LINE__, info->device_name );
  1399. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1400. return;
  1401. spin_lock_irqsave(&info->lock,flags);
  1402. info->tx_count = info->tx_put = info->tx_get = 0;
  1403. del_timer(&info->tx_timer);
  1404. spin_unlock_irqrestore(&info->lock,flags);
  1405. wake_up_interruptible(&tty->write_wait);
  1406. tty_wakeup(tty);
  1407. }
  1408. /* Send a high-priority XON/XOFF character
  1409. */
  1410. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1411. {
  1412. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1413. unsigned long flags;
  1414. if (debug_level >= DEBUG_LEVEL_INFO)
  1415. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1416. __FILE__,__LINE__, info->device_name, ch );
  1417. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1418. return;
  1419. info->x_char = ch;
  1420. if (ch) {
  1421. spin_lock_irqsave(&info->lock,flags);
  1422. if (!info->tx_enabled)
  1423. tx_start(info, tty);
  1424. spin_unlock_irqrestore(&info->lock,flags);
  1425. }
  1426. }
  1427. /* Signal remote device to throttle send data (our receive data)
  1428. */
  1429. static void mgslpc_throttle(struct tty_struct * tty)
  1430. {
  1431. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1432. unsigned long flags;
  1433. if (debug_level >= DEBUG_LEVEL_INFO)
  1434. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1435. __FILE__,__LINE__, info->device_name );
  1436. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1437. return;
  1438. if (I_IXOFF(tty))
  1439. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1440. if (tty->termios->c_cflag & CRTSCTS) {
  1441. spin_lock_irqsave(&info->lock,flags);
  1442. info->serial_signals &= ~SerialSignal_RTS;
  1443. set_signals(info);
  1444. spin_unlock_irqrestore(&info->lock,flags);
  1445. }
  1446. }
  1447. /* Signal remote device to stop throttling send data (our receive data)
  1448. */
  1449. static void mgslpc_unthrottle(struct tty_struct * tty)
  1450. {
  1451. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1452. unsigned long flags;
  1453. if (debug_level >= DEBUG_LEVEL_INFO)
  1454. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1455. __FILE__,__LINE__, info->device_name );
  1456. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1457. return;
  1458. if (I_IXOFF(tty)) {
  1459. if (info->x_char)
  1460. info->x_char = 0;
  1461. else
  1462. mgslpc_send_xchar(tty, START_CHAR(tty));
  1463. }
  1464. if (tty->termios->c_cflag & CRTSCTS) {
  1465. spin_lock_irqsave(&info->lock,flags);
  1466. info->serial_signals |= SerialSignal_RTS;
  1467. set_signals(info);
  1468. spin_unlock_irqrestore(&info->lock,flags);
  1469. }
  1470. }
  1471. /* get the current serial statistics
  1472. */
  1473. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1474. {
  1475. int err;
  1476. if (debug_level >= DEBUG_LEVEL_INFO)
  1477. printk("get_params(%s)\n", info->device_name);
  1478. if (!user_icount) {
  1479. memset(&info->icount, 0, sizeof(info->icount));
  1480. } else {
  1481. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1482. if (err)
  1483. return -EFAULT;
  1484. }
  1485. return 0;
  1486. }
  1487. /* get the current serial parameters
  1488. */
  1489. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1490. {
  1491. int err;
  1492. if (debug_level >= DEBUG_LEVEL_INFO)
  1493. printk("get_params(%s)\n", info->device_name);
  1494. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1495. if (err)
  1496. return -EFAULT;
  1497. return 0;
  1498. }
  1499. /* set the serial parameters
  1500. *
  1501. * Arguments:
  1502. *
  1503. * info pointer to device instance data
  1504. * new_params user buffer containing new serial params
  1505. *
  1506. * Returns: 0 if success, otherwise error code
  1507. */
  1508. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
  1509. {
  1510. unsigned long flags;
  1511. MGSL_PARAMS tmp_params;
  1512. int err;
  1513. if (debug_level >= DEBUG_LEVEL_INFO)
  1514. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1515. info->device_name );
  1516. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1517. if (err) {
  1518. if ( debug_level >= DEBUG_LEVEL_INFO )
  1519. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1520. __FILE__,__LINE__,info->device_name);
  1521. return -EFAULT;
  1522. }
  1523. spin_lock_irqsave(&info->lock,flags);
  1524. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1525. spin_unlock_irqrestore(&info->lock,flags);
  1526. mgslpc_change_params(info, tty);
  1527. return 0;
  1528. }
  1529. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1530. {
  1531. int err;
  1532. if (debug_level >= DEBUG_LEVEL_INFO)
  1533. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1534. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1535. if (err)
  1536. return -EFAULT;
  1537. return 0;
  1538. }
  1539. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1540. {
  1541. unsigned long flags;
  1542. if (debug_level >= DEBUG_LEVEL_INFO)
  1543. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1544. spin_lock_irqsave(&info->lock,flags);
  1545. info->idle_mode = idle_mode;
  1546. tx_set_idle(info);
  1547. spin_unlock_irqrestore(&info->lock,flags);
  1548. return 0;
  1549. }
  1550. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1551. {
  1552. int err;
  1553. if (debug_level >= DEBUG_LEVEL_INFO)
  1554. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1555. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1556. if (err)
  1557. return -EFAULT;
  1558. return 0;
  1559. }
  1560. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1561. {
  1562. unsigned long flags;
  1563. unsigned char val;
  1564. if (debug_level >= DEBUG_LEVEL_INFO)
  1565. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1566. spin_lock_irqsave(&info->lock,flags);
  1567. info->if_mode = if_mode;
  1568. val = read_reg(info, PVR) & 0x0f;
  1569. switch (info->if_mode)
  1570. {
  1571. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1572. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1573. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1574. }
  1575. write_reg(info, PVR, val);
  1576. spin_unlock_irqrestore(&info->lock,flags);
  1577. return 0;
  1578. }
  1579. static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
  1580. {
  1581. unsigned long flags;
  1582. if (debug_level >= DEBUG_LEVEL_INFO)
  1583. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1584. spin_lock_irqsave(&info->lock,flags);
  1585. if (enable) {
  1586. if (!info->tx_enabled)
  1587. tx_start(info, tty);
  1588. } else {
  1589. if (info->tx_enabled)
  1590. tx_stop(info);
  1591. }
  1592. spin_unlock_irqrestore(&info->lock,flags);
  1593. return 0;
  1594. }
  1595. static int tx_abort(MGSLPC_INFO * info)
  1596. {
  1597. unsigned long flags;
  1598. if (debug_level >= DEBUG_LEVEL_INFO)
  1599. printk("tx_abort(%s)\n", info->device_name);
  1600. spin_lock_irqsave(&info->lock,flags);
  1601. if (info->tx_active && info->tx_count &&
  1602. info->params.mode == MGSL_MODE_HDLC) {
  1603. /* clear data count so FIFO is not filled on next IRQ.
  1604. * This results in underrun and abort transmission.
  1605. */
  1606. info->tx_count = info->tx_put = info->tx_get = 0;
  1607. info->tx_aborting = true;
  1608. }
  1609. spin_unlock_irqrestore(&info->lock,flags);
  1610. return 0;
  1611. }
  1612. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1613. {
  1614. unsigned long flags;
  1615. if (debug_level >= DEBUG_LEVEL_INFO)
  1616. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1617. spin_lock_irqsave(&info->lock,flags);
  1618. if (enable) {
  1619. if (!info->rx_enabled)
  1620. rx_start(info);
  1621. } else {
  1622. if (info->rx_enabled)
  1623. rx_stop(info);
  1624. }
  1625. spin_unlock_irqrestore(&info->lock,flags);
  1626. return 0;
  1627. }
  1628. /* wait for specified event to occur
  1629. *
  1630. * Arguments: info pointer to device instance data
  1631. * mask pointer to bitmask of events to wait for
  1632. * Return Value: 0 if successful and bit mask updated with
  1633. * of events triggerred,
  1634. * otherwise error code
  1635. */
  1636. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1637. {
  1638. unsigned long flags;
  1639. int s;
  1640. int rc=0;
  1641. struct mgsl_icount cprev, cnow;
  1642. int events;
  1643. int mask;
  1644. struct _input_signal_events oldsigs, newsigs;
  1645. DECLARE_WAITQUEUE(wait, current);
  1646. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1647. if (rc)
  1648. return -EFAULT;
  1649. if (debug_level >= DEBUG_LEVEL_INFO)
  1650. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1651. spin_lock_irqsave(&info->lock,flags);
  1652. /* return immediately if state matches requested events */
  1653. get_signals(info);
  1654. s = info->serial_signals;
  1655. events = mask &
  1656. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1657. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1658. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1659. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1660. if (events) {
  1661. spin_unlock_irqrestore(&info->lock,flags);
  1662. goto exit;
  1663. }
  1664. /* save current irq counts */
  1665. cprev = info->icount;
  1666. oldsigs = info->input_signal_events;
  1667. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1668. (mask & MgslEvent_ExitHuntMode))
  1669. irq_enable(info, CHA, IRQ_EXITHUNT);
  1670. set_current_state(TASK_INTERRUPTIBLE);
  1671. add_wait_queue(&info->event_wait_q, &wait);
  1672. spin_unlock_irqrestore(&info->lock,flags);
  1673. for(;;) {
  1674. schedule();
  1675. if (signal_pending(current)) {
  1676. rc = -ERESTARTSYS;
  1677. break;
  1678. }
  1679. /* get current irq counts */
  1680. spin_lock_irqsave(&info->lock,flags);
  1681. cnow = info->icount;
  1682. newsigs = info->input_signal_events;
  1683. set_current_state(TASK_INTERRUPTIBLE);
  1684. spin_unlock_irqrestore(&info->lock,flags);
  1685. /* if no change, wait aborted for some reason */
  1686. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1687. newsigs.dsr_down == oldsigs.dsr_down &&
  1688. newsigs.dcd_up == oldsigs.dcd_up &&
  1689. newsigs.dcd_down == oldsigs.dcd_down &&
  1690. newsigs.cts_up == oldsigs.cts_up &&
  1691. newsigs.cts_down == oldsigs.cts_down &&
  1692. newsigs.ri_up == oldsigs.ri_up &&
  1693. newsigs.ri_down == oldsigs.ri_down &&
  1694. cnow.exithunt == cprev.exithunt &&
  1695. cnow.rxidle == cprev.rxidle) {
  1696. rc = -EIO;
  1697. break;
  1698. }
  1699. events = mask &
  1700. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1701. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1702. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1703. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1704. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1705. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1706. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1707. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1708. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1709. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1710. if (events)
  1711. break;
  1712. cprev = cnow;
  1713. oldsigs = newsigs;
  1714. }
  1715. remove_wait_queue(&info->event_wait_q, &wait);
  1716. set_current_state(TASK_RUNNING);
  1717. if (mask & MgslEvent_ExitHuntMode) {
  1718. spin_lock_irqsave(&info->lock,flags);
  1719. if (!waitqueue_active(&info->event_wait_q))
  1720. irq_disable(info, CHA, IRQ_EXITHUNT);
  1721. spin_unlock_irqrestore(&info->lock,flags);
  1722. }
  1723. exit:
  1724. if (rc == 0)
  1725. PUT_USER(rc, events, mask_ptr);
  1726. return rc;
  1727. }
  1728. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1729. {
  1730. unsigned long flags;
  1731. int rc;
  1732. struct mgsl_icount cprev, cnow;
  1733. DECLARE_WAITQUEUE(wait, current);
  1734. /* save current irq counts */
  1735. spin_lock_irqsave(&info->lock,flags);
  1736. cprev = info->icount;
  1737. add_wait_queue(&info->status_event_wait_q, &wait);
  1738. set_current_state(TASK_INTERRUPTIBLE);
  1739. spin_unlock_irqrestore(&info->lock,flags);
  1740. for(;;) {
  1741. schedule();
  1742. if (signal_pending(current)) {
  1743. rc = -ERESTARTSYS;
  1744. break;
  1745. }
  1746. /* get new irq counts */
  1747. spin_lock_irqsave(&info->lock,flags);
  1748. cnow = info->icount;
  1749. set_current_state(TASK_INTERRUPTIBLE);
  1750. spin_unlock_irqrestore(&info->lock,flags);
  1751. /* if no change, wait aborted for some reason */
  1752. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1753. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1754. rc = -EIO;
  1755. break;
  1756. }
  1757. /* check for change in caller specified modem input */
  1758. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1759. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1760. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1761. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1762. rc = 0;
  1763. break;
  1764. }
  1765. cprev = cnow;
  1766. }
  1767. remove_wait_queue(&info->status_event_wait_q, &wait);
  1768. set_current_state(TASK_RUNNING);
  1769. return rc;
  1770. }
  1771. /* return the state of the serial control and status signals
  1772. */
  1773. static int tiocmget(struct tty_struct *tty, struct file *file)
  1774. {
  1775. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1776. unsigned int result;
  1777. unsigned long flags;
  1778. spin_lock_irqsave(&info->lock,flags);
  1779. get_signals(info);
  1780. spin_unlock_irqrestore(&info->lock,flags);
  1781. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1782. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1783. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1784. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1785. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1786. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1787. if (debug_level >= DEBUG_LEVEL_INFO)
  1788. printk("%s(%d):%s tiocmget() value=%08X\n",
  1789. __FILE__,__LINE__, info->device_name, result );
  1790. return result;
  1791. }
  1792. /* set modem control signals (DTR/RTS)
  1793. */
  1794. static int tiocmset(struct tty_struct *tty, struct file *file,
  1795. unsigned int set, unsigned int clear)
  1796. {
  1797. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1798. unsigned long flags;
  1799. if (debug_level >= DEBUG_LEVEL_INFO)
  1800. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1801. __FILE__,__LINE__,info->device_name, set, clear);
  1802. if (set & TIOCM_RTS)
  1803. info->serial_signals |= SerialSignal_RTS;
  1804. if (set & TIOCM_DTR)
  1805. info->serial_signals |= SerialSignal_DTR;
  1806. if (clear & TIOCM_RTS)
  1807. info->serial_signals &= ~SerialSignal_RTS;
  1808. if (clear & TIOCM_DTR)
  1809. info->serial_signals &= ~SerialSignal_DTR;
  1810. spin_lock_irqsave(&info->lock,flags);
  1811. set_signals(info);
  1812. spin_unlock_irqrestore(&info->lock,flags);
  1813. return 0;
  1814. }
  1815. /* Set or clear transmit break condition
  1816. *
  1817. * Arguments: tty pointer to tty instance data
  1818. * break_state -1=set break condition, 0=clear
  1819. */
  1820. static int mgslpc_break(struct tty_struct *tty, int break_state)
  1821. {
  1822. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1823. unsigned long flags;
  1824. if (debug_level >= DEBUG_LEVEL_INFO)
  1825. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1826. __FILE__,__LINE__, info->device_name, break_state);
  1827. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1828. return -EINVAL;
  1829. spin_lock_irqsave(&info->lock,flags);
  1830. if (break_state == -1)
  1831. set_reg_bits(info, CHA+DAFO, BIT6);
  1832. else
  1833. clear_reg_bits(info, CHA+DAFO, BIT6);
  1834. spin_unlock_irqrestore(&info->lock,flags);
  1835. return 0;
  1836. }
  1837. /* Service an IOCTL request
  1838. *
  1839. * Arguments:
  1840. *
  1841. * tty pointer to tty instance data
  1842. * file pointer to associated file object for device
  1843. * cmd IOCTL command code
  1844. * arg command argument/context
  1845. *
  1846. * Return Value: 0 if success, otherwise error code
  1847. */
  1848. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1849. unsigned int cmd, unsigned long arg)
  1850. {
  1851. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1852. int error;
  1853. struct mgsl_icount cnow; /* kernel counter temps */
  1854. struct serial_icounter_struct __user *p_cuser; /* user space */
  1855. void __user *argp = (void __user *)arg;
  1856. unsigned long flags;
  1857. if (debug_level >= DEBUG_LEVEL_INFO)
  1858. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1859. info->device_name, cmd );
  1860. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1861. return -ENODEV;
  1862. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1863. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1864. if (tty->flags & (1 << TTY_IO_ERROR))
  1865. return -EIO;
  1866. }
  1867. switch (cmd) {
  1868. case MGSL_IOCGPARAMS:
  1869. return get_params(info, argp);
  1870. case MGSL_IOCSPARAMS:
  1871. return set_params(info, argp, tty);
  1872. case MGSL_IOCGTXIDLE:
  1873. return get_txidle(info, argp);
  1874. case MGSL_IOCSTXIDLE:
  1875. return set_txidle(info, (int)arg);
  1876. case MGSL_IOCGIF:
  1877. return get_interface(info, argp);
  1878. case MGSL_IOCSIF:
  1879. return set_interface(info,(int)arg);
  1880. case MGSL_IOCTXENABLE:
  1881. return set_txenable(info,(int)arg, tty);
  1882. case MGSL_IOCRXENABLE:
  1883. return set_rxenable(info,(int)arg);
  1884. case MGSL_IOCTXABORT:
  1885. return tx_abort(info);
  1886. case MGSL_IOCGSTATS:
  1887. return get_stats(info, argp);
  1888. case MGSL_IOCWAITEVENT:
  1889. return wait_events(info, argp);
  1890. case TIOCMIWAIT:
  1891. return modem_input_wait(info,(int)arg);
  1892. case TIOCGICOUNT:
  1893. spin_lock_irqsave(&info->lock,flags);
  1894. cnow = info->icount;
  1895. spin_unlock_irqrestore(&info->lock,flags);
  1896. p_cuser = argp;
  1897. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1898. if (error) return error;
  1899. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1900. if (error) return error;
  1901. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1902. if (error) return error;
  1903. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1904. if (error) return error;
  1905. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1906. if (error) return error;
  1907. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1908. if (error) return error;
  1909. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1910. if (error) return error;
  1911. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1912. if (error) return error;
  1913. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1914. if (error) return error;
  1915. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1916. if (error) return error;
  1917. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1918. if (error) return error;
  1919. return 0;
  1920. default:
  1921. return -ENOIOCTLCMD;
  1922. }
  1923. return 0;
  1924. }
  1925. /* Set new termios settings
  1926. *
  1927. * Arguments:
  1928. *
  1929. * tty pointer to tty structure
  1930. * termios pointer to buffer to hold returned old termios
  1931. */
  1932. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1933. {
  1934. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1935. unsigned long flags;
  1936. if (debug_level >= DEBUG_LEVEL_INFO)
  1937. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1938. tty->driver->name );
  1939. /* just return if nothing has changed */
  1940. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1941. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1942. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1943. return;
  1944. mgslpc_change_params(info, tty);
  1945. /* Handle transition to B0 status */
  1946. if (old_termios->c_cflag & CBAUD &&
  1947. !(tty->termios->c_cflag & CBAUD)) {
  1948. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1949. spin_lock_irqsave(&info->lock,flags);
  1950. set_signals(info);
  1951. spin_unlock_irqrestore(&info->lock,flags);
  1952. }
  1953. /* Handle transition away from B0 status */
  1954. if (!(old_termios->c_cflag & CBAUD) &&
  1955. tty->termios->c_cflag & CBAUD) {
  1956. info->serial_signals |= SerialSignal_DTR;
  1957. if (!(tty->termios->c_cflag & CRTSCTS) ||
  1958. !test_bit(TTY_THROTTLED, &tty->flags)) {
  1959. info->serial_signals |= SerialSignal_RTS;
  1960. }
  1961. spin_lock_irqsave(&info->lock,flags);
  1962. set_signals(info);
  1963. spin_unlock_irqrestore(&info->lock,flags);
  1964. }
  1965. /* Handle turning off CRTSCTS */
  1966. if (old_termios->c_cflag & CRTSCTS &&
  1967. !(tty->termios->c_cflag & CRTSCTS)) {
  1968. tty->hw_stopped = 0;
  1969. tx_release(tty);
  1970. }
  1971. }
  1972. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  1973. {
  1974. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1975. struct tty_port *port = &info->port;
  1976. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  1977. return;
  1978. if (debug_level >= DEBUG_LEVEL_INFO)
  1979. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  1980. __FILE__,__LINE__, info->device_name, port->count);
  1981. WARN_ON(!port->count);
  1982. if (tty_port_close_start(port, tty, filp) == 0)
  1983. goto cleanup;
  1984. if (port->flags & ASYNC_INITIALIZED)
  1985. mgslpc_wait_until_sent(tty, info->timeout);
  1986. mgslpc_flush_buffer(tty);
  1987. tty_ldisc_flush(tty);
  1988. shutdown(info, tty);
  1989. tty_port_close_end(port, tty);
  1990. tty_port_tty_set(port, NULL);
  1991. cleanup:
  1992. if (debug_level >= DEBUG_LEVEL_INFO)
  1993. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  1994. tty->driver->name, port->count);
  1995. }
  1996. /* Wait until the transmitter is empty.
  1997. */
  1998. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  1999. {
  2000. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2001. unsigned long orig_jiffies, char_time;
  2002. if (!info )
  2003. return;
  2004. if (debug_level >= DEBUG_LEVEL_INFO)
  2005. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2006. __FILE__,__LINE__, info->device_name );
  2007. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2008. return;
  2009. if (!(info->port.flags & ASYNC_INITIALIZED))
  2010. goto exit;
  2011. orig_jiffies = jiffies;
  2012. /* Set check interval to 1/5 of estimated time to
  2013. * send a character, and make it at least 1. The check
  2014. * interval should also be less than the timeout.
  2015. * Note: use tight timings here to satisfy the NIST-PCTS.
  2016. */
  2017. if ( info->params.data_rate ) {
  2018. char_time = info->timeout/(32 * 5);
  2019. if (!char_time)
  2020. char_time++;
  2021. } else
  2022. char_time = 1;
  2023. if (timeout)
  2024. char_time = min_t(unsigned long, char_time, timeout);
  2025. if (info->params.mode == MGSL_MODE_HDLC) {
  2026. while (info->tx_active) {
  2027. msleep_interruptible(jiffies_to_msecs(char_time));
  2028. if (signal_pending(current))
  2029. break;
  2030. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2031. break;
  2032. }
  2033. } else {
  2034. while ((info->tx_count || info->tx_active) &&
  2035. info->tx_enabled) {
  2036. msleep_interruptible(jiffies_to_msecs(char_time));
  2037. if (signal_pending(current))
  2038. break;
  2039. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2040. break;
  2041. }
  2042. }
  2043. exit:
  2044. if (debug_level >= DEBUG_LEVEL_INFO)
  2045. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2046. __FILE__,__LINE__, info->device_name );
  2047. }
  2048. /* Called by tty_hangup() when a hangup is signaled.
  2049. * This is the same as closing all open files for the port.
  2050. */
  2051. static void mgslpc_hangup(struct tty_struct *tty)
  2052. {
  2053. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2054. if (debug_level >= DEBUG_LEVEL_INFO)
  2055. printk("%s(%d):mgslpc_hangup(%s)\n",
  2056. __FILE__,__LINE__, info->device_name );
  2057. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2058. return;
  2059. mgslpc_flush_buffer(tty);
  2060. shutdown(info, tty);
  2061. tty_port_hangup(&info->port);
  2062. }
  2063. static int carrier_raised(struct tty_port *port)
  2064. {
  2065. MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
  2066. unsigned long flags;
  2067. spin_lock_irqsave(&info->lock,flags);
  2068. get_signals(info);
  2069. spin_unlock_irqrestore(&info->lock,flags);
  2070. if (info->serial_signals & SerialSignal_DCD)
  2071. return 1;
  2072. return 0;
  2073. }
  2074. static void dtr_rts(struct tty_port *port, int onoff)
  2075. {
  2076. MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
  2077. unsigned long flags;
  2078. spin_lock_irqsave(&info->lock,flags);
  2079. if (onoff)
  2080. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2081. else
  2082. info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
  2083. set_signals(info);
  2084. spin_unlock_irqrestore(&info->lock,flags);
  2085. }
  2086. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2087. {
  2088. MGSLPC_INFO *info;
  2089. struct tty_port *port;
  2090. int retval, line;
  2091. unsigned long flags;
  2092. /* verify range of specified line number */
  2093. line = tty->index;
  2094. if ((line < 0) || (line >= mgslpc_device_count)) {
  2095. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2096. __FILE__,__LINE__,line);
  2097. return -ENODEV;
  2098. }
  2099. /* find the info structure for the specified line */
  2100. info = mgslpc_device_list;
  2101. while(info && info->line != line)
  2102. info = info->next_device;
  2103. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2104. return -ENODEV;
  2105. port = &info->port;
  2106. tty->driver_data = info;
  2107. tty_port_tty_set(port, tty);
  2108. if (debug_level >= DEBUG_LEVEL_INFO)
  2109. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2110. __FILE__,__LINE__,tty->driver->name, port->count);
  2111. /* If port is closing, signal caller to try again */
  2112. if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
  2113. if (port->flags & ASYNC_CLOSING)
  2114. interruptible_sleep_on(&port->close_wait);
  2115. retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
  2116. -EAGAIN : -ERESTARTSYS);
  2117. goto cleanup;
  2118. }
  2119. tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2120. spin_lock_irqsave(&info->netlock, flags);
  2121. if (info->netcount) {
  2122. retval = -EBUSY;
  2123. spin_unlock_irqrestore(&info->netlock, flags);
  2124. goto cleanup;
  2125. }
  2126. spin_lock(&port->lock);
  2127. port->count++;
  2128. spin_unlock(&port->lock);
  2129. spin_unlock_irqrestore(&info->netlock, flags);
  2130. if (port->count == 1) {
  2131. /* 1st open on this device, init hardware */
  2132. retval = startup(info, tty);
  2133. if (retval < 0)
  2134. goto cleanup;
  2135. }
  2136. retval = tty_port_block_til_ready(&info->port, tty, filp);
  2137. if (retval) {
  2138. if (debug_level >= DEBUG_LEVEL_INFO)
  2139. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2140. __FILE__,__LINE__, info->device_name, retval);
  2141. goto cleanup;
  2142. }
  2143. if (debug_level >= DEBUG_LEVEL_INFO)
  2144. printk("%s(%d):mgslpc_open(%s) success\n",
  2145. __FILE__,__LINE__, info->device_name);
  2146. retval = 0;
  2147. cleanup:
  2148. return retval;
  2149. }
  2150. /*
  2151. * /proc fs routines....
  2152. */
  2153. static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
  2154. {
  2155. char stat_buf[30];
  2156. unsigned long flags;
  2157. seq_printf(m, "%s:io:%04X irq:%d",
  2158. info->device_name, info->io_base, info->irq_level);
  2159. /* output current serial signal states */
  2160. spin_lock_irqsave(&info->lock,flags);
  2161. get_signals(info);
  2162. spin_unlock_irqrestore(&info->lock,flags);
  2163. stat_buf[0] = 0;
  2164. stat_buf[1] = 0;
  2165. if (info->serial_signals & SerialSignal_RTS)
  2166. strcat(stat_buf, "|RTS");
  2167. if (info->serial_signals & SerialSignal_CTS)
  2168. strcat(stat_buf, "|CTS");
  2169. if (info->serial_signals & SerialSignal_DTR)
  2170. strcat(stat_buf, "|DTR");
  2171. if (info->serial_signals & SerialSignal_DSR)
  2172. strcat(stat_buf, "|DSR");
  2173. if (info->serial_signals & SerialSignal_DCD)
  2174. strcat(stat_buf, "|CD");
  2175. if (info->serial_signals & SerialSignal_RI)
  2176. strcat(stat_buf, "|RI");
  2177. if (info->params.mode == MGSL_MODE_HDLC) {
  2178. seq_printf(m, " HDLC txok:%d rxok:%d",
  2179. info->icount.txok, info->icount.rxok);
  2180. if (info->icount.txunder)
  2181. seq_printf(m, " txunder:%d", info->icount.txunder);
  2182. if (info->icount.txabort)
  2183. seq_printf(m, " txabort:%d", info->icount.txabort);
  2184. if (info->icount.rxshort)
  2185. seq_printf(m, " rxshort:%d", info->icount.rxshort);
  2186. if (info->icount.rxlong)
  2187. seq_printf(m, " rxlong:%d", info->icount.rxlong);
  2188. if (info->icount.rxover)
  2189. seq_printf(m, " rxover:%d", info->icount.rxover);
  2190. if (info->icount.rxcrc)
  2191. seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
  2192. } else {
  2193. seq_printf(m, " ASYNC tx:%d rx:%d",
  2194. info->icount.tx, info->icount.rx);
  2195. if (info->icount.frame)
  2196. seq_printf(m, " fe:%d", info->icount.frame);
  2197. if (info->icount.parity)
  2198. seq_printf(m, " pe:%d", info->icount.parity);
  2199. if (info->icount.brk)
  2200. seq_printf(m, " brk:%d", info->icount.brk);
  2201. if (info->icount.overrun)
  2202. seq_printf(m, " oe:%d", info->icount.overrun);
  2203. }
  2204. /* Append serial signal status to end */
  2205. seq_printf(m, " %s\n", stat_buf+1);
  2206. seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2207. info->tx_active,info->bh_requested,info->bh_running,
  2208. info->pending_bh);
  2209. }
  2210. /* Called to print information about devices
  2211. */
  2212. static int mgslpc_proc_show(struct seq_file *m, void *v)
  2213. {
  2214. MGSLPC_INFO *info;
  2215. seq_printf(m, "synclink driver:%s\n", driver_version);
  2216. info = mgslpc_device_list;
  2217. while( info ) {
  2218. line_info(m, info);
  2219. info = info->next_device;
  2220. }
  2221. return 0;
  2222. }
  2223. static int mgslpc_proc_open(struct inode *inode, struct file *file)
  2224. {
  2225. return single_open(file, mgslpc_proc_show, NULL);
  2226. }
  2227. static const struct file_operations mgslpc_proc_fops = {
  2228. .owner = THIS_MODULE,
  2229. .open = mgslpc_proc_open,
  2230. .read = seq_read,
  2231. .llseek = seq_lseek,
  2232. .release = single_release,
  2233. };
  2234. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2235. {
  2236. /* each buffer has header and data */
  2237. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2238. /* calculate total allocation size for 8 buffers */
  2239. info->rx_buf_total_size = info->rx_buf_size * 8;
  2240. /* limit total allocated memory */
  2241. if (info->rx_buf_total_size > 0x10000)
  2242. info->rx_buf_total_size = 0x10000;
  2243. /* calculate number of buffers */
  2244. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2245. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2246. if (info->rx_buf == NULL)
  2247. return -ENOMEM;
  2248. rx_reset_buffers(info);
  2249. return 0;
  2250. }
  2251. static void rx_free_buffers(MGSLPC_INFO *info)
  2252. {
  2253. kfree(info->rx_buf);
  2254. info->rx_buf = NULL;
  2255. }
  2256. static int claim_resources(MGSLPC_INFO *info)
  2257. {
  2258. if (rx_alloc_buffers(info) < 0 ) {
  2259. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2260. release_resources(info);
  2261. return -ENODEV;
  2262. }
  2263. return 0;
  2264. }
  2265. static void release_resources(MGSLPC_INFO *info)
  2266. {
  2267. if (debug_level >= DEBUG_LEVEL_INFO)
  2268. printk("release_resources(%s)\n", info->device_name);
  2269. rx_free_buffers(info);
  2270. }
  2271. /* Add the specified device instance data structure to the
  2272. * global linked list of devices and increment the device count.
  2273. *
  2274. * Arguments: info pointer to device instance data
  2275. */
  2276. static void mgslpc_add_device(MGSLPC_INFO *info)
  2277. {
  2278. info->next_device = NULL;
  2279. info->line = mgslpc_device_count;
  2280. sprintf(info->device_name,"ttySLP%d",info->line);
  2281. if (info->line < MAX_DEVICE_COUNT) {
  2282. if (maxframe[info->line])
  2283. info->max_frame_size = maxframe[info->line];
  2284. }
  2285. mgslpc_device_count++;
  2286. if (!mgslpc_device_list)
  2287. mgslpc_device_list = info;
  2288. else {
  2289. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2290. while( current_dev->next_device )
  2291. current_dev = current_dev->next_device;
  2292. current_dev->next_device = info;
  2293. }
  2294. if (info->max_frame_size < 4096)
  2295. info->max_frame_size = 4096;
  2296. else if (info->max_frame_size > 65535)
  2297. info->max_frame_size = 65535;
  2298. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2299. info->device_name, info->io_base, info->irq_level);
  2300. #if SYNCLINK_GENERIC_HDLC
  2301. hdlcdev_init(info);
  2302. #endif
  2303. }
  2304. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2305. {
  2306. MGSLPC_INFO *info = mgslpc_device_list;
  2307. MGSLPC_INFO *last = NULL;
  2308. while(info) {
  2309. if (info == remove_info) {
  2310. if (last)
  2311. last->next_device = info->next_device;
  2312. else
  2313. mgslpc_device_list = info->next_device;
  2314. #if SYNCLINK_GENERIC_HDLC
  2315. hdlcdev_exit(info);
  2316. #endif
  2317. release_resources(info);
  2318. kfree(info);
  2319. mgslpc_device_count--;
  2320. return;
  2321. }
  2322. last = info;
  2323. info = info->next_device;
  2324. }
  2325. }
  2326. static struct pcmcia_device_id mgslpc_ids[] = {
  2327. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2328. PCMCIA_DEVICE_NULL
  2329. };
  2330. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2331. static struct pcmcia_driver mgslpc_driver = {
  2332. .owner = THIS_MODULE,
  2333. .drv = {
  2334. .name = "synclink_cs",
  2335. },
  2336. .probe = mgslpc_probe,
  2337. .remove = mgslpc_detach,
  2338. .id_table = mgslpc_ids,
  2339. .suspend = mgslpc_suspend,
  2340. .resume = mgslpc_resume,
  2341. };
  2342. static const struct tty_operations mgslpc_ops = {
  2343. .open = mgslpc_open,
  2344. .close = mgslpc_close,
  2345. .write = mgslpc_write,
  2346. .put_char = mgslpc_put_char,
  2347. .flush_chars = mgslpc_flush_chars,
  2348. .write_room = mgslpc_write_room,
  2349. .chars_in_buffer = mgslpc_chars_in_buffer,
  2350. .flush_buffer = mgslpc_flush_buffer,
  2351. .ioctl = mgslpc_ioctl,
  2352. .throttle = mgslpc_throttle,
  2353. .unthrottle = mgslpc_unthrottle,
  2354. .send_xchar = mgslpc_send_xchar,
  2355. .break_ctl = mgslpc_break,
  2356. .wait_until_sent = mgslpc_wait_until_sent,
  2357. .set_termios = mgslpc_set_termios,
  2358. .stop = tx_pause,
  2359. .start = tx_release,
  2360. .hangup = mgslpc_hangup,
  2361. .tiocmget = tiocmget,
  2362. .tiocmset = tiocmset,
  2363. .proc_fops = &mgslpc_proc_fops,
  2364. };
  2365. static void synclink_cs_cleanup(void)
  2366. {
  2367. int rc;
  2368. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2369. while(mgslpc_device_list)
  2370. mgslpc_remove_device(mgslpc_device_list);
  2371. if (serial_driver) {
  2372. if ((rc = tty_unregister_driver(serial_driver)))
  2373. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2374. __FILE__,__LINE__,rc);
  2375. put_tty_driver(serial_driver);
  2376. }
  2377. pcmcia_unregister_driver(&mgslpc_driver);
  2378. }
  2379. static int __init synclink_cs_init(void)
  2380. {
  2381. int rc;
  2382. if (break_on_load) {
  2383. mgslpc_get_text_ptr();
  2384. BREAKPOINT();
  2385. }
  2386. printk("%s %s\n", driver_name, driver_version);
  2387. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2388. return rc;
  2389. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2390. if (!serial_driver) {
  2391. rc = -ENOMEM;
  2392. goto error;
  2393. }
  2394. /* Initialize the tty_driver structure */
  2395. serial_driver->owner = THIS_MODULE;
  2396. serial_driver->driver_name = "synclink_cs";
  2397. serial_driver->name = "ttySLP";
  2398. serial_driver->major = ttymajor;
  2399. serial_driver->minor_start = 64;
  2400. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2401. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2402. serial_driver->init_termios = tty_std_termios;
  2403. serial_driver->init_termios.c_cflag =
  2404. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2405. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2406. tty_set_operations(serial_driver, &mgslpc_ops);
  2407. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2408. printk("%s(%d):Couldn't register serial driver\n",
  2409. __FILE__,__LINE__);
  2410. put_tty_driver(serial_driver);
  2411. serial_driver = NULL;
  2412. goto error;
  2413. }
  2414. printk("%s %s, tty major#%d\n",
  2415. driver_name, driver_version,
  2416. serial_driver->major);
  2417. return 0;
  2418. error:
  2419. synclink_cs_cleanup();
  2420. return rc;
  2421. }
  2422. static void __exit synclink_cs_exit(void)
  2423. {
  2424. synclink_cs_cleanup();
  2425. }
  2426. module_init(synclink_cs_init);
  2427. module_exit(synclink_cs_exit);
  2428. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2429. {
  2430. unsigned int M, N;
  2431. unsigned char val;
  2432. /* note:standard BRG mode is broken in V3.2 chip
  2433. * so enhanced mode is always used
  2434. */
  2435. if (rate) {
  2436. N = 3686400 / rate;
  2437. if (!N)
  2438. N = 1;
  2439. N >>= 1;
  2440. for (M = 1; N > 64 && M < 16; M++)
  2441. N >>= 1;
  2442. N--;
  2443. /* BGR[5..0] = N
  2444. * BGR[9..6] = M
  2445. * BGR[7..0] contained in BGR register
  2446. * BGR[9..8] contained in CCR2[7..6]
  2447. * divisor = (N+1)*2^M
  2448. *
  2449. * Note: M *must* not be zero (causes asymetric duty cycle)
  2450. */
  2451. write_reg(info, (unsigned char) (channel + BGR),
  2452. (unsigned char) ((M << 6) + N));
  2453. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2454. val |= ((M << 4) & 0xc0);
  2455. write_reg(info, (unsigned char) (channel + CCR2), val);
  2456. }
  2457. }
  2458. /* Enabled the AUX clock output at the specified frequency.
  2459. */
  2460. static void enable_auxclk(MGSLPC_INFO *info)
  2461. {
  2462. unsigned char val;
  2463. /* MODE
  2464. *
  2465. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2466. * 05 ADM Address Mode, 0 = no addr recognition
  2467. * 04 TMD Timer Mode, 0 = external
  2468. * 03 RAC Receiver Active, 0 = inactive
  2469. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2470. * 01 TRS Timer Resolution, 1=512
  2471. * 00 TLP Test Loop, 0 = no loop
  2472. *
  2473. * 1000 0010
  2474. */
  2475. val = 0x82;
  2476. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2477. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2478. val |= BIT2;
  2479. write_reg(info, CHB + MODE, val);
  2480. /* CCR0
  2481. *
  2482. * 07 PU Power Up, 1=active, 0=power down
  2483. * 06 MCE Master Clock Enable, 1=enabled
  2484. * 05 Reserved, 0
  2485. * 04..02 SC[2..0] Encoding
  2486. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2487. *
  2488. * 11000000
  2489. */
  2490. write_reg(info, CHB + CCR0, 0xc0);
  2491. /* CCR1
  2492. *
  2493. * 07 SFLG Shared Flag, 0 = disable shared flags
  2494. * 06 GALP Go Active On Loop, 0 = not used
  2495. * 05 GLP Go On Loop, 0 = not used
  2496. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2497. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2498. * 02..00 CM[2..0] Clock Mode
  2499. *
  2500. * 0001 0111
  2501. */
  2502. write_reg(info, CHB + CCR1, 0x17);
  2503. /* CCR2 (Channel B)
  2504. *
  2505. * 07..06 BGR[9..8] Baud rate bits 9..8
  2506. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2507. * 04 SSEL Clock source select, 1=submode b
  2508. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2509. * 02 RWX Read/Write Exchange 0=disabled
  2510. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2511. * 00 DIV, data inversion 0=disabled, 1=enabled
  2512. *
  2513. * 0011 1000
  2514. */
  2515. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2516. write_reg(info, CHB + CCR2, 0x38);
  2517. else
  2518. write_reg(info, CHB + CCR2, 0x30);
  2519. /* CCR4
  2520. *
  2521. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2522. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2523. * 05 TST1 Test Pin, 0=normal operation
  2524. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2525. * 03..02 Reserved, must be 0
  2526. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2527. *
  2528. * 0101 0000
  2529. */
  2530. write_reg(info, CHB + CCR4, 0x50);
  2531. /* if auxclk not enabled, set internal BRG so
  2532. * CTS transitions can be detected (requires TxC)
  2533. */
  2534. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2535. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2536. else
  2537. mgslpc_set_rate(info, CHB, 921600);
  2538. }
  2539. static void loopback_enable(MGSLPC_INFO *info)
  2540. {
  2541. unsigned char val;
  2542. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2543. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2544. write_reg(info, CHA + CCR1, val);
  2545. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2546. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2547. write_reg(info, CHA + CCR2, val);
  2548. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2549. if (info->params.clock_speed)
  2550. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2551. else
  2552. mgslpc_set_rate(info, CHA, 1843200);
  2553. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2554. val = read_reg(info, CHA + MODE) | BIT0;
  2555. write_reg(info, CHA + MODE, val);
  2556. }
  2557. static void hdlc_mode(MGSLPC_INFO *info)
  2558. {
  2559. unsigned char val;
  2560. unsigned char clkmode, clksubmode;
  2561. /* disable all interrupts */
  2562. irq_disable(info, CHA, 0xffff);
  2563. irq_disable(info, CHB, 0xffff);
  2564. port_irq_disable(info, 0xff);
  2565. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2566. clkmode = clksubmode = 0;
  2567. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2568. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2569. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2570. clkmode = 7;
  2571. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2572. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2573. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2574. clkmode = 7;
  2575. clksubmode = 1;
  2576. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2577. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2578. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2579. clkmode = 6;
  2580. clksubmode = 1;
  2581. } else {
  2582. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2583. clkmode = 6;
  2584. }
  2585. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2586. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2587. clksubmode = 1;
  2588. }
  2589. /* MODE
  2590. *
  2591. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2592. * 05 ADM Address Mode, 0 = no addr recognition
  2593. * 04 TMD Timer Mode, 0 = external
  2594. * 03 RAC Receiver Active, 0 = inactive
  2595. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2596. * 01 TRS Timer Resolution, 1=512
  2597. * 00 TLP Test Loop, 0 = no loop
  2598. *
  2599. * 1000 0010
  2600. */
  2601. val = 0x82;
  2602. if (info->params.loopback)
  2603. val |= BIT0;
  2604. /* preserve RTS state */
  2605. if (info->serial_signals & SerialSignal_RTS)
  2606. val |= BIT2;
  2607. write_reg(info, CHA + MODE, val);
  2608. /* CCR0
  2609. *
  2610. * 07 PU Power Up, 1=active, 0=power down
  2611. * 06 MCE Master Clock Enable, 1=enabled
  2612. * 05 Reserved, 0
  2613. * 04..02 SC[2..0] Encoding
  2614. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2615. *
  2616. * 11000000
  2617. */
  2618. val = 0xc0;
  2619. switch (info->params.encoding)
  2620. {
  2621. case HDLC_ENCODING_NRZI:
  2622. val |= BIT3;
  2623. break;
  2624. case HDLC_ENCODING_BIPHASE_SPACE:
  2625. val |= BIT4;
  2626. break; // FM0
  2627. case HDLC_ENCODING_BIPHASE_MARK:
  2628. val |= BIT4 + BIT2;
  2629. break; // FM1
  2630. case HDLC_ENCODING_BIPHASE_LEVEL:
  2631. val |= BIT4 + BIT3;
  2632. break; // Manchester
  2633. }
  2634. write_reg(info, CHA + CCR0, val);
  2635. /* CCR1
  2636. *
  2637. * 07 SFLG Shared Flag, 0 = disable shared flags
  2638. * 06 GALP Go Active On Loop, 0 = not used
  2639. * 05 GLP Go On Loop, 0 = not used
  2640. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2641. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2642. * 02..00 CM[2..0] Clock Mode
  2643. *
  2644. * 0001 0000
  2645. */
  2646. val = 0x10 + clkmode;
  2647. write_reg(info, CHA + CCR1, val);
  2648. /* CCR2
  2649. *
  2650. * 07..06 BGR[9..8] Baud rate bits 9..8
  2651. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2652. * 04 SSEL Clock source select, 1=submode b
  2653. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2654. * 02 RWX Read/Write Exchange 0=disabled
  2655. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2656. * 00 DIV, data inversion 0=disabled, 1=enabled
  2657. *
  2658. * 0000 0000
  2659. */
  2660. val = 0x00;
  2661. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2662. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2663. val |= BIT5;
  2664. if (clksubmode)
  2665. val |= BIT4;
  2666. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2667. val |= BIT1;
  2668. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2669. val |= BIT0;
  2670. write_reg(info, CHA + CCR2, val);
  2671. /* CCR3
  2672. *
  2673. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2674. * 05 EPT Enable preamble transmission, 1=enabled
  2675. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2676. * 03 CRL CRC Reset Level, 0=FFFF
  2677. * 02 RCRC Rx CRC 0=On 1=Off
  2678. * 01 TCRC Tx CRC 0=On 1=Off
  2679. * 00 PSD DPLL Phase Shift Disable
  2680. *
  2681. * 0000 0000
  2682. */
  2683. val = 0x00;
  2684. if (info->params.crc_type == HDLC_CRC_NONE)
  2685. val |= BIT2 + BIT1;
  2686. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2687. val |= BIT5;
  2688. switch (info->params.preamble_length)
  2689. {
  2690. case HDLC_PREAMBLE_LENGTH_16BITS:
  2691. val |= BIT6;
  2692. break;
  2693. case HDLC_PREAMBLE_LENGTH_32BITS:
  2694. val |= BIT6;
  2695. break;
  2696. case HDLC_PREAMBLE_LENGTH_64BITS:
  2697. val |= BIT7 + BIT6;
  2698. break;
  2699. }
  2700. write_reg(info, CHA + CCR3, val);
  2701. /* PRE - Preamble pattern */
  2702. val = 0;
  2703. switch (info->params.preamble)
  2704. {
  2705. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2706. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2707. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2708. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2709. }
  2710. write_reg(info, CHA + PRE, val);
  2711. /* CCR4
  2712. *
  2713. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2714. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2715. * 05 TST1 Test Pin, 0=normal operation
  2716. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2717. * 03..02 Reserved, must be 0
  2718. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2719. *
  2720. * 0101 0000
  2721. */
  2722. val = 0x50;
  2723. write_reg(info, CHA + CCR4, val);
  2724. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2725. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2726. else
  2727. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2728. /* RLCR Receive length check register
  2729. *
  2730. * 7 1=enable receive length check
  2731. * 6..0 Max frame length = (RL + 1) * 32
  2732. */
  2733. write_reg(info, CHA + RLCR, 0);
  2734. /* XBCH Transmit Byte Count High
  2735. *
  2736. * 07 DMA mode, 0 = interrupt driven
  2737. * 06 NRM, 0=ABM (ignored)
  2738. * 05 CAS Carrier Auto Start
  2739. * 04 XC Transmit Continuously (ignored)
  2740. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2741. *
  2742. * 0000 0000
  2743. */
  2744. val = 0x00;
  2745. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2746. val |= BIT5;
  2747. write_reg(info, CHA + XBCH, val);
  2748. enable_auxclk(info);
  2749. if (info->params.loopback || info->testing_irq)
  2750. loopback_enable(info);
  2751. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2752. {
  2753. irq_enable(info, CHB, IRQ_CTS);
  2754. /* PVR[3] 1=AUTO CTS active */
  2755. set_reg_bits(info, CHA + PVR, BIT3);
  2756. } else
  2757. clear_reg_bits(info, CHA + PVR, BIT3);
  2758. irq_enable(info, CHA,
  2759. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2760. IRQ_UNDERRUN + IRQ_TXFIFO);
  2761. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2762. wait_command_complete(info, CHA);
  2763. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2764. /* Master clock mode enabled above to allow reset commands
  2765. * to complete even if no data clocks are present.
  2766. *
  2767. * Disable master clock mode for normal communications because
  2768. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2769. * IRQ when in master clock mode.
  2770. *
  2771. * Leave master clock mode enabled for IRQ test because the
  2772. * timer IRQ used by the test can only happen in master clock mode.
  2773. */
  2774. if (!info->testing_irq)
  2775. clear_reg_bits(info, CHA + CCR0, BIT6);
  2776. tx_set_idle(info);
  2777. tx_stop(info);
  2778. rx_stop(info);
  2779. }
  2780. static void rx_stop(MGSLPC_INFO *info)
  2781. {
  2782. if (debug_level >= DEBUG_LEVEL_ISR)
  2783. printk("%s(%d):rx_stop(%s)\n",
  2784. __FILE__,__LINE__, info->device_name );
  2785. /* MODE:03 RAC Receiver Active, 0=inactive */
  2786. clear_reg_bits(info, CHA + MODE, BIT3);
  2787. info->rx_enabled = false;
  2788. info->rx_overflow = false;
  2789. }
  2790. static void rx_start(MGSLPC_INFO *info)
  2791. {
  2792. if (debug_level >= DEBUG_LEVEL_ISR)
  2793. printk("%s(%d):rx_start(%s)\n",
  2794. __FILE__,__LINE__, info->device_name );
  2795. rx_reset_buffers(info);
  2796. info->rx_enabled = false;
  2797. info->rx_overflow = false;
  2798. /* MODE:03 RAC Receiver Active, 1=active */
  2799. set_reg_bits(info, CHA + MODE, BIT3);
  2800. info->rx_enabled = true;
  2801. }
  2802. static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
  2803. {
  2804. if (debug_level >= DEBUG_LEVEL_ISR)
  2805. printk("%s(%d):tx_start(%s)\n",
  2806. __FILE__,__LINE__, info->device_name );
  2807. if (info->tx_count) {
  2808. /* If auto RTS enabled and RTS is inactive, then assert */
  2809. /* RTS and set a flag indicating that the driver should */
  2810. /* negate RTS when the transmission completes. */
  2811. info->drop_rts_on_tx_done = false;
  2812. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2813. get_signals(info);
  2814. if (!(info->serial_signals & SerialSignal_RTS)) {
  2815. info->serial_signals |= SerialSignal_RTS;
  2816. set_signals(info);
  2817. info->drop_rts_on_tx_done = true;
  2818. }
  2819. }
  2820. if (info->params.mode == MGSL_MODE_ASYNC) {
  2821. if (!info->tx_active) {
  2822. info->tx_active = true;
  2823. tx_ready(info, tty);
  2824. }
  2825. } else {
  2826. info->tx_active = true;
  2827. tx_ready(info, tty);
  2828. mod_timer(&info->tx_timer, jiffies +
  2829. msecs_to_jiffies(5000));
  2830. }
  2831. }
  2832. if (!info->tx_enabled)
  2833. info->tx_enabled = true;
  2834. }
  2835. static void tx_stop(MGSLPC_INFO *info)
  2836. {
  2837. if (debug_level >= DEBUG_LEVEL_ISR)
  2838. printk("%s(%d):tx_stop(%s)\n",
  2839. __FILE__,__LINE__, info->device_name );
  2840. del_timer(&info->tx_timer);
  2841. info->tx_enabled = false;
  2842. info->tx_active = false;
  2843. }
  2844. /* Reset the adapter to a known state and prepare it for further use.
  2845. */
  2846. static void reset_device(MGSLPC_INFO *info)
  2847. {
  2848. /* power up both channels (set BIT7) */
  2849. write_reg(info, CHA + CCR0, 0x80);
  2850. write_reg(info, CHB + CCR0, 0x80);
  2851. write_reg(info, CHA + MODE, 0);
  2852. write_reg(info, CHB + MODE, 0);
  2853. /* disable all interrupts */
  2854. irq_disable(info, CHA, 0xffff);
  2855. irq_disable(info, CHB, 0xffff);
  2856. port_irq_disable(info, 0xff);
  2857. /* PCR Port Configuration Register
  2858. *
  2859. * 07..04 DEC[3..0] Serial I/F select outputs
  2860. * 03 output, 1=AUTO CTS control enabled
  2861. * 02 RI Ring Indicator input 0=active
  2862. * 01 DSR input 0=active
  2863. * 00 DTR output 0=active
  2864. *
  2865. * 0000 0110
  2866. */
  2867. write_reg(info, PCR, 0x06);
  2868. /* PVR Port Value Register
  2869. *
  2870. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  2871. * 03 AUTO CTS output 1=enabled
  2872. * 02 RI Ring Indicator input
  2873. * 01 DSR input
  2874. * 00 DTR output (1=inactive)
  2875. *
  2876. * 0000 0001
  2877. */
  2878. // write_reg(info, PVR, PVR_DTR);
  2879. /* IPC Interrupt Port Configuration
  2880. *
  2881. * 07 VIS 1=Masked interrupts visible
  2882. * 06..05 Reserved, 0
  2883. * 04..03 SLA Slave address, 00 ignored
  2884. * 02 CASM Cascading Mode, 1=daisy chain
  2885. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  2886. *
  2887. * 0000 0101
  2888. */
  2889. write_reg(info, IPC, 0x05);
  2890. }
  2891. static void async_mode(MGSLPC_INFO *info)
  2892. {
  2893. unsigned char val;
  2894. /* disable all interrupts */
  2895. irq_disable(info, CHA, 0xffff);
  2896. irq_disable(info, CHB, 0xffff);
  2897. port_irq_disable(info, 0xff);
  2898. /* MODE
  2899. *
  2900. * 07 Reserved, 0
  2901. * 06 FRTS RTS State, 0=active
  2902. * 05 FCTS Flow Control on CTS
  2903. * 04 FLON Flow Control Enable
  2904. * 03 RAC Receiver Active, 0 = inactive
  2905. * 02 RTS 0=Auto RTS, 1=manual RTS
  2906. * 01 TRS Timer Resolution, 1=512
  2907. * 00 TLP Test Loop, 0 = no loop
  2908. *
  2909. * 0000 0110
  2910. */
  2911. val = 0x06;
  2912. if (info->params.loopback)
  2913. val |= BIT0;
  2914. /* preserve RTS state */
  2915. if (!(info->serial_signals & SerialSignal_RTS))
  2916. val |= BIT6;
  2917. write_reg(info, CHA + MODE, val);
  2918. /* CCR0
  2919. *
  2920. * 07 PU Power Up, 1=active, 0=power down
  2921. * 06 MCE Master Clock Enable, 1=enabled
  2922. * 05 Reserved, 0
  2923. * 04..02 SC[2..0] Encoding, 000=NRZ
  2924. * 01..00 SM[1..0] Serial Mode, 11=Async
  2925. *
  2926. * 1000 0011
  2927. */
  2928. write_reg(info, CHA + CCR0, 0x83);
  2929. /* CCR1
  2930. *
  2931. * 07..05 Reserved, 0
  2932. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2933. * 03 BCR Bit Clock Rate, 1=16x
  2934. * 02..00 CM[2..0] Clock Mode, 111=BRG
  2935. *
  2936. * 0001 1111
  2937. */
  2938. write_reg(info, CHA + CCR1, 0x1f);
  2939. /* CCR2 (channel A)
  2940. *
  2941. * 07..06 BGR[9..8] Baud rate bits 9..8
  2942. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2943. * 04 SSEL Clock source select, 1=submode b
  2944. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2945. * 02 RWX Read/Write Exchange 0=disabled
  2946. * 01 Reserved, 0
  2947. * 00 DIV, data inversion 0=disabled, 1=enabled
  2948. *
  2949. * 0001 0000
  2950. */
  2951. write_reg(info, CHA + CCR2, 0x10);
  2952. /* CCR3
  2953. *
  2954. * 07..01 Reserved, 0
  2955. * 00 PSD DPLL Phase Shift Disable
  2956. *
  2957. * 0000 0000
  2958. */
  2959. write_reg(info, CHA + CCR3, 0);
  2960. /* CCR4
  2961. *
  2962. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2963. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2964. * 05 TST1 Test Pin, 0=normal operation
  2965. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2966. * 03..00 Reserved, must be 0
  2967. *
  2968. * 0101 0000
  2969. */
  2970. write_reg(info, CHA + CCR4, 0x50);
  2971. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  2972. /* DAFO Data Format
  2973. *
  2974. * 07 Reserved, 0
  2975. * 06 XBRK transmit break, 0=normal operation
  2976. * 05 Stop bits (0=1, 1=2)
  2977. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  2978. * 02 PAREN Parity Enable
  2979. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  2980. *
  2981. */
  2982. val = 0x00;
  2983. if (info->params.data_bits != 8)
  2984. val |= BIT0; /* 7 bits */
  2985. if (info->params.stop_bits != 1)
  2986. val |= BIT5;
  2987. if (info->params.parity != ASYNC_PARITY_NONE)
  2988. {
  2989. val |= BIT2; /* Parity enable */
  2990. if (info->params.parity == ASYNC_PARITY_ODD)
  2991. val |= BIT3;
  2992. else
  2993. val |= BIT4;
  2994. }
  2995. write_reg(info, CHA + DAFO, val);
  2996. /* RFC Rx FIFO Control
  2997. *
  2998. * 07 Reserved, 0
  2999. * 06 DPS, 1=parity bit not stored in data byte
  3000. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3001. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3002. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3003. * 01 Reserved, 0
  3004. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3005. *
  3006. * 0101 1100
  3007. */
  3008. write_reg(info, CHA + RFC, 0x5c);
  3009. /* RLCR Receive length check register
  3010. *
  3011. * Max frame length = (RL + 1) * 32
  3012. */
  3013. write_reg(info, CHA + RLCR, 0);
  3014. /* XBCH Transmit Byte Count High
  3015. *
  3016. * 07 DMA mode, 0 = interrupt driven
  3017. * 06 NRM, 0=ABM (ignored)
  3018. * 05 CAS Carrier Auto Start
  3019. * 04 XC Transmit Continuously (ignored)
  3020. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3021. *
  3022. * 0000 0000
  3023. */
  3024. val = 0x00;
  3025. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3026. val |= BIT5;
  3027. write_reg(info, CHA + XBCH, val);
  3028. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3029. irq_enable(info, CHA, IRQ_CTS);
  3030. /* MODE:03 RAC Receiver Active, 1=active */
  3031. set_reg_bits(info, CHA + MODE, BIT3);
  3032. enable_auxclk(info);
  3033. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3034. irq_enable(info, CHB, IRQ_CTS);
  3035. /* PVR[3] 1=AUTO CTS active */
  3036. set_reg_bits(info, CHA + PVR, BIT3);
  3037. } else
  3038. clear_reg_bits(info, CHA + PVR, BIT3);
  3039. irq_enable(info, CHA,
  3040. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3041. IRQ_ALLSENT + IRQ_TXFIFO);
  3042. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3043. wait_command_complete(info, CHA);
  3044. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3045. }
  3046. /* Set the HDLC idle mode for the transmitter.
  3047. */
  3048. static void tx_set_idle(MGSLPC_INFO *info)
  3049. {
  3050. /* Note: ESCC2 only supports flags and one idle modes */
  3051. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3052. set_reg_bits(info, CHA + CCR1, BIT3);
  3053. else
  3054. clear_reg_bits(info, CHA + CCR1, BIT3);
  3055. }
  3056. /* get state of the V24 status (input) signals.
  3057. */
  3058. static void get_signals(MGSLPC_INFO *info)
  3059. {
  3060. unsigned char status = 0;
  3061. /* preserve DTR and RTS */
  3062. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3063. if (read_reg(info, CHB + VSTR) & BIT7)
  3064. info->serial_signals |= SerialSignal_DCD;
  3065. if (read_reg(info, CHB + STAR) & BIT1)
  3066. info->serial_signals |= SerialSignal_CTS;
  3067. status = read_reg(info, CHA + PVR);
  3068. if (!(status & PVR_RI))
  3069. info->serial_signals |= SerialSignal_RI;
  3070. if (!(status & PVR_DSR))
  3071. info->serial_signals |= SerialSignal_DSR;
  3072. }
  3073. /* Set the state of DTR and RTS based on contents of
  3074. * serial_signals member of device extension.
  3075. */
  3076. static void set_signals(MGSLPC_INFO *info)
  3077. {
  3078. unsigned char val;
  3079. val = read_reg(info, CHA + MODE);
  3080. if (info->params.mode == MGSL_MODE_ASYNC) {
  3081. if (info->serial_signals & SerialSignal_RTS)
  3082. val &= ~BIT6;
  3083. else
  3084. val |= BIT6;
  3085. } else {
  3086. if (info->serial_signals & SerialSignal_RTS)
  3087. val |= BIT2;
  3088. else
  3089. val &= ~BIT2;
  3090. }
  3091. write_reg(info, CHA + MODE, val);
  3092. if (info->serial_signals & SerialSignal_DTR)
  3093. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3094. else
  3095. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3096. }
  3097. static void rx_reset_buffers(MGSLPC_INFO *info)
  3098. {
  3099. RXBUF *buf;
  3100. int i;
  3101. info->rx_put = 0;
  3102. info->rx_get = 0;
  3103. info->rx_frame_count = 0;
  3104. for (i=0 ; i < info->rx_buf_count ; i++) {
  3105. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3106. buf->status = buf->count = 0;
  3107. }
  3108. }
  3109. /* Attempt to return a received HDLC frame
  3110. * Only frames received without errors are returned.
  3111. *
  3112. * Returns true if frame returned, otherwise false
  3113. */
  3114. static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
  3115. {
  3116. unsigned short status;
  3117. RXBUF *buf;
  3118. unsigned int framesize = 0;
  3119. unsigned long flags;
  3120. bool return_frame = false;
  3121. if (info->rx_frame_count == 0)
  3122. return false;
  3123. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3124. status = buf->status;
  3125. /* 07 VFR 1=valid frame
  3126. * 06 RDO 1=data overrun
  3127. * 05 CRC 1=OK, 0=error
  3128. * 04 RAB 1=frame aborted
  3129. */
  3130. if ((status & 0xf0) != 0xA0) {
  3131. if (!(status & BIT7) || (status & BIT4))
  3132. info->icount.rxabort++;
  3133. else if (status & BIT6)
  3134. info->icount.rxover++;
  3135. else if (!(status & BIT5)) {
  3136. info->icount.rxcrc++;
  3137. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3138. return_frame = true;
  3139. }
  3140. framesize = 0;
  3141. #if SYNCLINK_GENERIC_HDLC
  3142. {
  3143. info->netdev->stats.rx_errors++;
  3144. info->netdev->stats.rx_frame_errors++;
  3145. }
  3146. #endif
  3147. } else
  3148. return_frame = true;
  3149. if (return_frame)
  3150. framesize = buf->count;
  3151. if (debug_level >= DEBUG_LEVEL_BH)
  3152. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3153. __FILE__,__LINE__,info->device_name,status,framesize);
  3154. if (debug_level >= DEBUG_LEVEL_DATA)
  3155. trace_block(info, buf->data, framesize, 0);
  3156. if (framesize) {
  3157. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3158. framesize+1 > info->max_frame_size) ||
  3159. framesize > info->max_frame_size)
  3160. info->icount.rxlong++;
  3161. else {
  3162. if (status & BIT5)
  3163. info->icount.rxok++;
  3164. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3165. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3166. ++framesize;
  3167. }
  3168. #if SYNCLINK_GENERIC_HDLC
  3169. if (info->netcount)
  3170. hdlcdev_rx(info, buf->data, framesize);
  3171. else
  3172. #endif
  3173. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3174. }
  3175. }
  3176. spin_lock_irqsave(&info->lock,flags);
  3177. buf->status = buf->count = 0;
  3178. info->rx_frame_count--;
  3179. info->rx_get++;
  3180. if (info->rx_get >= info->rx_buf_count)
  3181. info->rx_get = 0;
  3182. spin_unlock_irqrestore(&info->lock,flags);
  3183. return true;
  3184. }
  3185. static bool register_test(MGSLPC_INFO *info)
  3186. {
  3187. static unsigned char patterns[] =
  3188. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3189. static unsigned int count = ARRAY_SIZE(patterns);
  3190. unsigned int i;
  3191. bool rc = true;
  3192. unsigned long flags;
  3193. spin_lock_irqsave(&info->lock,flags);
  3194. reset_device(info);
  3195. for (i = 0; i < count; i++) {
  3196. write_reg(info, XAD1, patterns[i]);
  3197. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3198. if ((read_reg(info, XAD1) != patterns[i]) ||
  3199. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3200. rc = false;
  3201. break;
  3202. }
  3203. }
  3204. spin_unlock_irqrestore(&info->lock,flags);
  3205. return rc;
  3206. }
  3207. static bool irq_test(MGSLPC_INFO *info)
  3208. {
  3209. unsigned long end_time;
  3210. unsigned long flags;
  3211. spin_lock_irqsave(&info->lock,flags);
  3212. reset_device(info);
  3213. info->testing_irq = true;
  3214. hdlc_mode(info);
  3215. info->irq_occurred = false;
  3216. /* init hdlc mode */
  3217. irq_enable(info, CHA, IRQ_TIMER);
  3218. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3219. issue_command(info, CHA, CMD_START_TIMER);
  3220. spin_unlock_irqrestore(&info->lock,flags);
  3221. end_time=100;
  3222. while(end_time-- && !info->irq_occurred) {
  3223. msleep_interruptible(10);
  3224. }
  3225. info->testing_irq = false;
  3226. spin_lock_irqsave(&info->lock,flags);
  3227. reset_device(info);
  3228. spin_unlock_irqrestore(&info->lock,flags);
  3229. return info->irq_occurred;
  3230. }
  3231. static int adapter_test(MGSLPC_INFO *info)
  3232. {
  3233. if (!register_test(info)) {
  3234. info->init_error = DiagStatus_AddressFailure;
  3235. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3236. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3237. return -ENODEV;
  3238. }
  3239. if (!irq_test(info)) {
  3240. info->init_error = DiagStatus_IrqFailure;
  3241. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3242. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3243. return -ENODEV;
  3244. }
  3245. if (debug_level >= DEBUG_LEVEL_INFO)
  3246. printk("%s(%d):device %s passed diagnostics\n",
  3247. __FILE__,__LINE__,info->device_name);
  3248. return 0;
  3249. }
  3250. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3251. {
  3252. int i;
  3253. int linecount;
  3254. if (xmit)
  3255. printk("%s tx data:\n",info->device_name);
  3256. else
  3257. printk("%s rx data:\n",info->device_name);
  3258. while(count) {
  3259. if (count > 16)
  3260. linecount = 16;
  3261. else
  3262. linecount = count;
  3263. for(i=0;i<linecount;i++)
  3264. printk("%02X ",(unsigned char)data[i]);
  3265. for(;i<17;i++)
  3266. printk(" ");
  3267. for(i=0;i<linecount;i++) {
  3268. if (data[i]>=040 && data[i]<=0176)
  3269. printk("%c",data[i]);
  3270. else
  3271. printk(".");
  3272. }
  3273. printk("\n");
  3274. data += linecount;
  3275. count -= linecount;
  3276. }
  3277. }
  3278. /* HDLC frame time out
  3279. * update stats and do tx completion processing
  3280. */
  3281. static void tx_timeout(unsigned long context)
  3282. {
  3283. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3284. unsigned long flags;
  3285. if ( debug_level >= DEBUG_LEVEL_INFO )
  3286. printk( "%s(%d):tx_timeout(%s)\n",
  3287. __FILE__,__LINE__,info->device_name);
  3288. if(info->tx_active &&
  3289. info->params.mode == MGSL_MODE_HDLC) {
  3290. info->icount.txtimeout++;
  3291. }
  3292. spin_lock_irqsave(&info->lock,flags);
  3293. info->tx_active = false;
  3294. info->tx_count = info->tx_put = info->tx_get = 0;
  3295. spin_unlock_irqrestore(&info->lock,flags);
  3296. #if SYNCLINK_GENERIC_HDLC
  3297. if (info->netcount)
  3298. hdlcdev_tx_done(info);
  3299. else
  3300. #endif
  3301. {
  3302. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3303. bh_transmit(info, tty);
  3304. tty_kref_put(tty);
  3305. }
  3306. }
  3307. #if SYNCLINK_GENERIC_HDLC
  3308. /**
  3309. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3310. * set encoding and frame check sequence (FCS) options
  3311. *
  3312. * dev pointer to network device structure
  3313. * encoding serial encoding setting
  3314. * parity FCS setting
  3315. *
  3316. * returns 0 if success, otherwise error code
  3317. */
  3318. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3319. unsigned short parity)
  3320. {
  3321. MGSLPC_INFO *info = dev_to_port(dev);
  3322. struct tty_struct *tty;
  3323. unsigned char new_encoding;
  3324. unsigned short new_crctype;
  3325. /* return error if TTY interface open */
  3326. if (info->port.count)
  3327. return -EBUSY;
  3328. switch (encoding)
  3329. {
  3330. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3331. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3332. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3333. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3334. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3335. default: return -EINVAL;
  3336. }
  3337. switch (parity)
  3338. {
  3339. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3340. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3341. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3342. default: return -EINVAL;
  3343. }
  3344. info->params.encoding = new_encoding;
  3345. info->params.crc_type = new_crctype;
  3346. /* if network interface up, reprogram hardware */
  3347. if (info->netcount) {
  3348. tty = tty_port_tty_get(&info->port);
  3349. mgslpc_program_hw(info, tty);
  3350. tty_kref_put(tty);
  3351. }
  3352. return 0;
  3353. }
  3354. /**
  3355. * called by generic HDLC layer to send frame
  3356. *
  3357. * skb socket buffer containing HDLC frame
  3358. * dev pointer to network device structure
  3359. */
  3360. static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
  3361. struct net_device *dev)
  3362. {
  3363. MGSLPC_INFO *info = dev_to_port(dev);
  3364. unsigned long flags;
  3365. if (debug_level >= DEBUG_LEVEL_INFO)
  3366. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3367. /* stop sending until this frame completes */
  3368. netif_stop_queue(dev);
  3369. /* copy data to device buffers */
  3370. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3371. info->tx_get = 0;
  3372. info->tx_put = info->tx_count = skb->len;
  3373. /* update network statistics */
  3374. dev->stats.tx_packets++;
  3375. dev->stats.tx_bytes += skb->len;
  3376. /* done with socket buffer, so free it */
  3377. dev_kfree_skb(skb);
  3378. /* save start time for transmit timeout detection */
  3379. dev->trans_start = jiffies;
  3380. /* start hardware transmitter if necessary */
  3381. spin_lock_irqsave(&info->lock,flags);
  3382. if (!info->tx_active) {
  3383. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3384. tx_start(info, tty);
  3385. tty_kref_put(tty);
  3386. }
  3387. spin_unlock_irqrestore(&info->lock,flags);
  3388. return NETDEV_TX_OK;
  3389. }
  3390. /**
  3391. * called by network layer when interface enabled
  3392. * claim resources and initialize hardware
  3393. *
  3394. * dev pointer to network device structure
  3395. *
  3396. * returns 0 if success, otherwise error code
  3397. */
  3398. static int hdlcdev_open(struct net_device *dev)
  3399. {
  3400. MGSLPC_INFO *info = dev_to_port(dev);
  3401. struct tty_struct *tty;
  3402. int rc;
  3403. unsigned long flags;
  3404. if (debug_level >= DEBUG_LEVEL_INFO)
  3405. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3406. /* generic HDLC layer open processing */
  3407. if ((rc = hdlc_open(dev)))
  3408. return rc;
  3409. /* arbitrate between network and tty opens */
  3410. spin_lock_irqsave(&info->netlock, flags);
  3411. if (info->port.count != 0 || info->netcount != 0) {
  3412. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3413. spin_unlock_irqrestore(&info->netlock, flags);
  3414. return -EBUSY;
  3415. }
  3416. info->netcount=1;
  3417. spin_unlock_irqrestore(&info->netlock, flags);
  3418. tty = tty_port_tty_get(&info->port);
  3419. /* claim resources and init adapter */
  3420. if ((rc = startup(info, tty)) != 0) {
  3421. tty_kref_put(tty);
  3422. spin_lock_irqsave(&info->netlock, flags);
  3423. info->netcount=0;
  3424. spin_unlock_irqrestore(&info->netlock, flags);
  3425. return rc;
  3426. }
  3427. /* assert DTR and RTS, apply hardware settings */
  3428. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3429. mgslpc_program_hw(info, tty);
  3430. tty_kref_put(tty);
  3431. /* enable network layer transmit */
  3432. dev->trans_start = jiffies;
  3433. netif_start_queue(dev);
  3434. /* inform generic HDLC layer of current DCD status */
  3435. spin_lock_irqsave(&info->lock, flags);
  3436. get_signals(info);
  3437. spin_unlock_irqrestore(&info->lock, flags);
  3438. if (info->serial_signals & SerialSignal_DCD)
  3439. netif_carrier_on(dev);
  3440. else
  3441. netif_carrier_off(dev);
  3442. return 0;
  3443. }
  3444. /**
  3445. * called by network layer when interface is disabled
  3446. * shutdown hardware and release resources
  3447. *
  3448. * dev pointer to network device structure
  3449. *
  3450. * returns 0 if success, otherwise error code
  3451. */
  3452. static int hdlcdev_close(struct net_device *dev)
  3453. {
  3454. MGSLPC_INFO *info = dev_to_port(dev);
  3455. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3456. unsigned long flags;
  3457. if (debug_level >= DEBUG_LEVEL_INFO)
  3458. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3459. netif_stop_queue(dev);
  3460. /* shutdown adapter and release resources */
  3461. shutdown(info, tty);
  3462. tty_kref_put(tty);
  3463. hdlc_close(dev);
  3464. spin_lock_irqsave(&info->netlock, flags);
  3465. info->netcount=0;
  3466. spin_unlock_irqrestore(&info->netlock, flags);
  3467. return 0;
  3468. }
  3469. /**
  3470. * called by network layer to process IOCTL call to network device
  3471. *
  3472. * dev pointer to network device structure
  3473. * ifr pointer to network interface request structure
  3474. * cmd IOCTL command code
  3475. *
  3476. * returns 0 if success, otherwise error code
  3477. */
  3478. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3479. {
  3480. const size_t size = sizeof(sync_serial_settings);
  3481. sync_serial_settings new_line;
  3482. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3483. MGSLPC_INFO *info = dev_to_port(dev);
  3484. unsigned int flags;
  3485. if (debug_level >= DEBUG_LEVEL_INFO)
  3486. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3487. /* return error if TTY interface open */
  3488. if (info->port.count)
  3489. return -EBUSY;
  3490. if (cmd != SIOCWANDEV)
  3491. return hdlc_ioctl(dev, ifr, cmd);
  3492. switch(ifr->ifr_settings.type) {
  3493. case IF_GET_IFACE: /* return current sync_serial_settings */
  3494. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3495. if (ifr->ifr_settings.size < size) {
  3496. ifr->ifr_settings.size = size; /* data size wanted */
  3497. return -ENOBUFS;
  3498. }
  3499. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3500. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3501. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3502. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3503. switch (flags){
  3504. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3505. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3506. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3507. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3508. default: new_line.clock_type = CLOCK_DEFAULT;
  3509. }
  3510. new_line.clock_rate = info->params.clock_speed;
  3511. new_line.loopback = info->params.loopback ? 1:0;
  3512. if (copy_to_user(line, &new_line, size))
  3513. return -EFAULT;
  3514. return 0;
  3515. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3516. if(!capable(CAP_NET_ADMIN))
  3517. return -EPERM;
  3518. if (copy_from_user(&new_line, line, size))
  3519. return -EFAULT;
  3520. switch (new_line.clock_type)
  3521. {
  3522. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3523. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3524. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3525. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3526. case CLOCK_DEFAULT: flags = info->params.flags &
  3527. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3528. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3529. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3530. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3531. default: return -EINVAL;
  3532. }
  3533. if (new_line.loopback != 0 && new_line.loopback != 1)
  3534. return -EINVAL;
  3535. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3536. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3537. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3538. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3539. info->params.flags |= flags;
  3540. info->params.loopback = new_line.loopback;
  3541. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3542. info->params.clock_speed = new_line.clock_rate;
  3543. else
  3544. info->params.clock_speed = 0;
  3545. /* if network interface up, reprogram hardware */
  3546. if (info->netcount) {
  3547. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3548. mgslpc_program_hw(info, tty);
  3549. tty_kref_put(tty);
  3550. }
  3551. return 0;
  3552. default:
  3553. return hdlc_ioctl(dev, ifr, cmd);
  3554. }
  3555. }
  3556. /**
  3557. * called by network layer when transmit timeout is detected
  3558. *
  3559. * dev pointer to network device structure
  3560. */
  3561. static void hdlcdev_tx_timeout(struct net_device *dev)
  3562. {
  3563. MGSLPC_INFO *info = dev_to_port(dev);
  3564. unsigned long flags;
  3565. if (debug_level >= DEBUG_LEVEL_INFO)
  3566. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3567. dev->stats.tx_errors++;
  3568. dev->stats.tx_aborted_errors++;
  3569. spin_lock_irqsave(&info->lock,flags);
  3570. tx_stop(info);
  3571. spin_unlock_irqrestore(&info->lock,flags);
  3572. netif_wake_queue(dev);
  3573. }
  3574. /**
  3575. * called by device driver when transmit completes
  3576. * reenable network layer transmit if stopped
  3577. *
  3578. * info pointer to device instance information
  3579. */
  3580. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3581. {
  3582. if (netif_queue_stopped(info->netdev))
  3583. netif_wake_queue(info->netdev);
  3584. }
  3585. /**
  3586. * called by device driver when frame received
  3587. * pass frame to network layer
  3588. *
  3589. * info pointer to device instance information
  3590. * buf pointer to buffer contianing frame data
  3591. * size count of data bytes in buf
  3592. */
  3593. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3594. {
  3595. struct sk_buff *skb = dev_alloc_skb(size);
  3596. struct net_device *dev = info->netdev;
  3597. if (debug_level >= DEBUG_LEVEL_INFO)
  3598. printk("hdlcdev_rx(%s)\n",dev->name);
  3599. if (skb == NULL) {
  3600. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3601. dev->stats.rx_dropped++;
  3602. return;
  3603. }
  3604. memcpy(skb_put(skb, size), buf, size);
  3605. skb->protocol = hdlc_type_trans(skb, dev);
  3606. dev->stats.rx_packets++;
  3607. dev->stats.rx_bytes += size;
  3608. netif_rx(skb);
  3609. }
  3610. static const struct net_device_ops hdlcdev_ops = {
  3611. .ndo_open = hdlcdev_open,
  3612. .ndo_stop = hdlcdev_close,
  3613. .ndo_change_mtu = hdlc_change_mtu,
  3614. .ndo_start_xmit = hdlc_start_xmit,
  3615. .ndo_do_ioctl = hdlcdev_ioctl,
  3616. .ndo_tx_timeout = hdlcdev_tx_timeout,
  3617. };
  3618. /**
  3619. * called by device driver when adding device instance
  3620. * do generic HDLC initialization
  3621. *
  3622. * info pointer to device instance information
  3623. *
  3624. * returns 0 if success, otherwise error code
  3625. */
  3626. static int hdlcdev_init(MGSLPC_INFO *info)
  3627. {
  3628. int rc;
  3629. struct net_device *dev;
  3630. hdlc_device *hdlc;
  3631. /* allocate and initialize network and HDLC layer objects */
  3632. if (!(dev = alloc_hdlcdev(info))) {
  3633. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3634. return -ENOMEM;
  3635. }
  3636. /* for network layer reporting purposes only */
  3637. dev->base_addr = info->io_base;
  3638. dev->irq = info->irq_level;
  3639. /* network layer callbacks and settings */
  3640. dev->netdev_ops = &hdlcdev_ops;
  3641. dev->watchdog_timeo = 10 * HZ;
  3642. dev->tx_queue_len = 50;
  3643. /* generic HDLC layer callbacks and settings */
  3644. hdlc = dev_to_hdlc(dev);
  3645. hdlc->attach = hdlcdev_attach;
  3646. hdlc->xmit = hdlcdev_xmit;
  3647. /* register objects with HDLC layer */
  3648. if ((rc = register_hdlc_device(dev))) {
  3649. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3650. free_netdev(dev);
  3651. return rc;
  3652. }
  3653. info->netdev = dev;
  3654. return 0;
  3655. }
  3656. /**
  3657. * called by device driver when removing device instance
  3658. * do generic HDLC cleanup
  3659. *
  3660. * info pointer to device instance information
  3661. */
  3662. static void hdlcdev_exit(MGSLPC_INFO *info)
  3663. {
  3664. unregister_hdlc_device(info->netdev);
  3665. free_netdev(info->netdev);
  3666. info->netdev = NULL;
  3667. }
  3668. #endif /* CONFIG_HDLC */