board-da850-evm.c 21 KB

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  1. /*
  2. * TI DA850/OMAP-L138 EVM board
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Derived from: arch/arm/mach-davinci/board-da830-evm.c
  7. * Original Copyrights follow:
  8. *
  9. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c/at24.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/mfd/tps6507x.h>
  21. #include <linux/gpio.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/nand.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/mtd/physmap.h>
  27. #include <linux/regulator/machine.h>
  28. #include <linux/regulator/tps6507x.h>
  29. #include <linux/mfd/tps6507x.h>
  30. #include <linux/input/tps6507x-ts.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <mach/cp_intc.h>
  34. #include <mach/da8xx.h>
  35. #include <mach/nand.h>
  36. #include <mach/mux.h>
  37. #include <mach/aemif.h>
  38. #define DA850_EVM_PHY_MASK 0x1
  39. #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  40. #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
  41. #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
  42. #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
  43. #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
  44. #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
  45. static struct mtd_partition da850_evm_norflash_partition[] = {
  46. {
  47. .name = "bootloaders + env",
  48. .offset = 0,
  49. .size = SZ_512K,
  50. .mask_flags = MTD_WRITEABLE,
  51. },
  52. {
  53. .name = "kernel",
  54. .offset = MTDPART_OFS_APPEND,
  55. .size = SZ_2M,
  56. .mask_flags = 0,
  57. },
  58. {
  59. .name = "filesystem",
  60. .offset = MTDPART_OFS_APPEND,
  61. .size = MTDPART_SIZ_FULL,
  62. .mask_flags = 0,
  63. },
  64. };
  65. static struct physmap_flash_data da850_evm_norflash_data = {
  66. .width = 2,
  67. .parts = da850_evm_norflash_partition,
  68. .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
  69. };
  70. static struct resource da850_evm_norflash_resource[] = {
  71. {
  72. .start = DA8XX_AEMIF_CS2_BASE,
  73. .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
  74. .flags = IORESOURCE_MEM,
  75. },
  76. };
  77. static struct platform_device da850_evm_norflash_device = {
  78. .name = "physmap-flash",
  79. .id = 0,
  80. .dev = {
  81. .platform_data = &da850_evm_norflash_data,
  82. },
  83. .num_resources = 1,
  84. .resource = da850_evm_norflash_resource,
  85. };
  86. static struct davinci_pm_config da850_pm_pdata = {
  87. .sleepcount = 128,
  88. };
  89. static struct platform_device da850_pm_device = {
  90. .name = "pm-davinci",
  91. .dev = {
  92. .platform_data = &da850_pm_pdata,
  93. },
  94. .id = -1,
  95. };
  96. /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  97. * (128K blocks). It may be used instead of the (default) SPI flash
  98. * to boot, using TI's tools to install the secondary boot loader
  99. * (UBL) and U-Boot.
  100. */
  101. static struct mtd_partition da850_evm_nandflash_partition[] = {
  102. {
  103. .name = "u-boot env",
  104. .offset = 0,
  105. .size = SZ_128K,
  106. .mask_flags = MTD_WRITEABLE,
  107. },
  108. {
  109. .name = "UBL",
  110. .offset = MTDPART_OFS_APPEND,
  111. .size = SZ_128K,
  112. .mask_flags = MTD_WRITEABLE,
  113. },
  114. {
  115. .name = "u-boot",
  116. .offset = MTDPART_OFS_APPEND,
  117. .size = 4 * SZ_128K,
  118. .mask_flags = MTD_WRITEABLE,
  119. },
  120. {
  121. .name = "kernel",
  122. .offset = 0x200000,
  123. .size = SZ_2M,
  124. .mask_flags = 0,
  125. },
  126. {
  127. .name = "filesystem",
  128. .offset = MTDPART_OFS_APPEND,
  129. .size = MTDPART_SIZ_FULL,
  130. .mask_flags = 0,
  131. },
  132. };
  133. static struct davinci_aemif_timing da850_evm_nandflash_timing = {
  134. .wsetup = 24,
  135. .wstrobe = 21,
  136. .whold = 14,
  137. .rsetup = 19,
  138. .rstrobe = 50,
  139. .rhold = 0,
  140. .ta = 20,
  141. };
  142. static struct davinci_nand_pdata da850_evm_nandflash_data = {
  143. .parts = da850_evm_nandflash_partition,
  144. .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
  145. .ecc_mode = NAND_ECC_HW,
  146. .ecc_bits = 4,
  147. .options = NAND_USE_FLASH_BBT,
  148. .timing = &da850_evm_nandflash_timing,
  149. };
  150. static struct resource da850_evm_nandflash_resource[] = {
  151. {
  152. .start = DA8XX_AEMIF_CS3_BASE,
  153. .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
  154. .flags = IORESOURCE_MEM,
  155. },
  156. {
  157. .start = DA8XX_AEMIF_CTL_BASE,
  158. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. };
  162. static struct platform_device da850_evm_nandflash_device = {
  163. .name = "davinci_nand",
  164. .id = 1,
  165. .dev = {
  166. .platform_data = &da850_evm_nandflash_data,
  167. },
  168. .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
  169. .resource = da850_evm_nandflash_resource,
  170. };
  171. static struct platform_device *da850_evm_devices[] __initdata = {
  172. &da850_evm_nandflash_device,
  173. &da850_evm_norflash_device,
  174. };
  175. #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
  176. #define DA8XX_AEMIF_ASIZE_16BIT 0x1
  177. static void __init da850_evm_init_nor(void)
  178. {
  179. void __iomem *aemif_addr;
  180. aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
  181. /* Configure data bus width of CS2 to 16 bit */
  182. writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
  183. DA8XX_AEMIF_ASIZE_16BIT,
  184. aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
  185. iounmap(aemif_addr);
  186. }
  187. static const short da850_evm_nand_pins[] = {
  188. DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
  189. DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
  190. DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
  191. DA850_NEMA_WE, DA850_NEMA_OE,
  192. -1
  193. };
  194. static const short da850_evm_nor_pins[] = {
  195. DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
  196. DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
  197. DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
  198. DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
  199. DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
  200. DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
  201. DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
  202. DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
  203. DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
  204. DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
  205. DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
  206. DA850_EMA_A_22, DA850_EMA_A_23,
  207. -1
  208. };
  209. static u32 ui_card_detected;
  210. #if defined(CONFIG_MMC_DAVINCI) || \
  211. defined(CONFIG_MMC_DAVINCI_MODULE)
  212. #define HAS_MMC 1
  213. #else
  214. #define HAS_MMC 0
  215. #endif
  216. static inline void da850_evm_setup_nor_nand(void)
  217. {
  218. int ret = 0;
  219. if (ui_card_detected & !HAS_MMC) {
  220. ret = davinci_cfg_reg_list(da850_evm_nand_pins);
  221. if (ret)
  222. pr_warning("da850_evm_init: nand mux setup failed: "
  223. "%d\n", ret);
  224. ret = davinci_cfg_reg_list(da850_evm_nor_pins);
  225. if (ret)
  226. pr_warning("da850_evm_init: nor mux setup failed: %d\n",
  227. ret);
  228. da850_evm_init_nor();
  229. platform_add_devices(da850_evm_devices,
  230. ARRAY_SIZE(da850_evm_devices));
  231. }
  232. }
  233. #ifdef CONFIG_DA850_UI_RMII
  234. static inline void da850_evm_setup_emac_rmii(int rmii_sel)
  235. {
  236. struct davinci_soc_info *soc_info = &davinci_soc_info;
  237. soc_info->emac_pdata->rmii_en = 1;
  238. gpio_set_value(rmii_sel, 0);
  239. }
  240. #else
  241. static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
  242. #endif
  243. static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
  244. unsigned ngpio, void *c)
  245. {
  246. int sel_a, sel_b, sel_c, ret;
  247. sel_a = gpio + 7;
  248. sel_b = gpio + 6;
  249. sel_c = gpio + 5;
  250. ret = gpio_request(sel_a, "sel_a");
  251. if (ret) {
  252. pr_warning("Cannot open UI expander pin %d\n", sel_a);
  253. goto exp_setup_sela_fail;
  254. }
  255. ret = gpio_request(sel_b, "sel_b");
  256. if (ret) {
  257. pr_warning("Cannot open UI expander pin %d\n", sel_b);
  258. goto exp_setup_selb_fail;
  259. }
  260. ret = gpio_request(sel_c, "sel_c");
  261. if (ret) {
  262. pr_warning("Cannot open UI expander pin %d\n", sel_c);
  263. goto exp_setup_selc_fail;
  264. }
  265. /* deselect all functionalities */
  266. gpio_direction_output(sel_a, 1);
  267. gpio_direction_output(sel_b, 1);
  268. gpio_direction_output(sel_c, 1);
  269. ui_card_detected = 1;
  270. pr_info("DA850/OMAP-L138 EVM UI card detected\n");
  271. da850_evm_setup_nor_nand();
  272. da850_evm_setup_emac_rmii(sel_a);
  273. return 0;
  274. exp_setup_selc_fail:
  275. gpio_free(sel_b);
  276. exp_setup_selb_fail:
  277. gpio_free(sel_a);
  278. exp_setup_sela_fail:
  279. return ret;
  280. }
  281. static int da850_evm_ui_expander_teardown(struct i2c_client *client,
  282. unsigned gpio, unsigned ngpio, void *c)
  283. {
  284. /* deselect all functionalities */
  285. gpio_set_value(gpio + 5, 1);
  286. gpio_set_value(gpio + 6, 1);
  287. gpio_set_value(gpio + 7, 1);
  288. gpio_free(gpio + 5);
  289. gpio_free(gpio + 6);
  290. gpio_free(gpio + 7);
  291. return 0;
  292. }
  293. static struct pca953x_platform_data da850_evm_ui_expander_info = {
  294. .gpio_base = DAVINCI_N_GPIO,
  295. .setup = da850_evm_ui_expander_setup,
  296. .teardown = da850_evm_ui_expander_teardown,
  297. };
  298. static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
  299. {
  300. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  301. },
  302. {
  303. I2C_BOARD_INFO("tca6416", 0x20),
  304. .platform_data = &da850_evm_ui_expander_info,
  305. },
  306. };
  307. static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
  308. .bus_freq = 100, /* kHz */
  309. .bus_delay = 0, /* usec */
  310. };
  311. static struct davinci_uart_config da850_evm_uart_config __initdata = {
  312. .enabled_uarts = 0x7,
  313. };
  314. /* davinci da850 evm audio machine driver */
  315. static u8 da850_iis_serializer_direction[] = {
  316. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  317. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  318. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
  319. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  320. };
  321. static struct snd_platform_data da850_evm_snd_data = {
  322. .tx_dma_offset = 0x2000,
  323. .rx_dma_offset = 0x2000,
  324. .op_mode = DAVINCI_MCASP_IIS_MODE,
  325. .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
  326. .tdm_slots = 2,
  327. .serial_dir = da850_iis_serializer_direction,
  328. .asp_chan_q = EVENTQ_1,
  329. .version = MCASP_VERSION_2,
  330. .txnumevt = 1,
  331. .rxnumevt = 1,
  332. };
  333. static int da850_evm_mmc_get_ro(int index)
  334. {
  335. return gpio_get_value(DA850_MMCSD_WP_PIN);
  336. }
  337. static int da850_evm_mmc_get_cd(int index)
  338. {
  339. return !gpio_get_value(DA850_MMCSD_CD_PIN);
  340. }
  341. static struct davinci_mmc_config da850_mmc_config = {
  342. .get_ro = da850_evm_mmc_get_ro,
  343. .get_cd = da850_evm_mmc_get_cd,
  344. .wires = 4,
  345. .max_freq = 50000000,
  346. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  347. .version = MMC_CTLR_VERSION_2,
  348. };
  349. static void da850_panel_power_ctrl(int val)
  350. {
  351. /* lcd backlight */
  352. gpio_set_value(DA850_LCD_BL_PIN, val);
  353. /* lcd power */
  354. gpio_set_value(DA850_LCD_PWR_PIN, val);
  355. }
  356. static int da850_lcd_hw_init(void)
  357. {
  358. int status;
  359. status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
  360. if (status < 0)
  361. return status;
  362. status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
  363. if (status < 0) {
  364. gpio_free(DA850_LCD_BL_PIN);
  365. return status;
  366. }
  367. gpio_direction_output(DA850_LCD_BL_PIN, 0);
  368. gpio_direction_output(DA850_LCD_PWR_PIN, 0);
  369. /* Switch off panel power and backlight */
  370. da850_panel_power_ctrl(0);
  371. /* Switch on panel power and backlight */
  372. da850_panel_power_ctrl(1);
  373. return 0;
  374. }
  375. /* TPS65070 voltage regulator support */
  376. /* 3.3V */
  377. static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
  378. {
  379. .supply = "usb0_vdda33",
  380. },
  381. {
  382. .supply = "usb1_vdda33",
  383. },
  384. };
  385. /* 3.3V or 1.8V */
  386. static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
  387. {
  388. .supply = "dvdd3318_a",
  389. },
  390. {
  391. .supply = "dvdd3318_b",
  392. },
  393. {
  394. .supply = "dvdd3318_c",
  395. },
  396. };
  397. /* 1.2V */
  398. static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
  399. {
  400. .supply = "cvdd",
  401. },
  402. };
  403. /* 1.8V LDO */
  404. static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
  405. {
  406. .supply = "sata_vddr",
  407. },
  408. {
  409. .supply = "usb0_vdda18",
  410. },
  411. {
  412. .supply = "usb1_vdda18",
  413. },
  414. {
  415. .supply = "ddr_dvdd18",
  416. },
  417. };
  418. /* 1.2V LDO */
  419. static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
  420. {
  421. .supply = "sata_vdd",
  422. },
  423. {
  424. .supply = "pll0_vdda",
  425. },
  426. {
  427. .supply = "pll1_vdda",
  428. },
  429. {
  430. .supply = "usbs_cvdd",
  431. },
  432. {
  433. .supply = "vddarnwa1",
  434. },
  435. };
  436. /* We take advantage of the fact that both defdcdc{2,3} are tied high */
  437. static struct tps6507x_reg_platform_data tps6507x_platform_data = {
  438. .defdcdc_default = true,
  439. };
  440. static struct regulator_init_data tps65070_regulator_data[] = {
  441. /* dcdc1 */
  442. {
  443. .constraints = {
  444. .min_uV = 3150000,
  445. .max_uV = 3450000,
  446. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  447. REGULATOR_CHANGE_STATUS),
  448. .boot_on = 1,
  449. },
  450. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
  451. .consumer_supplies = tps65070_dcdc1_consumers,
  452. },
  453. /* dcdc2 */
  454. {
  455. .constraints = {
  456. .min_uV = 1710000,
  457. .max_uV = 3450000,
  458. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  459. REGULATOR_CHANGE_STATUS),
  460. .boot_on = 1,
  461. },
  462. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
  463. .consumer_supplies = tps65070_dcdc2_consumers,
  464. .driver_data = &tps6507x_platform_data,
  465. },
  466. /* dcdc3 */
  467. {
  468. .constraints = {
  469. .min_uV = 950000,
  470. .max_uV = 1320000,
  471. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  472. REGULATOR_CHANGE_STATUS),
  473. .boot_on = 1,
  474. },
  475. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
  476. .consumer_supplies = tps65070_dcdc3_consumers,
  477. .driver_data = &tps6507x_platform_data,
  478. },
  479. /* ldo1 */
  480. {
  481. .constraints = {
  482. .min_uV = 1710000,
  483. .max_uV = 1890000,
  484. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  485. REGULATOR_CHANGE_STATUS),
  486. .boot_on = 1,
  487. },
  488. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
  489. .consumer_supplies = tps65070_ldo1_consumers,
  490. },
  491. /* ldo2 */
  492. {
  493. .constraints = {
  494. .min_uV = 1140000,
  495. .max_uV = 1320000,
  496. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  497. REGULATOR_CHANGE_STATUS),
  498. .boot_on = 1,
  499. },
  500. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
  501. .consumer_supplies = tps65070_ldo2_consumers,
  502. },
  503. };
  504. static struct touchscreen_init_data tps6507x_touchscreen_data = {
  505. .poll_period = 30, /* ms between touch samples */
  506. .min_pressure = 0x30, /* minimum pressure to trigger touch */
  507. .vref = 0, /* turn off vref when not using A/D */
  508. .vendor = 0, /* /sys/class/input/input?/id/vendor */
  509. .product = 65070, /* /sys/class/input/input?/id/product */
  510. .version = 0x100, /* /sys/class/input/input?/id/version */
  511. };
  512. static struct tps6507x_board tps_board = {
  513. .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
  514. .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
  515. };
  516. static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
  517. {
  518. I2C_BOARD_INFO("tps6507x", 0x48),
  519. .platform_data = &tps_board,
  520. },
  521. };
  522. static int __init pmic_tps65070_init(void)
  523. {
  524. return i2c_register_board_info(1, da850evm_tps65070_info,
  525. ARRAY_SIZE(da850evm_tps65070_info));
  526. }
  527. static const short da850_evm_lcdc_pins[] = {
  528. DA850_GPIO2_8, DA850_GPIO2_15,
  529. -1
  530. };
  531. static const short da850_evm_mii_pins[] = {
  532. DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
  533. DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
  534. DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
  535. DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
  536. DA850_MDIO_D,
  537. -1
  538. };
  539. static const short da850_evm_rmii_pins[] = {
  540. DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
  541. DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
  542. DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
  543. DA850_MDIO_D,
  544. -1
  545. };
  546. static int __init da850_evm_config_emac(void)
  547. {
  548. void __iomem *cfg_chip3_base;
  549. int ret;
  550. u32 val;
  551. struct davinci_soc_info *soc_info = &davinci_soc_info;
  552. u8 rmii_en = soc_info->emac_pdata->rmii_en;
  553. if (!machine_is_davinci_da850_evm())
  554. return 0;
  555. cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
  556. val = __raw_readl(cfg_chip3_base);
  557. if (rmii_en) {
  558. val |= BIT(8);
  559. ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
  560. pr_info("EMAC: RMII PHY configured, MII PHY will not be"
  561. " functional\n");
  562. } else {
  563. val &= ~BIT(8);
  564. ret = davinci_cfg_reg_list(da850_evm_mii_pins);
  565. pr_info("EMAC: MII PHY configured, RMII PHY will not be"
  566. " functional\n");
  567. }
  568. if (ret)
  569. pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
  570. ret);
  571. /* configure the CFGCHIP3 register for RMII or MII */
  572. __raw_writel(val, cfg_chip3_base);
  573. ret = davinci_cfg_reg(DA850_GPIO2_6);
  574. if (ret)
  575. pr_warning("da850_evm_init:GPIO(2,6) mux setup "
  576. "failed\n");
  577. ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
  578. if (ret) {
  579. pr_warning("Cannot open GPIO %d\n",
  580. DA850_MII_MDIO_CLKEN_PIN);
  581. return ret;
  582. }
  583. /* Enable/Disable MII MDIO clock */
  584. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
  585. soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
  586. soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
  587. ret = da8xx_register_emac();
  588. if (ret)
  589. pr_warning("da850_evm_init: emac registration failed: %d\n",
  590. ret);
  591. return 0;
  592. }
  593. device_initcall(da850_evm_config_emac);
  594. /*
  595. * The following EDMA channels/slots are not being used by drivers (for
  596. * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
  597. * they are being reserved for codecs on the DSP side.
  598. */
  599. static const s16 da850_dma0_rsv_chans[][2] = {
  600. /* (offset, number) */
  601. { 8, 6},
  602. {24, 4},
  603. {30, 2},
  604. {-1, -1}
  605. };
  606. static const s16 da850_dma0_rsv_slots[][2] = {
  607. /* (offset, number) */
  608. { 8, 6},
  609. {24, 4},
  610. {30, 50},
  611. {-1, -1}
  612. };
  613. static const s16 da850_dma1_rsv_chans[][2] = {
  614. /* (offset, number) */
  615. { 0, 28},
  616. {30, 2},
  617. {-1, -1}
  618. };
  619. static const s16 da850_dma1_rsv_slots[][2] = {
  620. /* (offset, number) */
  621. { 0, 28},
  622. {30, 90},
  623. {-1, -1}
  624. };
  625. static struct edma_rsv_info da850_edma_cc0_rsv = {
  626. .rsv_chans = da850_dma0_rsv_chans,
  627. .rsv_slots = da850_dma0_rsv_slots,
  628. };
  629. static struct edma_rsv_info da850_edma_cc1_rsv = {
  630. .rsv_chans = da850_dma1_rsv_chans,
  631. .rsv_slots = da850_dma1_rsv_slots,
  632. };
  633. static struct edma_rsv_info *da850_edma_rsv[2] = {
  634. &da850_edma_cc0_rsv,
  635. &da850_edma_cc1_rsv,
  636. };
  637. static __init void da850_evm_init(void)
  638. {
  639. int ret;
  640. ret = pmic_tps65070_init();
  641. if (ret)
  642. pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
  643. ret);
  644. ret = da850_register_edma(da850_edma_rsv);
  645. if (ret)
  646. pr_warning("da850_evm_init: edma registration failed: %d\n",
  647. ret);
  648. ret = davinci_cfg_reg_list(da850_i2c0_pins);
  649. if (ret)
  650. pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
  651. ret);
  652. ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
  653. if (ret)
  654. pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
  655. ret);
  656. ret = da8xx_register_watchdog();
  657. if (ret)
  658. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  659. ret);
  660. if (HAS_MMC) {
  661. ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
  662. if (ret)
  663. pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
  664. " %d\n", ret);
  665. ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
  666. if (ret)
  667. pr_warning("da850_evm_init: can not open GPIO %d\n",
  668. DA850_MMCSD_CD_PIN);
  669. gpio_direction_input(DA850_MMCSD_CD_PIN);
  670. ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
  671. if (ret)
  672. pr_warning("da850_evm_init: can not open GPIO %d\n",
  673. DA850_MMCSD_WP_PIN);
  674. gpio_direction_input(DA850_MMCSD_WP_PIN);
  675. ret = da8xx_register_mmcsd0(&da850_mmc_config);
  676. if (ret)
  677. pr_warning("da850_evm_init: mmcsd0 registration failed:"
  678. " %d\n", ret);
  679. }
  680. davinci_serial_init(&da850_evm_uart_config);
  681. i2c_register_board_info(1, da850_evm_i2c_devices,
  682. ARRAY_SIZE(da850_evm_i2c_devices));
  683. /*
  684. * shut down uart 0 and 1; they are not used on the board and
  685. * accessing them causes endless "too much work in irq53" messages
  686. * with arago fs
  687. */
  688. __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
  689. __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
  690. ret = davinci_cfg_reg_list(da850_mcasp_pins);
  691. if (ret)
  692. pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
  693. ret);
  694. da8xx_register_mcasp(0, &da850_evm_snd_data);
  695. ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
  696. if (ret)
  697. pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
  698. ret);
  699. /* Handle board specific muxing for LCD here */
  700. ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
  701. if (ret)
  702. pr_warning("da850_evm_init: evm specific lcd mux setup "
  703. "failed: %d\n", ret);
  704. ret = da850_lcd_hw_init();
  705. if (ret)
  706. pr_warning("da850_evm_init: lcd initialization failed: %d\n",
  707. ret);
  708. sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
  709. ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
  710. if (ret)
  711. pr_warning("da850_evm_init: lcdc registration failed: %d\n",
  712. ret);
  713. ret = da8xx_register_rtc();
  714. if (ret)
  715. pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
  716. ret = da850_register_cpufreq("pll0_sysclk3");
  717. if (ret)
  718. pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
  719. ret);
  720. ret = da8xx_register_cpuidle();
  721. if (ret)
  722. pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
  723. ret);
  724. ret = da850_register_pm(&da850_pm_device);
  725. if (ret)
  726. pr_warning("da850_evm_init: suspend registration failed: %d\n",
  727. ret);
  728. }
  729. #ifdef CONFIG_SERIAL_8250_CONSOLE
  730. static int __init da850_evm_console_init(void)
  731. {
  732. if (!machine_is_davinci_da850_evm())
  733. return 0;
  734. return add_preferred_console("ttyS", 2, "115200");
  735. }
  736. console_initcall(da850_evm_console_init);
  737. #endif
  738. static void __init da850_evm_map_io(void)
  739. {
  740. da850_init();
  741. }
  742. MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
  743. .phys_io = IO_PHYS,
  744. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  745. .boot_params = (DA8XX_DDR_BASE + 0x100),
  746. .map_io = da850_evm_map_io,
  747. .init_irq = cp_intc_init,
  748. .timer = &davinci_timer,
  749. .init_machine = da850_evm_init,
  750. MACHINE_END