pciehp.h 8.5 KB

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  1. /*
  2. * PCI Express Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
  6. * Copyright (C) 2001 IBM Corp.
  7. * Copyright (C) 2003-2004 Intel Corporation
  8. *
  9. * All rights reserved.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  19. * NON INFRINGEMENT. See the GNU General Public License for more
  20. * details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  27. *
  28. */
  29. #ifndef _PCIEHP_H
  30. #define _PCIEHP_H
  31. #include <linux/types.h>
  32. #include <linux/pci.h>
  33. #include <linux/delay.h>
  34. #include <linux/pcieport_if.h>
  35. #include "pci_hotplug.h"
  36. #define MY_NAME "pciehp"
  37. extern int pciehp_poll_mode;
  38. extern int pciehp_poll_time;
  39. extern int pciehp_debug;
  40. /*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
  41. #define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
  42. #define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
  43. #define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
  44. #define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
  45. struct hotplug_params {
  46. u8 cache_line_size;
  47. u8 latency_timer;
  48. u8 enable_serr;
  49. u8 enable_perr;
  50. };
  51. struct slot {
  52. struct slot *next;
  53. u8 bus;
  54. u8 device;
  55. u16 status;
  56. u32 number;
  57. u8 state;
  58. struct timer_list task_event;
  59. u8 hp_slot;
  60. struct controller *ctrl;
  61. struct hpc_ops *hpc_ops;
  62. struct hotplug_slot *hotplug_slot;
  63. struct list_head slot_list;
  64. };
  65. struct event_info {
  66. u32 event_type;
  67. u8 hp_slot;
  68. };
  69. typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
  70. struct php_ctlr_state_s {
  71. struct php_ctlr_state_s *pnext;
  72. struct pci_dev *pci_dev;
  73. unsigned int irq;
  74. unsigned long flags; /* spinlock's */
  75. u32 slot_device_offset;
  76. u32 num_slots;
  77. struct timer_list int_poll_timer; /* Added for poll event */
  78. php_intr_callback_t attention_button_callback;
  79. php_intr_callback_t switch_change_callback;
  80. php_intr_callback_t presence_change_callback;
  81. php_intr_callback_t power_fault_callback;
  82. void *callback_instance_id;
  83. struct ctrl_reg *creg; /* Ptr to controller register space */
  84. };
  85. #define MAX_EVENTS 10
  86. struct controller {
  87. struct controller *next;
  88. struct semaphore crit_sect; /* critical section semaphore */
  89. struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
  90. int num_slots; /* Number of slots on ctlr */
  91. int slot_num_inc; /* 1 or -1 */
  92. struct pci_dev *pci_dev;
  93. struct pci_bus *pci_bus;
  94. struct event_info event_queue[MAX_EVENTS];
  95. struct slot *slot;
  96. struct hpc_ops *hpc_ops;
  97. wait_queue_head_t queue; /* sleep & wake process */
  98. u8 next_event;
  99. u8 bus;
  100. u8 device;
  101. u8 function;
  102. u8 slot_device_offset;
  103. u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
  104. u8 slot_bus; /* Bus where the slots handled by this controller sit */
  105. u8 ctrlcap;
  106. u16 vendor_id;
  107. u8 cap_base;
  108. };
  109. #define INT_BUTTON_IGNORE 0
  110. #define INT_PRESENCE_ON 1
  111. #define INT_PRESENCE_OFF 2
  112. #define INT_SWITCH_CLOSE 3
  113. #define INT_SWITCH_OPEN 4
  114. #define INT_POWER_FAULT 5
  115. #define INT_POWER_FAULT_CLEAR 6
  116. #define INT_BUTTON_PRESS 7
  117. #define INT_BUTTON_RELEASE 8
  118. #define INT_BUTTON_CANCEL 9
  119. #define STATIC_STATE 0
  120. #define BLINKINGON_STATE 1
  121. #define BLINKINGOFF_STATE 2
  122. #define POWERON_STATE 3
  123. #define POWEROFF_STATE 4
  124. #define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
  125. /* Error messages */
  126. #define INTERLOCK_OPEN 0x00000002
  127. #define ADD_NOT_SUPPORTED 0x00000003
  128. #define CARD_FUNCTIONING 0x00000005
  129. #define ADAPTER_NOT_SAME 0x00000006
  130. #define NO_ADAPTER_PRESENT 0x00000009
  131. #define NOT_ENOUGH_RESOURCES 0x0000000B
  132. #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
  133. #define WRONG_BUS_FREQUENCY 0x0000000D
  134. #define POWER_FAILURE 0x0000000E
  135. #define REMOVE_NOT_SUPPORTED 0x00000003
  136. #define DISABLE_CARD 1
  137. /* Field definitions in Slot Capabilities Register */
  138. #define ATTN_BUTTN_PRSN 0x00000001
  139. #define PWR_CTRL_PRSN 0x00000002
  140. #define MRL_SENS_PRSN 0x00000004
  141. #define ATTN_LED_PRSN 0x00000008
  142. #define PWR_LED_PRSN 0x00000010
  143. #define HP_SUPR_RM_SUP 0x00000020
  144. #define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN)
  145. #define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN)
  146. #define MRL_SENS(cap) (cap & MRL_SENS_PRSN)
  147. #define ATTN_LED(cap) (cap & ATTN_LED_PRSN)
  148. #define PWR_LED(cap) (cap & PWR_LED_PRSN)
  149. #define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP)
  150. /*
  151. * error Messages
  152. */
  153. #define msg_initialization_err "Initialization failure, error=%d\n"
  154. #define msg_button_on "PCI slot #%d - powering on due to button press.\n"
  155. #define msg_button_off "PCI slot #%d - powering off due to button press.\n"
  156. #define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
  157. #define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
  158. /* controller functions */
  159. extern int pciehp_event_start_thread (void);
  160. extern void pciehp_event_stop_thread (void);
  161. extern int pciehp_enable_slot (struct slot *slot);
  162. extern int pciehp_disable_slot (struct slot *slot);
  163. extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id);
  164. extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id);
  165. extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
  166. extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
  167. /* extern void long_delay (int delay); */
  168. /* pci functions */
  169. extern int pciehp_configure_device (struct slot *p_slot);
  170. extern int pciehp_unconfigure_device (struct slot *p_slot);
  171. extern int get_hp_hw_control_from_firmware(struct pci_dev *dev);
  172. extern void get_hp_params_from_firmware(struct pci_dev *dev,
  173. struct hotplug_params *hpp);
  174. /* Global variables */
  175. extern struct controller *pciehp_ctrl_list;
  176. /* Inline functions */
  177. static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
  178. {
  179. struct slot *p_slot, *tmp_slot = NULL;
  180. p_slot = ctrl->slot;
  181. while (p_slot && (p_slot->device != device)) {
  182. tmp_slot = p_slot;
  183. p_slot = p_slot->next;
  184. }
  185. if (p_slot == NULL) {
  186. err("ERROR: pciehp_find_slot device=0x%x\n", device);
  187. p_slot = tmp_slot;
  188. }
  189. return p_slot;
  190. }
  191. static inline int wait_for_ctrl_irq(struct controller *ctrl)
  192. {
  193. int retval = 0;
  194. DECLARE_WAITQUEUE(wait, current);
  195. add_wait_queue(&ctrl->queue, &wait);
  196. if (!pciehp_poll_mode)
  197. /* Sleep for up to 1 second */
  198. msleep_interruptible(1000);
  199. else
  200. msleep_interruptible(2500);
  201. remove_wait_queue(&ctrl->queue, &wait);
  202. if (signal_pending(current))
  203. retval = -EINTR;
  204. return retval;
  205. }
  206. #define SLOT_NAME_SIZE 10
  207. static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
  208. {
  209. snprintf(buffer, buffer_size, "%04d_%04d", slot->bus, slot->number);
  210. }
  211. enum php_ctlr_type {
  212. PCI,
  213. ISA,
  214. ACPI
  215. };
  216. int pcie_init(struct controller *ctrl, struct pcie_device *dev);
  217. /* This has no meaning for PCI Express, as there is only 1 slot per port */
  218. int pcie_get_ctlr_slot_config(struct controller *ctrl,
  219. int *num_ctlr_slots,
  220. int *first_device_num,
  221. int *physical_slot_num,
  222. u8 *ctrlcap);
  223. struct hpc_ops {
  224. int (*power_on_slot) (struct slot *slot);
  225. int (*power_off_slot) (struct slot *slot);
  226. int (*get_power_status) (struct slot *slot, u8 *status);
  227. int (*get_attention_status) (struct slot *slot, u8 *status);
  228. int (*set_attention_status) (struct slot *slot, u8 status);
  229. int (*get_latch_status) (struct slot *slot, u8 *status);
  230. int (*get_adapter_status) (struct slot *slot, u8 *status);
  231. int (*get_max_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
  232. int (*get_cur_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
  233. int (*get_max_lnk_width) (struct slot *slot, enum pcie_link_width *value);
  234. int (*get_cur_lnk_width) (struct slot *slot, enum pcie_link_width *value);
  235. int (*query_power_fault) (struct slot *slot);
  236. void (*green_led_on) (struct slot *slot);
  237. void (*green_led_off) (struct slot *slot);
  238. void (*green_led_blink) (struct slot *slot);
  239. void (*release_ctlr) (struct controller *ctrl);
  240. int (*check_lnk_status) (struct controller *ctrl);
  241. };
  242. #endif /* _PCIEHP_H */