sdhci-bcm2835.c 6.4 KB

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  1. /*
  2. * BCM2835 SDHCI
  3. * Copyright (C) 2012 Stephen Warren
  4. * Based on U-Boot's MMC driver for the BCM2835 by Oleksandr Tymoshenko & me
  5. * Portions of the code there were obviously based on the Linux kernel at:
  6. * git://github.com/raspberrypi/linux.git rpi-3.6.y
  7. * commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms and conditions of the GNU General Public License,
  11. * version 2, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/delay.h>
  22. #include <linux/module.h>
  23. #include <linux/mmc/host.h>
  24. #include "sdhci-pltfm.h"
  25. /*
  26. * 400KHz is max freq for card ID etc. Use that as min card clock. We need to
  27. * know the min to enable static calculation of max BCM2835_SDHCI_WRITE_DELAY.
  28. */
  29. #define MIN_FREQ 400000
  30. /*
  31. * The Arasan has a bugette whereby it may lose the content of successive
  32. * writes to registers that are within two SD-card clock cycles of each other
  33. * (a clock domain crossing problem). It seems, however, that the data
  34. * register does not have this problem, which is just as well - otherwise we'd
  35. * have to nobble the DMA engine too.
  36. *
  37. * This should probably be dynamically calculated based on the actual card
  38. * frequency. However, this is the longest we'll have to wait, and doesn't
  39. * seem to slow access down too much, so the added complexity doesn't seem
  40. * worth it for now.
  41. *
  42. * 1/MIN_FREQ is (max) time per tick of eMMC clock.
  43. * 2/MIN_FREQ is time for two ticks.
  44. * Multiply by 1000000 to get uS per two ticks.
  45. * *1000000 for uSecs.
  46. * +1 for hack rounding.
  47. */
  48. #define BCM2835_SDHCI_WRITE_DELAY (((2 * 1000000) / MIN_FREQ) + 1)
  49. struct bcm2835_sdhci {
  50. struct clk *clk;
  51. u32 shadow;
  52. };
  53. static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg)
  54. {
  55. writel(val, host->ioaddr + reg);
  56. udelay(BCM2835_SDHCI_WRITE_DELAY);
  57. }
  58. static inline u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg)
  59. {
  60. u32 val = readl(host->ioaddr + reg);
  61. if (reg == SDHCI_CAPABILITIES)
  62. val |= SDHCI_CAN_VDD_330;
  63. return val;
  64. }
  65. static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg)
  66. {
  67. struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  68. struct bcm2835_sdhci *bcm2835_host = pltfm_host->priv;
  69. u32 oldval = (reg == SDHCI_COMMAND) ? bcm2835_host->shadow :
  70. bcm2835_sdhci_readl(host, reg & ~3);
  71. u32 word_num = (reg >> 1) & 1;
  72. u32 word_shift = word_num * 16;
  73. u32 mask = 0xffff << word_shift;
  74. u32 newval = (oldval & ~mask) | (val << word_shift);
  75. if (reg == SDHCI_TRANSFER_MODE)
  76. bcm2835_host->shadow = newval;
  77. else
  78. bcm2835_sdhci_writel(host, newval, reg & ~3);
  79. }
  80. static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg)
  81. {
  82. u32 val = bcm2835_sdhci_readl(host, (reg & ~3));
  83. u32 word_num = (reg >> 1) & 1;
  84. u32 word_shift = word_num * 16;
  85. u32 word = (val >> word_shift) & 0xffff;
  86. return word;
  87. }
  88. static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
  89. {
  90. u32 oldval = bcm2835_sdhci_readl(host, reg & ~3);
  91. u32 byte_num = reg & 3;
  92. u32 byte_shift = byte_num * 8;
  93. u32 mask = 0xff << byte_shift;
  94. u32 newval = (oldval & ~mask) | (val << byte_shift);
  95. bcm2835_sdhci_writel(host, newval, reg & ~3);
  96. }
  97. static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg)
  98. {
  99. u32 val = bcm2835_sdhci_readl(host, (reg & ~3));
  100. u32 byte_num = reg & 3;
  101. u32 byte_shift = byte_num * 8;
  102. u32 byte = (val >> byte_shift) & 0xff;
  103. return byte;
  104. }
  105. static unsigned int bcm2835_sdhci_get_max_clock(struct sdhci_host *host)
  106. {
  107. struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  108. struct bcm2835_sdhci *bcm2835_host = pltfm_host->priv;
  109. return clk_get_rate(bcm2835_host->clk);
  110. }
  111. unsigned int bcm2835_sdhci_get_min_clock(struct sdhci_host *host)
  112. {
  113. return MIN_FREQ;
  114. }
  115. unsigned int bcm2835_sdhci_get_timeout_clock(struct sdhci_host *host)
  116. {
  117. struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  118. struct bcm2835_sdhci *bcm2835_host = pltfm_host->priv;
  119. return clk_get_rate(bcm2835_host->clk);
  120. }
  121. static struct sdhci_ops bcm2835_sdhci_ops = {
  122. .write_l = bcm2835_sdhci_writel,
  123. .write_w = bcm2835_sdhci_writew,
  124. .write_b = bcm2835_sdhci_writeb,
  125. .read_l = bcm2835_sdhci_readl,
  126. .read_w = bcm2835_sdhci_readw,
  127. .read_b = bcm2835_sdhci_readb,
  128. .get_max_clock = bcm2835_sdhci_get_max_clock,
  129. .get_min_clock = bcm2835_sdhci_get_min_clock,
  130. .get_timeout_clock = bcm2835_sdhci_get_timeout_clock,
  131. };
  132. static struct sdhci_pltfm_data bcm2835_sdhci_pdata = {
  133. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
  134. .ops = &bcm2835_sdhci_ops,
  135. };
  136. static int bcm2835_sdhci_probe(struct platform_device *pdev)
  137. {
  138. struct sdhci_host *host;
  139. struct bcm2835_sdhci *bcm2835_host;
  140. struct sdhci_pltfm_host *pltfm_host;
  141. int ret;
  142. host = sdhci_pltfm_init(pdev, &bcm2835_sdhci_pdata);
  143. if (IS_ERR(host))
  144. return PTR_ERR(host);
  145. bcm2835_host = devm_kzalloc(&pdev->dev, sizeof(*bcm2835_host),
  146. GFP_KERNEL);
  147. if (!bcm2835_host) {
  148. dev_err(mmc_dev(host->mmc),
  149. "failed to allocate bcm2835_sdhci\n");
  150. return -ENOMEM;
  151. }
  152. pltfm_host = sdhci_priv(host);
  153. pltfm_host->priv = bcm2835_host;
  154. bcm2835_host->clk = devm_clk_get(&pdev->dev, NULL);
  155. if (IS_ERR(bcm2835_host->clk)) {
  156. ret = PTR_ERR(bcm2835_host->clk);
  157. goto err;
  158. }
  159. return sdhci_add_host(host);
  160. err:
  161. sdhci_pltfm_free(pdev);
  162. return ret;
  163. }
  164. static int bcm2835_sdhci_remove(struct platform_device *pdev)
  165. {
  166. struct sdhci_host *host = platform_get_drvdata(pdev);
  167. int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
  168. sdhci_remove_host(host, dead);
  169. sdhci_pltfm_free(pdev);
  170. return 0;
  171. }
  172. static const struct of_device_id bcm2835_sdhci_of_match[] = {
  173. { .compatible = "brcm,bcm2835-sdhci" },
  174. { }
  175. };
  176. MODULE_DEVICE_TABLE(of, bcm2835_sdhci_of_match);
  177. static struct platform_driver bcm2835_sdhci_driver = {
  178. .driver = {
  179. .name = "sdhci-bcm2835",
  180. .owner = THIS_MODULE,
  181. .of_match_table = bcm2835_sdhci_of_match,
  182. .pm = SDHCI_PLTFM_PMOPS,
  183. },
  184. .probe = bcm2835_sdhci_probe,
  185. .remove = bcm2835_sdhci_remove,
  186. };
  187. module_platform_driver(bcm2835_sdhci_driver);
  188. MODULE_DESCRIPTION("BCM2835 SDHCI driver");
  189. MODULE_AUTHOR("Stephen Warren");
  190. MODULE_LICENSE("GPL v2");