setup_64.c 18 KB

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  1. /*
  2. *
  3. * Common boot and setup code.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/seq_file.h>
  22. #include <linux/ioport.h>
  23. #include <linux/console.h>
  24. #include <linux/utsname.h>
  25. #include <linux/tty.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/pci.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/memblock.h>
  36. #include <linux/hugetlb.h>
  37. #include <asm/io.h>
  38. #include <asm/kdump.h>
  39. #include <asm/prom.h>
  40. #include <asm/processor.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/smp.h>
  43. #include <asm/elf.h>
  44. #include <asm/machdep.h>
  45. #include <asm/paca.h>
  46. #include <asm/time.h>
  47. #include <asm/cputable.h>
  48. #include <asm/sections.h>
  49. #include <asm/btext.h>
  50. #include <asm/nvram.h>
  51. #include <asm/setup.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/firmware.h>
  59. #include <asm/xmon.h>
  60. #include <asm/udbg.h>
  61. #include <asm/kexec.h>
  62. #include <asm/mmu_context.h>
  63. #include <asm/code-patching.h>
  64. #include <asm/kvm_ppc.h>
  65. #include <asm/hugetlb.h>
  66. #include <asm/epapr_hcalls.h>
  67. #include "setup.h"
  68. #ifdef DEBUG
  69. #define DBG(fmt...) udbg_printf(fmt)
  70. #else
  71. #define DBG(fmt...)
  72. #endif
  73. int boot_cpuid = 0;
  74. int spinning_secondaries;
  75. u64 ppc64_pft_size;
  76. /* Pick defaults since we might want to patch instructions
  77. * before we've read this from the device tree.
  78. */
  79. struct ppc64_caches ppc64_caches = {
  80. .dline_size = 0x40,
  81. .log_dline_size = 6,
  82. .iline_size = 0x40,
  83. .log_iline_size = 6
  84. };
  85. EXPORT_SYMBOL_GPL(ppc64_caches);
  86. /*
  87. * These are used in binfmt_elf.c to put aux entries on the stack
  88. * for each elf executable being started.
  89. */
  90. int dcache_bsize;
  91. int icache_bsize;
  92. int ucache_bsize;
  93. #ifdef CONFIG_SMP
  94. static char *smt_enabled_cmdline;
  95. /* Look for ibm,smt-enabled OF option */
  96. static void check_smt_enabled(void)
  97. {
  98. struct device_node *dn;
  99. const char *smt_option;
  100. /* Default to enabling all threads */
  101. smt_enabled_at_boot = threads_per_core;
  102. /* Allow the command line to overrule the OF option */
  103. if (smt_enabled_cmdline) {
  104. if (!strcmp(smt_enabled_cmdline, "on"))
  105. smt_enabled_at_boot = threads_per_core;
  106. else if (!strcmp(smt_enabled_cmdline, "off"))
  107. smt_enabled_at_boot = 0;
  108. else {
  109. long smt;
  110. int rc;
  111. rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
  112. if (!rc)
  113. smt_enabled_at_boot =
  114. min(threads_per_core, (int)smt);
  115. }
  116. } else {
  117. dn = of_find_node_by_path("/options");
  118. if (dn) {
  119. smt_option = of_get_property(dn, "ibm,smt-enabled",
  120. NULL);
  121. if (smt_option) {
  122. if (!strcmp(smt_option, "on"))
  123. smt_enabled_at_boot = threads_per_core;
  124. else if (!strcmp(smt_option, "off"))
  125. smt_enabled_at_boot = 0;
  126. }
  127. of_node_put(dn);
  128. }
  129. }
  130. }
  131. /* Look for smt-enabled= cmdline option */
  132. static int __init early_smt_enabled(char *p)
  133. {
  134. smt_enabled_cmdline = p;
  135. return 0;
  136. }
  137. early_param("smt-enabled", early_smt_enabled);
  138. #else
  139. #define check_smt_enabled()
  140. #endif /* CONFIG_SMP */
  141. /** Fix up paca fields required for the boot cpu */
  142. static void fixup_boot_paca(void)
  143. {
  144. /* The boot cpu is started */
  145. get_paca()->cpu_start = 1;
  146. /* Allow percpu accesses to work until we setup percpu data */
  147. get_paca()->data_offset = 0;
  148. }
  149. /*
  150. * Early initialization entry point. This is called by head.S
  151. * with MMU translation disabled. We rely on the "feature" of
  152. * the CPU that ignores the top 2 bits of the address in real
  153. * mode so we can access kernel globals normally provided we
  154. * only toy with things in the RMO region. From here, we do
  155. * some early parsing of the device-tree to setup out MEMBLOCK
  156. * data structures, and allocate & initialize the hash table
  157. * and segment tables so we can start running with translation
  158. * enabled.
  159. *
  160. * It is this function which will call the probe() callback of
  161. * the various platform types and copy the matching one to the
  162. * global ppc_md structure. Your platform can eventually do
  163. * some very early initializations from the probe() routine, but
  164. * this is not recommended, be very careful as, for example, the
  165. * device-tree is not accessible via normal means at this point.
  166. */
  167. void __init early_setup(unsigned long dt_ptr)
  168. {
  169. static __initdata struct paca_struct boot_paca;
  170. /* -------- printk is _NOT_ safe to use here ! ------- */
  171. /* Identify CPU type */
  172. identify_cpu(0, mfspr(SPRN_PVR));
  173. /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
  174. initialise_paca(&boot_paca, 0);
  175. setup_paca(&boot_paca);
  176. fixup_boot_paca();
  177. /* Initialize lockdep early or else spinlocks will blow */
  178. lockdep_init();
  179. /* -------- printk is now safe to use ------- */
  180. /* Enable early debugging if any specified (see udbg.h) */
  181. udbg_early_init();
  182. DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
  183. /*
  184. * Do early initialization using the flattened device
  185. * tree, such as retrieving the physical memory map or
  186. * calculating/retrieving the hash table size.
  187. */
  188. early_init_devtree(__va(dt_ptr));
  189. epapr_paravirt_early_init();
  190. /* Now we know the logical id of our boot cpu, setup the paca. */
  191. setup_paca(&paca[boot_cpuid]);
  192. fixup_boot_paca();
  193. /* Probe the machine type */
  194. probe_machine();
  195. setup_kdump_trampoline();
  196. DBG("Found, Initializing memory management...\n");
  197. /* Initialize the hash table or TLB handling */
  198. early_init_mmu();
  199. /*
  200. * Reserve any gigantic pages requested on the command line.
  201. * memblock needs to have been initialized by the time this is
  202. * called since this will reserve memory.
  203. */
  204. reserve_hugetlb_gpages();
  205. DBG(" <- early_setup()\n");
  206. }
  207. #ifdef CONFIG_SMP
  208. void early_setup_secondary(void)
  209. {
  210. /* Mark interrupts enabled in PACA */
  211. get_paca()->soft_enabled = 0;
  212. /* Initialize the hash table or TLB handling */
  213. early_init_mmu_secondary();
  214. }
  215. #endif /* CONFIG_SMP */
  216. #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
  217. void smp_release_cpus(void)
  218. {
  219. unsigned long *ptr;
  220. int i;
  221. DBG(" -> smp_release_cpus()\n");
  222. /* All secondary cpus are spinning on a common spinloop, release them
  223. * all now so they can start to spin on their individual paca
  224. * spinloops. For non SMP kernels, the secondary cpus never get out
  225. * of the common spinloop.
  226. */
  227. ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
  228. - PHYSICAL_START);
  229. *ptr = __pa(generic_secondary_smp_init);
  230. /* And wait a bit for them to catch up */
  231. for (i = 0; i < 100000; i++) {
  232. mb();
  233. HMT_low();
  234. if (spinning_secondaries == 0)
  235. break;
  236. udelay(1);
  237. }
  238. DBG("spinning_secondaries = %d\n", spinning_secondaries);
  239. DBG(" <- smp_release_cpus()\n");
  240. }
  241. #endif /* CONFIG_SMP || CONFIG_KEXEC */
  242. /*
  243. * Initialize some remaining members of the ppc64_caches and systemcfg
  244. * structures
  245. * (at least until we get rid of them completely). This is mostly some
  246. * cache informations about the CPU that will be used by cache flush
  247. * routines and/or provided to userland
  248. */
  249. static void __init initialize_cache_info(void)
  250. {
  251. struct device_node *np;
  252. unsigned long num_cpus = 0;
  253. DBG(" -> initialize_cache_info()\n");
  254. for_each_node_by_type(np, "cpu") {
  255. num_cpus += 1;
  256. /*
  257. * We're assuming *all* of the CPUs have the same
  258. * d-cache and i-cache sizes... -Peter
  259. */
  260. if (num_cpus == 1) {
  261. const u32 *sizep, *lsizep;
  262. u32 size, lsize;
  263. size = 0;
  264. lsize = cur_cpu_spec->dcache_bsize;
  265. sizep = of_get_property(np, "d-cache-size", NULL);
  266. if (sizep != NULL)
  267. size = *sizep;
  268. lsizep = of_get_property(np, "d-cache-block-size",
  269. NULL);
  270. /* fallback if block size missing */
  271. if (lsizep == NULL)
  272. lsizep = of_get_property(np,
  273. "d-cache-line-size",
  274. NULL);
  275. if (lsizep != NULL)
  276. lsize = *lsizep;
  277. if (sizep == NULL || lsizep == NULL)
  278. DBG("Argh, can't find dcache properties ! "
  279. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  280. ppc64_caches.dsize = size;
  281. ppc64_caches.dline_size = lsize;
  282. ppc64_caches.log_dline_size = __ilog2(lsize);
  283. ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
  284. size = 0;
  285. lsize = cur_cpu_spec->icache_bsize;
  286. sizep = of_get_property(np, "i-cache-size", NULL);
  287. if (sizep != NULL)
  288. size = *sizep;
  289. lsizep = of_get_property(np, "i-cache-block-size",
  290. NULL);
  291. if (lsizep == NULL)
  292. lsizep = of_get_property(np,
  293. "i-cache-line-size",
  294. NULL);
  295. if (lsizep != NULL)
  296. lsize = *lsizep;
  297. if (sizep == NULL || lsizep == NULL)
  298. DBG("Argh, can't find icache properties ! "
  299. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  300. ppc64_caches.isize = size;
  301. ppc64_caches.iline_size = lsize;
  302. ppc64_caches.log_iline_size = __ilog2(lsize);
  303. ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
  304. }
  305. }
  306. DBG(" <- initialize_cache_info()\n");
  307. }
  308. /*
  309. * Do some initial setup of the system. The parameters are those which
  310. * were passed in from the bootloader.
  311. */
  312. void __init setup_system(void)
  313. {
  314. DBG(" -> setup_system()\n");
  315. /* Apply the CPUs-specific and firmware specific fixups to kernel
  316. * text (nop out sections not relevant to this CPU or this firmware)
  317. */
  318. do_feature_fixups(cur_cpu_spec->cpu_features,
  319. &__start___ftr_fixup, &__stop___ftr_fixup);
  320. do_feature_fixups(cur_cpu_spec->mmu_features,
  321. &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
  322. do_feature_fixups(powerpc_firmware_features,
  323. &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
  324. do_lwsync_fixups(cur_cpu_spec->cpu_features,
  325. &__start___lwsync_fixup, &__stop___lwsync_fixup);
  326. do_final_fixups();
  327. /*
  328. * Unflatten the device-tree passed by prom_init or kexec
  329. */
  330. unflatten_device_tree();
  331. /*
  332. * Fill the ppc64_caches & systemcfg structures with informations
  333. * retrieved from the device-tree.
  334. */
  335. initialize_cache_info();
  336. #ifdef CONFIG_PPC_RTAS
  337. /*
  338. * Initialize RTAS if available
  339. */
  340. rtas_initialize();
  341. #endif /* CONFIG_PPC_RTAS */
  342. /*
  343. * Check if we have an initrd provided via the device-tree
  344. */
  345. check_for_initrd();
  346. /*
  347. * Do some platform specific early initializations, that includes
  348. * setting up the hash table pointers. It also sets up some interrupt-mapping
  349. * related options that will be used by finish_device_tree()
  350. */
  351. if (ppc_md.init_early)
  352. ppc_md.init_early();
  353. /*
  354. * We can discover serial ports now since the above did setup the
  355. * hash table management for us, thus ioremap works. We do that early
  356. * so that further code can be debugged
  357. */
  358. find_legacy_serial_ports();
  359. /*
  360. * Register early console
  361. */
  362. register_early_udbg_console();
  363. /*
  364. * Initialize xmon
  365. */
  366. xmon_setup();
  367. smp_setup_cpu_maps();
  368. check_smt_enabled();
  369. #ifdef CONFIG_SMP
  370. /* Release secondary cpus out of their spinloops at 0x60 now that
  371. * we can map physical -> logical CPU ids
  372. */
  373. smp_release_cpus();
  374. #endif
  375. printk("Starting Linux PPC64 %s\n", init_utsname()->version);
  376. printk("-----------------------------------------------------\n");
  377. printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
  378. printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size());
  379. if (ppc64_caches.dline_size != 0x80)
  380. printk("ppc64_caches.dcache_line_size = 0x%x\n",
  381. ppc64_caches.dline_size);
  382. if (ppc64_caches.iline_size != 0x80)
  383. printk("ppc64_caches.icache_line_size = 0x%x\n",
  384. ppc64_caches.iline_size);
  385. #ifdef CONFIG_PPC_STD_MMU_64
  386. if (htab_address)
  387. printk("htab_address = 0x%p\n", htab_address);
  388. printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
  389. #endif /* CONFIG_PPC_STD_MMU_64 */
  390. if (PHYSICAL_START > 0)
  391. printk("physical_start = 0x%llx\n",
  392. (unsigned long long)PHYSICAL_START);
  393. printk("-----------------------------------------------------\n");
  394. DBG(" <- setup_system()\n");
  395. }
  396. /* This returns the limit below which memory accesses to the linear
  397. * mapping are guarnateed not to cause a TLB or SLB miss. This is
  398. * used to allocate interrupt or emergency stacks for which our
  399. * exception entry path doesn't deal with being interrupted.
  400. */
  401. static u64 safe_stack_limit(void)
  402. {
  403. #ifdef CONFIG_PPC_BOOK3E
  404. /* Freescale BookE bolts the entire linear mapping */
  405. if (mmu_has_feature(MMU_FTR_TYPE_FSL_E))
  406. return linear_map_top;
  407. /* Other BookE, we assume the first GB is bolted */
  408. return 1ul << 30;
  409. #else
  410. /* BookS, the first segment is bolted */
  411. if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
  412. return 1UL << SID_SHIFT_1T;
  413. return 1UL << SID_SHIFT;
  414. #endif
  415. }
  416. static void __init irqstack_early_init(void)
  417. {
  418. u64 limit = safe_stack_limit();
  419. unsigned int i;
  420. /*
  421. * Interrupt stacks must be in the first segment since we
  422. * cannot afford to take SLB misses on them.
  423. */
  424. for_each_possible_cpu(i) {
  425. softirq_ctx[i] = (struct thread_info *)
  426. __va(memblock_alloc_base(THREAD_SIZE,
  427. THREAD_SIZE, limit));
  428. hardirq_ctx[i] = (struct thread_info *)
  429. __va(memblock_alloc_base(THREAD_SIZE,
  430. THREAD_SIZE, limit));
  431. }
  432. }
  433. #ifdef CONFIG_PPC_BOOK3E
  434. static void __init exc_lvl_early_init(void)
  435. {
  436. extern unsigned int interrupt_base_book3e;
  437. extern unsigned int exc_debug_debug_book3e;
  438. unsigned int i;
  439. for_each_possible_cpu(i) {
  440. critirq_ctx[i] = (struct thread_info *)
  441. __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
  442. dbgirq_ctx[i] = (struct thread_info *)
  443. __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
  444. mcheckirq_ctx[i] = (struct thread_info *)
  445. __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
  446. }
  447. if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
  448. patch_branch(&interrupt_base_book3e + (0x040 / 4) + 1,
  449. (unsigned long)&exc_debug_debug_book3e, 0);
  450. }
  451. #else
  452. #define exc_lvl_early_init()
  453. #endif
  454. /*
  455. * Stack space used when we detect a bad kernel stack pointer, and
  456. * early in SMP boots before relocation is enabled.
  457. */
  458. static void __init emergency_stack_init(void)
  459. {
  460. u64 limit;
  461. unsigned int i;
  462. /*
  463. * Emergency stacks must be under 256MB, we cannot afford to take
  464. * SLB misses on them. The ABI also requires them to be 128-byte
  465. * aligned.
  466. *
  467. * Since we use these as temporary stacks during secondary CPU
  468. * bringup, we need to get at them in real mode. This means they
  469. * must also be within the RMO region.
  470. */
  471. limit = min(safe_stack_limit(), ppc64_rma_size);
  472. for_each_possible_cpu(i) {
  473. unsigned long sp;
  474. sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
  475. sp += THREAD_SIZE;
  476. paca[i].emergency_sp = __va(sp);
  477. }
  478. }
  479. /*
  480. * Called into from start_kernel this initializes bootmem, which is used
  481. * to manage page allocation until mem_init is called.
  482. */
  483. void __init setup_arch(char **cmdline_p)
  484. {
  485. ppc64_boot_msg(0x12, "Setup Arch");
  486. *cmdline_p = cmd_line;
  487. /*
  488. * Set cache line size based on type of cpu as a default.
  489. * Systems with OF can look in the properties on the cpu node(s)
  490. * for a possibly more accurate value.
  491. */
  492. dcache_bsize = ppc64_caches.dline_size;
  493. icache_bsize = ppc64_caches.iline_size;
  494. /* reboot on panic */
  495. panic_timeout = 180;
  496. if (ppc_md.panic)
  497. setup_panic();
  498. init_mm.start_code = (unsigned long)_stext;
  499. init_mm.end_code = (unsigned long) _etext;
  500. init_mm.end_data = (unsigned long) _edata;
  501. init_mm.brk = klimit;
  502. #ifdef CONFIG_PPC_64K_PAGES
  503. init_mm.context.pte_frag = NULL;
  504. #endif
  505. irqstack_early_init();
  506. exc_lvl_early_init();
  507. emergency_stack_init();
  508. #ifdef CONFIG_PPC_STD_MMU_64
  509. stabs_alloc();
  510. #endif
  511. /* set up the bootmem stuff with available memory */
  512. do_init_bootmem();
  513. sparse_init();
  514. #ifdef CONFIG_DUMMY_CONSOLE
  515. conswitchp = &dummy_con;
  516. #endif
  517. if (ppc_md.setup_arch)
  518. ppc_md.setup_arch();
  519. paging_init();
  520. /* Initialize the MMU context management stuff */
  521. mmu_context_init();
  522. kvm_linear_init();
  523. /* Interrupt code needs to be 64K-aligned */
  524. if ((unsigned long)_stext & 0xffff)
  525. panic("Kernelbase not 64K-aligned (0x%lx)!\n",
  526. (unsigned long)_stext);
  527. ppc64_boot_msg(0x15, "Setup Done");
  528. }
  529. /* ToDo: do something useful if ppc_md is not yet setup. */
  530. #define PPC64_LINUX_FUNCTION 0x0f000000
  531. #define PPC64_IPL_MESSAGE 0xc0000000
  532. #define PPC64_TERM_MESSAGE 0xb0000000
  533. static void ppc64_do_msg(unsigned int src, const char *msg)
  534. {
  535. if (ppc_md.progress) {
  536. char buf[128];
  537. sprintf(buf, "%08X\n", src);
  538. ppc_md.progress(buf, 0);
  539. snprintf(buf, 128, "%s", msg);
  540. ppc_md.progress(buf, 0);
  541. }
  542. }
  543. /* Print a boot progress message. */
  544. void ppc64_boot_msg(unsigned int src, const char *msg)
  545. {
  546. ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
  547. printk("[boot]%04x %s\n", src, msg);
  548. }
  549. #ifdef CONFIG_SMP
  550. #define PCPU_DYN_SIZE ()
  551. static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
  552. {
  553. return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
  554. __pa(MAX_DMA_ADDRESS));
  555. }
  556. static void __init pcpu_fc_free(void *ptr, size_t size)
  557. {
  558. free_bootmem(__pa(ptr), size);
  559. }
  560. static int pcpu_cpu_distance(unsigned int from, unsigned int to)
  561. {
  562. if (cpu_to_node(from) == cpu_to_node(to))
  563. return LOCAL_DISTANCE;
  564. else
  565. return REMOTE_DISTANCE;
  566. }
  567. unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
  568. EXPORT_SYMBOL(__per_cpu_offset);
  569. void __init setup_per_cpu_areas(void)
  570. {
  571. const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
  572. size_t atom_size;
  573. unsigned long delta;
  574. unsigned int cpu;
  575. int rc;
  576. /*
  577. * Linear mapping is one of 4K, 1M and 16M. For 4K, no need
  578. * to group units. For larger mappings, use 1M atom which
  579. * should be large enough to contain a number of units.
  580. */
  581. if (mmu_linear_psize == MMU_PAGE_4K)
  582. atom_size = PAGE_SIZE;
  583. else
  584. atom_size = 1 << 20;
  585. rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
  586. pcpu_fc_alloc, pcpu_fc_free);
  587. if (rc < 0)
  588. panic("cannot initialize percpu area (err=%d)", rc);
  589. delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
  590. for_each_possible_cpu(cpu) {
  591. __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
  592. paca[cpu].data_offset = __per_cpu_offset[cpu];
  593. }
  594. }
  595. #endif
  596. #ifdef CONFIG_PPC_INDIRECT_IO
  597. struct ppc_pci_io ppc_pci_io;
  598. EXPORT_SYMBOL(ppc_pci_io);
  599. #endif /* CONFIG_PPC_INDIRECT_IO */