ehca_main.c 27 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * module start stop, hca detection
  5. *
  6. * Authors: Heiko J Schick <schickhj@de.ibm.com>
  7. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  8. * Joachim Fenkes <fenkes@de.ibm.com>
  9. *
  10. * Copyright (c) 2005 IBM Corporation
  11. *
  12. * All rights reserved.
  13. *
  14. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  15. * BSD.
  16. *
  17. * OpenIB BSD License
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions are met:
  21. *
  22. * Redistributions of source code must retain the above copyright notice, this
  23. * list of conditions and the following disclaimer.
  24. *
  25. * Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials
  28. * provided with the distribution.
  29. *
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  33. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  34. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  36. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  37. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  38. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGE.
  41. */
  42. #ifdef CONFIG_PPC_64K_PAGES
  43. #include <linux/slab.h>
  44. #endif
  45. #include "ehca_classes.h"
  46. #include "ehca_iverbs.h"
  47. #include "ehca_mrmw.h"
  48. #include "ehca_tools.h"
  49. #include "hcp_if.h"
  50. #define HCAD_VERSION "0025"
  51. MODULE_LICENSE("Dual BSD/GPL");
  52. MODULE_AUTHOR("Christoph Raisch <raisch@de.ibm.com>");
  53. MODULE_DESCRIPTION("IBM eServer HCA InfiniBand Device Driver");
  54. MODULE_VERSION(HCAD_VERSION);
  55. int ehca_open_aqp1 = 0;
  56. int ehca_debug_level = 0;
  57. int ehca_hw_level = 0;
  58. int ehca_nr_ports = 2;
  59. int ehca_use_hp_mr = 0;
  60. int ehca_port_act_time = 30;
  61. int ehca_poll_all_eqs = 1;
  62. int ehca_static_rate = -1;
  63. int ehca_scaling_code = 0;
  64. int ehca_mr_largepage = 1;
  65. int ehca_lock_hcalls = -1;
  66. module_param_named(open_aqp1, ehca_open_aqp1, int, S_IRUGO);
  67. module_param_named(debug_level, ehca_debug_level, int, S_IRUGO);
  68. module_param_named(hw_level, ehca_hw_level, int, S_IRUGO);
  69. module_param_named(nr_ports, ehca_nr_ports, int, S_IRUGO);
  70. module_param_named(use_hp_mr, ehca_use_hp_mr, int, S_IRUGO);
  71. module_param_named(port_act_time, ehca_port_act_time, int, S_IRUGO);
  72. module_param_named(poll_all_eqs, ehca_poll_all_eqs, int, S_IRUGO);
  73. module_param_named(static_rate, ehca_static_rate, int, S_IRUGO);
  74. module_param_named(scaling_code, ehca_scaling_code, int, S_IRUGO);
  75. module_param_named(mr_largepage, ehca_mr_largepage, int, S_IRUGO);
  76. module_param_named(lock_hcalls, ehca_lock_hcalls, bool, S_IRUGO);
  77. MODULE_PARM_DESC(open_aqp1,
  78. "AQP1 on startup (0: no (default), 1: yes)");
  79. MODULE_PARM_DESC(debug_level,
  80. "debug level"
  81. " (0: no debug traces (default), 1: with debug traces)");
  82. MODULE_PARM_DESC(hw_level,
  83. "hardware level"
  84. " (0: autosensing (default), 1: v. 0.20, 2: v. 0.21)");
  85. MODULE_PARM_DESC(nr_ports,
  86. "number of connected ports (default: 2)");
  87. MODULE_PARM_DESC(use_hp_mr,
  88. "high performance MRs (0: no (default), 1: yes)");
  89. MODULE_PARM_DESC(port_act_time,
  90. "time to wait for port activation (default: 30 sec)");
  91. MODULE_PARM_DESC(poll_all_eqs,
  92. "polls all event queues periodically"
  93. " (0: no, 1: yes (default))");
  94. MODULE_PARM_DESC(static_rate,
  95. "set permanent static rate (default: disabled)");
  96. MODULE_PARM_DESC(scaling_code,
  97. "set scaling code (0: disabled/default, 1: enabled)");
  98. MODULE_PARM_DESC(mr_largepage,
  99. "use large page for MR (0: use PAGE_SIZE (default), "
  100. "1: use large page depending on MR size");
  101. MODULE_PARM_DESC(lock_hcalls,
  102. "serialize all hCalls made by the driver "
  103. "(default: autodetect)");
  104. DEFINE_RWLOCK(ehca_qp_idr_lock);
  105. DEFINE_RWLOCK(ehca_cq_idr_lock);
  106. DEFINE_IDR(ehca_qp_idr);
  107. DEFINE_IDR(ehca_cq_idr);
  108. static LIST_HEAD(shca_list); /* list of all registered ehcas */
  109. static DEFINE_SPINLOCK(shca_list_lock);
  110. static struct timer_list poll_eqs_timer;
  111. #ifdef CONFIG_PPC_64K_PAGES
  112. static struct kmem_cache *ctblk_cache;
  113. void *ehca_alloc_fw_ctrlblock(gfp_t flags)
  114. {
  115. void *ret = kmem_cache_zalloc(ctblk_cache, flags);
  116. if (!ret)
  117. ehca_gen_err("Out of memory for ctblk");
  118. return ret;
  119. }
  120. void ehca_free_fw_ctrlblock(void *ptr)
  121. {
  122. if (ptr)
  123. kmem_cache_free(ctblk_cache, ptr);
  124. }
  125. #endif
  126. int ehca2ib_return_code(u64 ehca_rc)
  127. {
  128. switch (ehca_rc) {
  129. case H_SUCCESS:
  130. return 0;
  131. case H_RESOURCE: /* Resource in use */
  132. case H_BUSY:
  133. return -EBUSY;
  134. case H_NOT_ENOUGH_RESOURCES: /* insufficient resources */
  135. case H_CONSTRAINED: /* resource constraint */
  136. case H_NO_MEM:
  137. return -ENOMEM;
  138. default:
  139. return -EINVAL;
  140. }
  141. }
  142. static int ehca_create_slab_caches(void)
  143. {
  144. int ret;
  145. ret = ehca_init_pd_cache();
  146. if (ret) {
  147. ehca_gen_err("Cannot create PD SLAB cache.");
  148. return ret;
  149. }
  150. ret = ehca_init_cq_cache();
  151. if (ret) {
  152. ehca_gen_err("Cannot create CQ SLAB cache.");
  153. goto create_slab_caches2;
  154. }
  155. ret = ehca_init_qp_cache();
  156. if (ret) {
  157. ehca_gen_err("Cannot create QP SLAB cache.");
  158. goto create_slab_caches3;
  159. }
  160. ret = ehca_init_av_cache();
  161. if (ret) {
  162. ehca_gen_err("Cannot create AV SLAB cache.");
  163. goto create_slab_caches4;
  164. }
  165. ret = ehca_init_mrmw_cache();
  166. if (ret) {
  167. ehca_gen_err("Cannot create MR&MW SLAB cache.");
  168. goto create_slab_caches5;
  169. }
  170. ret = ehca_init_small_qp_cache();
  171. if (ret) {
  172. ehca_gen_err("Cannot create small queue SLAB cache.");
  173. goto create_slab_caches6;
  174. }
  175. #ifdef CONFIG_PPC_64K_PAGES
  176. ctblk_cache = kmem_cache_create("ehca_cache_ctblk",
  177. EHCA_PAGESIZE, H_CB_ALIGNMENT,
  178. SLAB_HWCACHE_ALIGN,
  179. NULL);
  180. if (!ctblk_cache) {
  181. ehca_gen_err("Cannot create ctblk SLAB cache.");
  182. ehca_cleanup_small_qp_cache();
  183. goto create_slab_caches6;
  184. }
  185. #endif
  186. return 0;
  187. create_slab_caches6:
  188. ehca_cleanup_mrmw_cache();
  189. create_slab_caches5:
  190. ehca_cleanup_av_cache();
  191. create_slab_caches4:
  192. ehca_cleanup_qp_cache();
  193. create_slab_caches3:
  194. ehca_cleanup_cq_cache();
  195. create_slab_caches2:
  196. ehca_cleanup_pd_cache();
  197. return ret;
  198. }
  199. static void ehca_destroy_slab_caches(void)
  200. {
  201. ehca_cleanup_small_qp_cache();
  202. ehca_cleanup_mrmw_cache();
  203. ehca_cleanup_av_cache();
  204. ehca_cleanup_qp_cache();
  205. ehca_cleanup_cq_cache();
  206. ehca_cleanup_pd_cache();
  207. #ifdef CONFIG_PPC_64K_PAGES
  208. if (ctblk_cache)
  209. kmem_cache_destroy(ctblk_cache);
  210. #endif
  211. }
  212. #define EHCA_HCAAVER EHCA_BMASK_IBM(32, 39)
  213. #define EHCA_REVID EHCA_BMASK_IBM(40, 63)
  214. static struct cap_descr {
  215. u64 mask;
  216. char *descr;
  217. } hca_cap_descr[] = {
  218. { HCA_CAP_AH_PORT_NR_CHECK, "HCA_CAP_AH_PORT_NR_CHECK" },
  219. { HCA_CAP_ATOMIC, "HCA_CAP_ATOMIC" },
  220. { HCA_CAP_AUTO_PATH_MIG, "HCA_CAP_AUTO_PATH_MIG" },
  221. { HCA_CAP_BAD_P_KEY_CTR, "HCA_CAP_BAD_P_KEY_CTR" },
  222. { HCA_CAP_SQD_RTS_PORT_CHANGE, "HCA_CAP_SQD_RTS_PORT_CHANGE" },
  223. { HCA_CAP_CUR_QP_STATE_MOD, "HCA_CAP_CUR_QP_STATE_MOD" },
  224. { HCA_CAP_INIT_TYPE, "HCA_CAP_INIT_TYPE" },
  225. { HCA_CAP_PORT_ACTIVE_EVENT, "HCA_CAP_PORT_ACTIVE_EVENT" },
  226. { HCA_CAP_Q_KEY_VIOL_CTR, "HCA_CAP_Q_KEY_VIOL_CTR" },
  227. { HCA_CAP_WQE_RESIZE, "HCA_CAP_WQE_RESIZE" },
  228. { HCA_CAP_RAW_PACKET_MCAST, "HCA_CAP_RAW_PACKET_MCAST" },
  229. { HCA_CAP_SHUTDOWN_PORT, "HCA_CAP_SHUTDOWN_PORT" },
  230. { HCA_CAP_RC_LL_QP, "HCA_CAP_RC_LL_QP" },
  231. { HCA_CAP_SRQ, "HCA_CAP_SRQ" },
  232. { HCA_CAP_UD_LL_QP, "HCA_CAP_UD_LL_QP" },
  233. { HCA_CAP_RESIZE_MR, "HCA_CAP_RESIZE_MR" },
  234. { HCA_CAP_MINI_QP, "HCA_CAP_MINI_QP" },
  235. { HCA_CAP_H_ALLOC_RES_SYNC, "HCA_CAP_H_ALLOC_RES_SYNC" },
  236. };
  237. static int ehca_sense_attributes(struct ehca_shca *shca)
  238. {
  239. int i, ret = 0;
  240. u64 h_ret;
  241. struct hipz_query_hca *rblock;
  242. struct hipz_query_port *port;
  243. static const u32 pgsize_map[] = {
  244. HCA_CAP_MR_PGSIZE_4K, 0x1000,
  245. HCA_CAP_MR_PGSIZE_64K, 0x10000,
  246. HCA_CAP_MR_PGSIZE_1M, 0x100000,
  247. HCA_CAP_MR_PGSIZE_16M, 0x1000000,
  248. };
  249. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  250. if (!rblock) {
  251. ehca_gen_err("Cannot allocate rblock memory.");
  252. return -ENOMEM;
  253. }
  254. h_ret = hipz_h_query_hca(shca->ipz_hca_handle, rblock);
  255. if (h_ret != H_SUCCESS) {
  256. ehca_gen_err("Cannot query device properties. h_ret=%li",
  257. h_ret);
  258. ret = -EPERM;
  259. goto sense_attributes1;
  260. }
  261. if (ehca_nr_ports == 1)
  262. shca->num_ports = 1;
  263. else
  264. shca->num_ports = (u8)rblock->num_ports;
  265. ehca_gen_dbg(" ... found %x ports", rblock->num_ports);
  266. if (ehca_hw_level == 0) {
  267. u32 hcaaver;
  268. u32 revid;
  269. hcaaver = EHCA_BMASK_GET(EHCA_HCAAVER, rblock->hw_ver);
  270. revid = EHCA_BMASK_GET(EHCA_REVID, rblock->hw_ver);
  271. ehca_gen_dbg(" ... hardware version=%x:%x", hcaaver, revid);
  272. if (hcaaver == 1) {
  273. if (revid <= 3)
  274. shca->hw_level = 0x10 | (revid + 1);
  275. else
  276. shca->hw_level = 0x14;
  277. } else if (hcaaver == 2) {
  278. if (revid == 0)
  279. shca->hw_level = 0x21;
  280. else if (revid == 0x10)
  281. shca->hw_level = 0x22;
  282. else if (revid == 0x20 || revid == 0x21)
  283. shca->hw_level = 0x23;
  284. }
  285. if (!shca->hw_level) {
  286. ehca_gen_warn("unknown hardware version"
  287. " - assuming default level");
  288. shca->hw_level = 0x22;
  289. }
  290. } else
  291. shca->hw_level = ehca_hw_level;
  292. ehca_gen_dbg(" ... hardware level=%x", shca->hw_level);
  293. shca->hca_cap = rblock->hca_cap_indicators;
  294. ehca_gen_dbg(" ... HCA capabilities:");
  295. for (i = 0; i < ARRAY_SIZE(hca_cap_descr); i++)
  296. if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
  297. ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
  298. /* Autodetect hCall locking -- the "H_ALLOC_RESOURCE synced" flag is
  299. * a firmware property, so it's valid across all adapters
  300. */
  301. if (ehca_lock_hcalls == -1)
  302. ehca_lock_hcalls = !(shca->hca_cap & HCA_CAP_H_ALLOC_RES_SYNC);
  303. /* translate supported MR page sizes; always support 4K */
  304. shca->hca_cap_mr_pgsize = EHCA_PAGESIZE;
  305. if (ehca_mr_largepage) { /* support extra sizes only if enabled */
  306. for (i = 0; i < ARRAY_SIZE(pgsize_map); i += 2)
  307. if (rblock->memory_page_size_supported & pgsize_map[i])
  308. shca->hca_cap_mr_pgsize |= pgsize_map[i + 1];
  309. }
  310. /* query max MTU from first port -- it's the same for all ports */
  311. port = (struct hipz_query_port *)rblock;
  312. h_ret = hipz_h_query_port(shca->ipz_hca_handle, 1, port);
  313. if (h_ret != H_SUCCESS) {
  314. ehca_gen_err("Cannot query port properties. h_ret=%li",
  315. h_ret);
  316. ret = -EPERM;
  317. goto sense_attributes1;
  318. }
  319. shca->max_mtu = port->max_mtu;
  320. sense_attributes1:
  321. ehca_free_fw_ctrlblock(rblock);
  322. return ret;
  323. }
  324. static int init_node_guid(struct ehca_shca *shca)
  325. {
  326. int ret = 0;
  327. struct hipz_query_hca *rblock;
  328. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  329. if (!rblock) {
  330. ehca_err(&shca->ib_device, "Can't allocate rblock memory.");
  331. return -ENOMEM;
  332. }
  333. if (hipz_h_query_hca(shca->ipz_hca_handle, rblock) != H_SUCCESS) {
  334. ehca_err(&shca->ib_device, "Can't query device properties");
  335. ret = -EINVAL;
  336. goto init_node_guid1;
  337. }
  338. memcpy(&shca->ib_device.node_guid, &rblock->node_guid, sizeof(u64));
  339. init_node_guid1:
  340. ehca_free_fw_ctrlblock(rblock);
  341. return ret;
  342. }
  343. int ehca_init_device(struct ehca_shca *shca)
  344. {
  345. int ret;
  346. ret = init_node_guid(shca);
  347. if (ret)
  348. return ret;
  349. strlcpy(shca->ib_device.name, "ehca%d", IB_DEVICE_NAME_MAX);
  350. shca->ib_device.owner = THIS_MODULE;
  351. shca->ib_device.uverbs_abi_ver = 8;
  352. shca->ib_device.uverbs_cmd_mask =
  353. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  354. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  355. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  356. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  357. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  358. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  359. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  360. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  361. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  362. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  363. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  364. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  365. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  366. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  367. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  368. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
  369. shca->ib_device.node_type = RDMA_NODE_IB_CA;
  370. shca->ib_device.phys_port_cnt = shca->num_ports;
  371. shca->ib_device.num_comp_vectors = 1;
  372. shca->ib_device.dma_device = &shca->ofdev->dev;
  373. shca->ib_device.query_device = ehca_query_device;
  374. shca->ib_device.query_port = ehca_query_port;
  375. shca->ib_device.query_gid = ehca_query_gid;
  376. shca->ib_device.query_pkey = ehca_query_pkey;
  377. /* shca->in_device.modify_device = ehca_modify_device */
  378. shca->ib_device.modify_port = ehca_modify_port;
  379. shca->ib_device.alloc_ucontext = ehca_alloc_ucontext;
  380. shca->ib_device.dealloc_ucontext = ehca_dealloc_ucontext;
  381. shca->ib_device.alloc_pd = ehca_alloc_pd;
  382. shca->ib_device.dealloc_pd = ehca_dealloc_pd;
  383. shca->ib_device.create_ah = ehca_create_ah;
  384. /* shca->ib_device.modify_ah = ehca_modify_ah; */
  385. shca->ib_device.query_ah = ehca_query_ah;
  386. shca->ib_device.destroy_ah = ehca_destroy_ah;
  387. shca->ib_device.create_qp = ehca_create_qp;
  388. shca->ib_device.modify_qp = ehca_modify_qp;
  389. shca->ib_device.query_qp = ehca_query_qp;
  390. shca->ib_device.destroy_qp = ehca_destroy_qp;
  391. shca->ib_device.post_send = ehca_post_send;
  392. shca->ib_device.post_recv = ehca_post_recv;
  393. shca->ib_device.create_cq = ehca_create_cq;
  394. shca->ib_device.destroy_cq = ehca_destroy_cq;
  395. shca->ib_device.resize_cq = ehca_resize_cq;
  396. shca->ib_device.poll_cq = ehca_poll_cq;
  397. /* shca->ib_device.peek_cq = ehca_peek_cq; */
  398. shca->ib_device.req_notify_cq = ehca_req_notify_cq;
  399. /* shca->ib_device.req_ncomp_notif = ehca_req_ncomp_notif; */
  400. shca->ib_device.get_dma_mr = ehca_get_dma_mr;
  401. shca->ib_device.reg_phys_mr = ehca_reg_phys_mr;
  402. shca->ib_device.reg_user_mr = ehca_reg_user_mr;
  403. shca->ib_device.query_mr = ehca_query_mr;
  404. shca->ib_device.dereg_mr = ehca_dereg_mr;
  405. shca->ib_device.rereg_phys_mr = ehca_rereg_phys_mr;
  406. shca->ib_device.alloc_mw = ehca_alloc_mw;
  407. shca->ib_device.bind_mw = ehca_bind_mw;
  408. shca->ib_device.dealloc_mw = ehca_dealloc_mw;
  409. shca->ib_device.alloc_fmr = ehca_alloc_fmr;
  410. shca->ib_device.map_phys_fmr = ehca_map_phys_fmr;
  411. shca->ib_device.unmap_fmr = ehca_unmap_fmr;
  412. shca->ib_device.dealloc_fmr = ehca_dealloc_fmr;
  413. shca->ib_device.attach_mcast = ehca_attach_mcast;
  414. shca->ib_device.detach_mcast = ehca_detach_mcast;
  415. /* shca->ib_device.process_mad = ehca_process_mad; */
  416. shca->ib_device.mmap = ehca_mmap;
  417. if (EHCA_BMASK_GET(HCA_CAP_SRQ, shca->hca_cap)) {
  418. shca->ib_device.uverbs_cmd_mask |=
  419. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  420. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  421. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  422. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  423. shca->ib_device.create_srq = ehca_create_srq;
  424. shca->ib_device.modify_srq = ehca_modify_srq;
  425. shca->ib_device.query_srq = ehca_query_srq;
  426. shca->ib_device.destroy_srq = ehca_destroy_srq;
  427. shca->ib_device.post_srq_recv = ehca_post_srq_recv;
  428. }
  429. return ret;
  430. }
  431. static int ehca_create_aqp1(struct ehca_shca *shca, u32 port)
  432. {
  433. struct ehca_sport *sport = &shca->sport[port - 1];
  434. struct ib_cq *ibcq;
  435. struct ib_qp *ibqp;
  436. struct ib_qp_init_attr qp_init_attr;
  437. int ret;
  438. if (sport->ibcq_aqp1) {
  439. ehca_err(&shca->ib_device, "AQP1 CQ is already created.");
  440. return -EPERM;
  441. }
  442. ibcq = ib_create_cq(&shca->ib_device, NULL, NULL, (void *)(-1), 10, 0);
  443. if (IS_ERR(ibcq)) {
  444. ehca_err(&shca->ib_device, "Cannot create AQP1 CQ.");
  445. return PTR_ERR(ibcq);
  446. }
  447. sport->ibcq_aqp1 = ibcq;
  448. if (sport->ibqp_aqp1) {
  449. ehca_err(&shca->ib_device, "AQP1 QP is already created.");
  450. ret = -EPERM;
  451. goto create_aqp1;
  452. }
  453. memset(&qp_init_attr, 0, sizeof(struct ib_qp_init_attr));
  454. qp_init_attr.send_cq = ibcq;
  455. qp_init_attr.recv_cq = ibcq;
  456. qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
  457. qp_init_attr.cap.max_send_wr = 100;
  458. qp_init_attr.cap.max_recv_wr = 100;
  459. qp_init_attr.cap.max_send_sge = 2;
  460. qp_init_attr.cap.max_recv_sge = 1;
  461. qp_init_attr.qp_type = IB_QPT_GSI;
  462. qp_init_attr.port_num = port;
  463. qp_init_attr.qp_context = NULL;
  464. qp_init_attr.event_handler = NULL;
  465. qp_init_attr.srq = NULL;
  466. ibqp = ib_create_qp(&shca->pd->ib_pd, &qp_init_attr);
  467. if (IS_ERR(ibqp)) {
  468. ehca_err(&shca->ib_device, "Cannot create AQP1 QP.");
  469. ret = PTR_ERR(ibqp);
  470. goto create_aqp1;
  471. }
  472. sport->ibqp_aqp1 = ibqp;
  473. return 0;
  474. create_aqp1:
  475. ib_destroy_cq(sport->ibcq_aqp1);
  476. return ret;
  477. }
  478. static int ehca_destroy_aqp1(struct ehca_sport *sport)
  479. {
  480. int ret;
  481. ret = ib_destroy_qp(sport->ibqp_aqp1);
  482. if (ret) {
  483. ehca_gen_err("Cannot destroy AQP1 QP. ret=%i", ret);
  484. return ret;
  485. }
  486. ret = ib_destroy_cq(sport->ibcq_aqp1);
  487. if (ret)
  488. ehca_gen_err("Cannot destroy AQP1 CQ. ret=%i", ret);
  489. return ret;
  490. }
  491. static ssize_t ehca_show_debug_level(struct device_driver *ddp, char *buf)
  492. {
  493. return snprintf(buf, PAGE_SIZE, "%d\n",
  494. ehca_debug_level);
  495. }
  496. static ssize_t ehca_store_debug_level(struct device_driver *ddp,
  497. const char *buf, size_t count)
  498. {
  499. int value = (*buf) - '0';
  500. if (value >= 0 && value <= 9)
  501. ehca_debug_level = value;
  502. return 1;
  503. }
  504. DRIVER_ATTR(debug_level, S_IRUSR | S_IWUSR,
  505. ehca_show_debug_level, ehca_store_debug_level);
  506. static struct attribute *ehca_drv_attrs[] = {
  507. &driver_attr_debug_level.attr,
  508. NULL
  509. };
  510. static struct attribute_group ehca_drv_attr_grp = {
  511. .attrs = ehca_drv_attrs
  512. };
  513. static struct attribute_group *ehca_drv_attr_groups[] = {
  514. &ehca_drv_attr_grp,
  515. NULL,
  516. };
  517. #define EHCA_RESOURCE_ATTR(name) \
  518. static ssize_t ehca_show_##name(struct device *dev, \
  519. struct device_attribute *attr, \
  520. char *buf) \
  521. { \
  522. struct ehca_shca *shca; \
  523. struct hipz_query_hca *rblock; \
  524. int data; \
  525. \
  526. shca = dev->driver_data; \
  527. \
  528. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL); \
  529. if (!rblock) { \
  530. dev_err(dev, "Can't allocate rblock memory.\n"); \
  531. return 0; \
  532. } \
  533. \
  534. if (hipz_h_query_hca(shca->ipz_hca_handle, rblock) != H_SUCCESS) { \
  535. dev_err(dev, "Can't query device properties\n"); \
  536. ehca_free_fw_ctrlblock(rblock); \
  537. return 0; \
  538. } \
  539. \
  540. data = rblock->name; \
  541. ehca_free_fw_ctrlblock(rblock); \
  542. \
  543. if ((strcmp(#name, "num_ports") == 0) && (ehca_nr_ports == 1)) \
  544. return snprintf(buf, 256, "1\n"); \
  545. else \
  546. return snprintf(buf, 256, "%d\n", data); \
  547. \
  548. } \
  549. static DEVICE_ATTR(name, S_IRUGO, ehca_show_##name, NULL);
  550. EHCA_RESOURCE_ATTR(num_ports);
  551. EHCA_RESOURCE_ATTR(hw_ver);
  552. EHCA_RESOURCE_ATTR(max_eq);
  553. EHCA_RESOURCE_ATTR(cur_eq);
  554. EHCA_RESOURCE_ATTR(max_cq);
  555. EHCA_RESOURCE_ATTR(cur_cq);
  556. EHCA_RESOURCE_ATTR(max_qp);
  557. EHCA_RESOURCE_ATTR(cur_qp);
  558. EHCA_RESOURCE_ATTR(max_mr);
  559. EHCA_RESOURCE_ATTR(cur_mr);
  560. EHCA_RESOURCE_ATTR(max_mw);
  561. EHCA_RESOURCE_ATTR(cur_mw);
  562. EHCA_RESOURCE_ATTR(max_pd);
  563. EHCA_RESOURCE_ATTR(max_ah);
  564. static ssize_t ehca_show_adapter_handle(struct device *dev,
  565. struct device_attribute *attr,
  566. char *buf)
  567. {
  568. struct ehca_shca *shca = dev->driver_data;
  569. return sprintf(buf, "%lx\n", shca->ipz_hca_handle.handle);
  570. }
  571. static DEVICE_ATTR(adapter_handle, S_IRUGO, ehca_show_adapter_handle, NULL);
  572. static ssize_t ehca_show_mr_largepage(struct device *dev,
  573. struct device_attribute *attr,
  574. char *buf)
  575. {
  576. return sprintf(buf, "%d\n", ehca_mr_largepage);
  577. }
  578. static DEVICE_ATTR(mr_largepage, S_IRUGO, ehca_show_mr_largepage, NULL);
  579. static struct attribute *ehca_dev_attrs[] = {
  580. &dev_attr_adapter_handle.attr,
  581. &dev_attr_num_ports.attr,
  582. &dev_attr_hw_ver.attr,
  583. &dev_attr_max_eq.attr,
  584. &dev_attr_cur_eq.attr,
  585. &dev_attr_max_cq.attr,
  586. &dev_attr_cur_cq.attr,
  587. &dev_attr_max_qp.attr,
  588. &dev_attr_cur_qp.attr,
  589. &dev_attr_max_mr.attr,
  590. &dev_attr_cur_mr.attr,
  591. &dev_attr_max_mw.attr,
  592. &dev_attr_cur_mw.attr,
  593. &dev_attr_max_pd.attr,
  594. &dev_attr_max_ah.attr,
  595. &dev_attr_mr_largepage.attr,
  596. NULL
  597. };
  598. static struct attribute_group ehca_dev_attr_grp = {
  599. .attrs = ehca_dev_attrs
  600. };
  601. static int __devinit ehca_probe(struct of_device *dev,
  602. const struct of_device_id *id)
  603. {
  604. struct ehca_shca *shca;
  605. const u64 *handle;
  606. struct ib_pd *ibpd;
  607. int ret;
  608. handle = of_get_property(dev->node, "ibm,hca-handle", NULL);
  609. if (!handle) {
  610. ehca_gen_err("Cannot get eHCA handle for adapter: %s.",
  611. dev->node->full_name);
  612. return -ENODEV;
  613. }
  614. if (!(*handle)) {
  615. ehca_gen_err("Wrong eHCA handle for adapter: %s.",
  616. dev->node->full_name);
  617. return -ENODEV;
  618. }
  619. shca = (struct ehca_shca *)ib_alloc_device(sizeof(*shca));
  620. if (!shca) {
  621. ehca_gen_err("Cannot allocate shca memory.");
  622. return -ENOMEM;
  623. }
  624. mutex_init(&shca->modify_mutex);
  625. shca->ofdev = dev;
  626. shca->ipz_hca_handle.handle = *handle;
  627. dev->dev.driver_data = shca;
  628. ret = ehca_sense_attributes(shca);
  629. if (ret < 0) {
  630. ehca_gen_err("Cannot sense eHCA attributes.");
  631. goto probe1;
  632. }
  633. ret = ehca_init_device(shca);
  634. if (ret) {
  635. ehca_gen_err("Cannot init ehca device struct");
  636. goto probe1;
  637. }
  638. /* create event queues */
  639. ret = ehca_create_eq(shca, &shca->eq, EHCA_EQ, 2048);
  640. if (ret) {
  641. ehca_err(&shca->ib_device, "Cannot create EQ.");
  642. goto probe1;
  643. }
  644. ret = ehca_create_eq(shca, &shca->neq, EHCA_NEQ, 513);
  645. if (ret) {
  646. ehca_err(&shca->ib_device, "Cannot create NEQ.");
  647. goto probe3;
  648. }
  649. /* create internal protection domain */
  650. ibpd = ehca_alloc_pd(&shca->ib_device, (void *)(-1), NULL);
  651. if (IS_ERR(ibpd)) {
  652. ehca_err(&shca->ib_device, "Cannot create internal PD.");
  653. ret = PTR_ERR(ibpd);
  654. goto probe4;
  655. }
  656. shca->pd = container_of(ibpd, struct ehca_pd, ib_pd);
  657. shca->pd->ib_pd.device = &shca->ib_device;
  658. /* create internal max MR */
  659. ret = ehca_reg_internal_maxmr(shca, shca->pd, &shca->maxmr);
  660. if (ret) {
  661. ehca_err(&shca->ib_device, "Cannot create internal MR ret=%i",
  662. ret);
  663. goto probe5;
  664. }
  665. ret = ib_register_device(&shca->ib_device);
  666. if (ret) {
  667. ehca_err(&shca->ib_device,
  668. "ib_register_device() failed ret=%i", ret);
  669. goto probe6;
  670. }
  671. /* create AQP1 for port 1 */
  672. if (ehca_open_aqp1 == 1) {
  673. shca->sport[0].port_state = IB_PORT_DOWN;
  674. ret = ehca_create_aqp1(shca, 1);
  675. if (ret) {
  676. ehca_err(&shca->ib_device,
  677. "Cannot create AQP1 for port 1.");
  678. goto probe7;
  679. }
  680. }
  681. /* create AQP1 for port 2 */
  682. if ((ehca_open_aqp1 == 1) && (shca->num_ports == 2)) {
  683. shca->sport[1].port_state = IB_PORT_DOWN;
  684. ret = ehca_create_aqp1(shca, 2);
  685. if (ret) {
  686. ehca_err(&shca->ib_device,
  687. "Cannot create AQP1 for port 2.");
  688. goto probe8;
  689. }
  690. }
  691. ret = sysfs_create_group(&dev->dev.kobj, &ehca_dev_attr_grp);
  692. if (ret) /* only complain; we can live without attributes */
  693. ehca_err(&shca->ib_device,
  694. "Cannot create device attributes ret=%d", ret);
  695. spin_lock(&shca_list_lock);
  696. list_add(&shca->shca_list, &shca_list);
  697. spin_unlock(&shca_list_lock);
  698. return 0;
  699. probe8:
  700. ret = ehca_destroy_aqp1(&shca->sport[0]);
  701. if (ret)
  702. ehca_err(&shca->ib_device,
  703. "Cannot destroy AQP1 for port 1. ret=%i", ret);
  704. probe7:
  705. ib_unregister_device(&shca->ib_device);
  706. probe6:
  707. ret = ehca_dereg_internal_maxmr(shca);
  708. if (ret)
  709. ehca_err(&shca->ib_device,
  710. "Cannot destroy internal MR. ret=%x", ret);
  711. probe5:
  712. ret = ehca_dealloc_pd(&shca->pd->ib_pd);
  713. if (ret)
  714. ehca_err(&shca->ib_device,
  715. "Cannot destroy internal PD. ret=%x", ret);
  716. probe4:
  717. ret = ehca_destroy_eq(shca, &shca->neq);
  718. if (ret)
  719. ehca_err(&shca->ib_device,
  720. "Cannot destroy NEQ. ret=%x", ret);
  721. probe3:
  722. ret = ehca_destroy_eq(shca, &shca->eq);
  723. if (ret)
  724. ehca_err(&shca->ib_device,
  725. "Cannot destroy EQ. ret=%x", ret);
  726. probe1:
  727. ib_dealloc_device(&shca->ib_device);
  728. return -EINVAL;
  729. }
  730. static int __devexit ehca_remove(struct of_device *dev)
  731. {
  732. struct ehca_shca *shca = dev->dev.driver_data;
  733. int ret;
  734. sysfs_remove_group(&dev->dev.kobj, &ehca_dev_attr_grp);
  735. if (ehca_open_aqp1 == 1) {
  736. int i;
  737. for (i = 0; i < shca->num_ports; i++) {
  738. ret = ehca_destroy_aqp1(&shca->sport[i]);
  739. if (ret)
  740. ehca_err(&shca->ib_device,
  741. "Cannot destroy AQP1 for port %x "
  742. "ret=%i", ret, i);
  743. }
  744. }
  745. ib_unregister_device(&shca->ib_device);
  746. ret = ehca_dereg_internal_maxmr(shca);
  747. if (ret)
  748. ehca_err(&shca->ib_device,
  749. "Cannot destroy internal MR. ret=%i", ret);
  750. ret = ehca_dealloc_pd(&shca->pd->ib_pd);
  751. if (ret)
  752. ehca_err(&shca->ib_device,
  753. "Cannot destroy internal PD. ret=%i", ret);
  754. ret = ehca_destroy_eq(shca, &shca->eq);
  755. if (ret)
  756. ehca_err(&shca->ib_device, "Cannot destroy EQ. ret=%i", ret);
  757. ret = ehca_destroy_eq(shca, &shca->neq);
  758. if (ret)
  759. ehca_err(&shca->ib_device, "Canot destroy NEQ. ret=%i", ret);
  760. ib_dealloc_device(&shca->ib_device);
  761. spin_lock(&shca_list_lock);
  762. list_del(&shca->shca_list);
  763. spin_unlock(&shca_list_lock);
  764. return ret;
  765. }
  766. static struct of_device_id ehca_device_table[] =
  767. {
  768. {
  769. .name = "lhca",
  770. .compatible = "IBM,lhca",
  771. },
  772. {},
  773. };
  774. static struct of_platform_driver ehca_driver = {
  775. .name = "ehca",
  776. .match_table = ehca_device_table,
  777. .probe = ehca_probe,
  778. .remove = ehca_remove,
  779. .driver = {
  780. .groups = ehca_drv_attr_groups,
  781. },
  782. };
  783. void ehca_poll_eqs(unsigned long data)
  784. {
  785. struct ehca_shca *shca;
  786. spin_lock(&shca_list_lock);
  787. list_for_each_entry(shca, &shca_list, shca_list) {
  788. if (shca->eq.is_initialized) {
  789. /* call deadman proc only if eq ptr does not change */
  790. struct ehca_eq *eq = &shca->eq;
  791. int max = 3;
  792. volatile u64 q_ofs, q_ofs2;
  793. u64 flags;
  794. spin_lock_irqsave(&eq->spinlock, flags);
  795. q_ofs = eq->ipz_queue.current_q_offset;
  796. spin_unlock_irqrestore(&eq->spinlock, flags);
  797. do {
  798. spin_lock_irqsave(&eq->spinlock, flags);
  799. q_ofs2 = eq->ipz_queue.current_q_offset;
  800. spin_unlock_irqrestore(&eq->spinlock, flags);
  801. max--;
  802. } while (q_ofs == q_ofs2 && max > 0);
  803. if (q_ofs == q_ofs2)
  804. ehca_process_eq(shca, 0);
  805. }
  806. }
  807. mod_timer(&poll_eqs_timer, round_jiffies(jiffies + HZ));
  808. spin_unlock(&shca_list_lock);
  809. }
  810. int __init ehca_module_init(void)
  811. {
  812. int ret;
  813. printk(KERN_INFO "eHCA Infiniband Device Driver "
  814. "(Version " HCAD_VERSION ")\n");
  815. ret = ehca_create_comp_pool();
  816. if (ret) {
  817. ehca_gen_err("Cannot create comp pool.");
  818. return ret;
  819. }
  820. ret = ehca_create_slab_caches();
  821. if (ret) {
  822. ehca_gen_err("Cannot create SLAB caches");
  823. ret = -ENOMEM;
  824. goto module_init1;
  825. }
  826. ret = ibmebus_register_driver(&ehca_driver);
  827. if (ret) {
  828. ehca_gen_err("Cannot register eHCA device driver");
  829. ret = -EINVAL;
  830. goto module_init2;
  831. }
  832. if (ehca_poll_all_eqs != 1) {
  833. ehca_gen_err("WARNING!!!");
  834. ehca_gen_err("It is possible to lose interrupts.");
  835. } else {
  836. init_timer(&poll_eqs_timer);
  837. poll_eqs_timer.function = ehca_poll_eqs;
  838. poll_eqs_timer.expires = jiffies + HZ;
  839. add_timer(&poll_eqs_timer);
  840. }
  841. return 0;
  842. module_init2:
  843. ehca_destroy_slab_caches();
  844. module_init1:
  845. ehca_destroy_comp_pool();
  846. return ret;
  847. };
  848. void __exit ehca_module_exit(void)
  849. {
  850. if (ehca_poll_all_eqs == 1)
  851. del_timer_sync(&poll_eqs_timer);
  852. ibmebus_unregister_driver(&ehca_driver);
  853. ehca_destroy_slab_caches();
  854. ehca_destroy_comp_pool();
  855. idr_destroy(&ehca_cq_idr);
  856. idr_destroy(&ehca_qp_idr);
  857. };
  858. module_init(ehca_module_init);
  859. module_exit(ehca_module_exit);