microcode_amd.c 8.3 KB

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  1. /*
  2. * AMD CPU Microcode Update Driver for Linux
  3. * Copyright (C) 2008 Advanced Micro Devices Inc.
  4. *
  5. * Author: Peter Oruba <peter.oruba@amd.com>
  6. *
  7. * Based on work by:
  8. * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  9. *
  10. * This driver allows to upgrade microcode on AMD
  11. * family 0x10 and 0x11 processors.
  12. *
  13. * Licensed under the terms of the GNU General Public
  14. * License version 2. See file COPYING for details.
  15. */
  16. #include <linux/firmware.h>
  17. #include <linux/pci_ids.h>
  18. #include <linux/uaccess.h>
  19. #include <linux/vmalloc.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/pci.h>
  23. #include <asm/microcode.h>
  24. #include <asm/processor.h>
  25. #include <asm/msr.h>
  26. MODULE_DESCRIPTION("AMD Microcode Update Driver");
  27. MODULE_AUTHOR("Peter Oruba");
  28. MODULE_LICENSE("GPL v2");
  29. #define UCODE_MAGIC 0x00414d44
  30. #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
  31. #define UCODE_UCODE_TYPE 0x00000001
  32. const struct firmware *firmware;
  33. struct equiv_cpu_entry {
  34. u32 installed_cpu;
  35. u32 fixed_errata_mask;
  36. u32 fixed_errata_compare;
  37. u16 equiv_cpu;
  38. u16 res;
  39. } __attribute__((packed));
  40. struct microcode_header_amd {
  41. u32 data_code;
  42. u32 patch_id;
  43. u16 mc_patch_data_id;
  44. u8 mc_patch_data_len;
  45. u8 init_flag;
  46. u32 mc_patch_data_checksum;
  47. u32 nb_dev_id;
  48. u32 sb_dev_id;
  49. u16 processor_rev_id;
  50. u8 nb_rev_id;
  51. u8 sb_rev_id;
  52. u8 bios_api_rev;
  53. u8 reserved1[3];
  54. u32 match_reg[8];
  55. } __attribute__((packed));
  56. struct microcode_amd {
  57. struct microcode_header_amd hdr;
  58. unsigned int mpb[0];
  59. };
  60. #define UCODE_MAX_SIZE 2048
  61. #define UCODE_CONTAINER_SECTION_HDR 8
  62. #define UCODE_CONTAINER_HEADER_SIZE 12
  63. static struct equiv_cpu_entry *equiv_cpu_table;
  64. static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
  65. {
  66. struct cpuinfo_x86 *c = &cpu_data(cpu);
  67. u32 dummy;
  68. memset(csig, 0, sizeof(*csig));
  69. if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
  70. pr_warning("microcode: CPU%d: AMD CPU family 0x%x not "
  71. "supported\n", cpu, c->x86);
  72. return -1;
  73. }
  74. rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
  75. pr_info("microcode: CPU%d: patch_level=0x%x\n", cpu, csig->rev);
  76. return 0;
  77. }
  78. static int get_matching_microcode(int cpu, void *mc, int rev)
  79. {
  80. struct microcode_header_amd *mc_header = mc;
  81. unsigned int current_cpu_id;
  82. u16 equiv_cpu_id = 0;
  83. unsigned int i = 0;
  84. BUG_ON(equiv_cpu_table == NULL);
  85. current_cpu_id = cpuid_eax(0x00000001);
  86. while (equiv_cpu_table[i].installed_cpu != 0) {
  87. if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
  88. equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
  89. break;
  90. }
  91. i++;
  92. }
  93. if (!equiv_cpu_id)
  94. return 0;
  95. if (mc_header->processor_rev_id != equiv_cpu_id)
  96. return 0;
  97. /* ucode might be chipset specific -- currently we don't support this */
  98. if (mc_header->nb_dev_id || mc_header->sb_dev_id) {
  99. pr_err(KERN_ERR "microcode: CPU%d: loading of chipset "
  100. "specific code not yet supported\n", cpu);
  101. return 0;
  102. }
  103. if (mc_header->patch_id <= rev)
  104. return 0;
  105. return 1;
  106. }
  107. static int apply_microcode_amd(int cpu)
  108. {
  109. u32 rev, dummy;
  110. int cpu_num = raw_smp_processor_id();
  111. struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
  112. struct microcode_amd *mc_amd = uci->mc;
  113. /* We should bind the task to the CPU */
  114. BUG_ON(cpu_num != cpu);
  115. if (mc_amd == NULL)
  116. return 0;
  117. wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
  118. /* get patch id after patching */
  119. rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
  120. /* check current patch id and patch's id for match */
  121. if (rev != mc_amd->hdr.patch_id) {
  122. pr_err("microcode: CPU%d: update failed "
  123. "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id);
  124. return -1;
  125. }
  126. pr_info("microcode: CPU%d: updated (new patch_level=0x%x)\n", cpu, rev);
  127. uci->cpu_sig.rev = rev;
  128. return 0;
  129. }
  130. static int get_ucode_data(void *to, const u8 *from, size_t n)
  131. {
  132. memcpy(to, from, n);
  133. return 0;
  134. }
  135. static void *
  136. get_next_ucode(const u8 *buf, unsigned int size, unsigned int *mc_size)
  137. {
  138. unsigned int total_size;
  139. u8 section_hdr[UCODE_CONTAINER_SECTION_HDR];
  140. void *mc;
  141. if (get_ucode_data(section_hdr, buf, UCODE_CONTAINER_SECTION_HDR))
  142. return NULL;
  143. if (section_hdr[0] != UCODE_UCODE_TYPE) {
  144. pr_err("microcode: error: invalid type field in "
  145. "container file section header\n");
  146. return NULL;
  147. }
  148. total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8));
  149. if (total_size > size || total_size > UCODE_MAX_SIZE) {
  150. pr_err("microcode: error: size mismatch\n");
  151. return NULL;
  152. }
  153. mc = vmalloc(UCODE_MAX_SIZE);
  154. if (mc) {
  155. memset(mc, 0, UCODE_MAX_SIZE);
  156. if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR,
  157. total_size)) {
  158. vfree(mc);
  159. mc = NULL;
  160. } else
  161. *mc_size = total_size + UCODE_CONTAINER_SECTION_HDR;
  162. }
  163. return mc;
  164. }
  165. static int install_equiv_cpu_table(const u8 *buf)
  166. {
  167. u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE];
  168. unsigned int *buf_pos = (unsigned int *)container_hdr;
  169. unsigned long size;
  170. if (get_ucode_data(&container_hdr, buf, UCODE_CONTAINER_HEADER_SIZE))
  171. return 0;
  172. size = buf_pos[2];
  173. if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
  174. pr_err("microcode: error: invalid type field in "
  175. "container file section header\n");
  176. return 0;
  177. }
  178. equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
  179. if (!equiv_cpu_table) {
  180. pr_err("microcode: failed to allocate equivalent CPU table\n");
  181. return 0;
  182. }
  183. buf += UCODE_CONTAINER_HEADER_SIZE;
  184. if (get_ucode_data(equiv_cpu_table, buf, size)) {
  185. vfree(equiv_cpu_table);
  186. return 0;
  187. }
  188. return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
  189. }
  190. static void free_equiv_cpu_table(void)
  191. {
  192. vfree(equiv_cpu_table);
  193. equiv_cpu_table = NULL;
  194. }
  195. static enum ucode_state
  196. generic_load_microcode(int cpu, const u8 *data, size_t size)
  197. {
  198. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  199. const u8 *ucode_ptr = data;
  200. void *new_mc = NULL;
  201. void *mc;
  202. int new_rev = uci->cpu_sig.rev;
  203. unsigned int leftover;
  204. unsigned long offset;
  205. enum ucode_state state = UCODE_OK;
  206. offset = install_equiv_cpu_table(ucode_ptr);
  207. if (!offset) {
  208. pr_err("microcode: failed to create equivalent cpu table\n");
  209. return UCODE_ERROR;
  210. }
  211. ucode_ptr += offset;
  212. leftover = size - offset;
  213. while (leftover) {
  214. unsigned int uninitialized_var(mc_size);
  215. struct microcode_header_amd *mc_header;
  216. mc = get_next_ucode(ucode_ptr, leftover, &mc_size);
  217. if (!mc)
  218. break;
  219. mc_header = (struct microcode_header_amd *)mc;
  220. if (get_matching_microcode(cpu, mc, new_rev)) {
  221. vfree(new_mc);
  222. new_rev = mc_header->patch_id;
  223. new_mc = mc;
  224. } else
  225. vfree(mc);
  226. ucode_ptr += mc_size;
  227. leftover -= mc_size;
  228. }
  229. if (new_mc) {
  230. if (!leftover) {
  231. vfree(uci->mc);
  232. uci->mc = new_mc;
  233. pr_debug("microcode: CPU%d found a matching microcode "
  234. "update with version 0x%x (current=0x%x)\n",
  235. cpu, new_rev, uci->cpu_sig.rev);
  236. } else {
  237. vfree(new_mc);
  238. state = UCODE_ERROR;
  239. }
  240. } else
  241. state = UCODE_NFOUND;
  242. free_equiv_cpu_table();
  243. return state;
  244. }
  245. static enum ucode_state request_microcode_fw(int cpu, struct device *device)
  246. {
  247. enum ucode_state ret;
  248. if (firmware == NULL)
  249. return UCODE_NFOUND;
  250. if (*(u32 *)firmware->data != UCODE_MAGIC) {
  251. pr_err("microcode: invalid UCODE_MAGIC (0x%08x)\n",
  252. *(u32 *)firmware->data);
  253. return UCODE_ERROR;
  254. }
  255. ret = generic_load_microcode(cpu, firmware->data, firmware->size);
  256. return ret;
  257. }
  258. static enum ucode_state
  259. request_microcode_user(int cpu, const void __user *buf, size_t size)
  260. {
  261. pr_info("microcode: AMD microcode update via "
  262. "/dev/cpu/microcode not supported\n");
  263. return UCODE_ERROR;
  264. }
  265. static void microcode_fini_cpu_amd(int cpu)
  266. {
  267. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  268. vfree(uci->mc);
  269. uci->mc = NULL;
  270. }
  271. void init_microcode_amd(struct device *device)
  272. {
  273. const char *fw_name = "amd-ucode/microcode_amd.bin";
  274. if (request_firmware(&firmware, fw_name, device))
  275. pr_err("microcode: failed to load file %s\n", fw_name);
  276. }
  277. void fini_microcode_amd(void)
  278. {
  279. release_firmware(firmware);
  280. }
  281. static struct microcode_ops microcode_amd_ops = {
  282. .init = init_microcode_amd,
  283. .fini = fini_microcode_amd,
  284. .request_microcode_user = request_microcode_user,
  285. .request_microcode_fw = request_microcode_fw,
  286. .collect_cpu_info = collect_cpu_info_amd,
  287. .apply_microcode = apply_microcode_amd,
  288. .microcode_fini_cpu = microcode_fini_cpu_amd,
  289. };
  290. struct microcode_ops * __init init_amd_microcode(void)
  291. {
  292. return &microcode_amd_ops;
  293. }