radeon_mode.h 16 KB

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  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <drm_dp_helper.h>
  35. #include <linux/i2c.h>
  36. #include <linux/i2c-id.h>
  37. #include <linux/i2c-algo-bit.h>
  38. #include "radeon_fixed.h"
  39. struct radeon_device;
  40. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  41. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  42. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  43. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  44. enum radeon_connector_type {
  45. CONNECTOR_NONE,
  46. CONNECTOR_VGA,
  47. CONNECTOR_DVI_I,
  48. CONNECTOR_DVI_D,
  49. CONNECTOR_DVI_A,
  50. CONNECTOR_STV,
  51. CONNECTOR_CTV,
  52. CONNECTOR_LVDS,
  53. CONNECTOR_DIGITAL,
  54. CONNECTOR_SCART,
  55. CONNECTOR_HDMI_TYPE_A,
  56. CONNECTOR_HDMI_TYPE_B,
  57. CONNECTOR_0XC,
  58. CONNECTOR_0XD,
  59. CONNECTOR_DIN,
  60. CONNECTOR_DISPLAY_PORT,
  61. CONNECTOR_UNSUPPORTED
  62. };
  63. enum radeon_dvi_type {
  64. DVI_AUTO,
  65. DVI_DIGITAL,
  66. DVI_ANALOG
  67. };
  68. enum radeon_rmx_type {
  69. RMX_OFF,
  70. RMX_FULL,
  71. RMX_CENTER,
  72. RMX_ASPECT
  73. };
  74. enum radeon_tv_std {
  75. TV_STD_NTSC,
  76. TV_STD_PAL,
  77. TV_STD_PAL_M,
  78. TV_STD_PAL_60,
  79. TV_STD_NTSC_J,
  80. TV_STD_SCART_PAL,
  81. TV_STD_SECAM,
  82. TV_STD_PAL_CN,
  83. };
  84. /* radeon gpio-based i2c
  85. * 1. "mask" reg and bits
  86. * grabs the gpio pins for software use
  87. * 0=not held 1=held
  88. * 2. "a" reg and bits
  89. * output pin value
  90. * 0=low 1=high
  91. * 3. "en" reg and bits
  92. * sets the pin direction
  93. * 0=input 1=output
  94. * 4. "y" reg and bits
  95. * input pin value
  96. * 0=low 1=high
  97. */
  98. struct radeon_i2c_bus_rec {
  99. bool valid;
  100. uint32_t mask_clk_reg;
  101. uint32_t mask_data_reg;
  102. uint32_t a_clk_reg;
  103. uint32_t a_data_reg;
  104. uint32_t en_clk_reg;
  105. uint32_t en_data_reg;
  106. uint32_t y_clk_reg;
  107. uint32_t y_data_reg;
  108. uint32_t mask_clk_mask;
  109. uint32_t mask_data_mask;
  110. uint32_t a_clk_mask;
  111. uint32_t a_data_mask;
  112. uint32_t en_clk_mask;
  113. uint32_t en_data_mask;
  114. uint32_t y_clk_mask;
  115. uint32_t y_data_mask;
  116. };
  117. struct radeon_tmds_pll {
  118. uint32_t freq;
  119. uint32_t value;
  120. };
  121. #define RADEON_MAX_BIOS_CONNECTOR 16
  122. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  123. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  124. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  125. #define RADEON_PLL_LEGACY (1 << 3)
  126. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  127. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  128. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  129. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  130. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  131. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  132. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  133. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  134. struct radeon_pll {
  135. uint16_t reference_freq;
  136. uint16_t reference_div;
  137. uint32_t pll_in_min;
  138. uint32_t pll_in_max;
  139. uint32_t pll_out_min;
  140. uint32_t pll_out_max;
  141. uint16_t xclk;
  142. uint32_t min_ref_div;
  143. uint32_t max_ref_div;
  144. uint32_t min_post_div;
  145. uint32_t max_post_div;
  146. uint32_t min_feedback_div;
  147. uint32_t max_feedback_div;
  148. uint32_t min_frac_feedback_div;
  149. uint32_t max_frac_feedback_div;
  150. uint32_t best_vco;
  151. };
  152. struct radeon_i2c_chan {
  153. struct i2c_adapter adapter;
  154. struct drm_device *dev;
  155. union {
  156. struct i2c_algo_dp_aux_data dp;
  157. struct i2c_algo_bit_data bit;
  158. } algo;
  159. struct radeon_i2c_bus_rec rec;
  160. uint8_t i2c_id;
  161. };
  162. /* mostly for macs, but really any system without connector tables */
  163. enum radeon_connector_table {
  164. CT_NONE,
  165. CT_GENERIC,
  166. CT_IBOOK,
  167. CT_POWERBOOK_EXTERNAL,
  168. CT_POWERBOOK_INTERNAL,
  169. CT_POWERBOOK_VGA,
  170. CT_MINI_EXTERNAL,
  171. CT_MINI_INTERNAL,
  172. CT_IMAC_G5_ISIGHT,
  173. CT_EMAC,
  174. };
  175. enum radeon_dvo_chip {
  176. DVO_SIL164,
  177. DVO_SIL1178,
  178. };
  179. struct radeon_mode_info {
  180. struct atom_context *atom_context;
  181. struct card_info *atom_card_info;
  182. enum radeon_connector_table connector_table;
  183. bool mode_config_initialized;
  184. struct radeon_crtc *crtcs[2];
  185. /* DVI-I properties */
  186. struct drm_property *coherent_mode_property;
  187. /* DAC enable load detect */
  188. struct drm_property *load_detect_property;
  189. /* TV standard load detect */
  190. struct drm_property *tv_std_property;
  191. /* legacy TMDS PLL detect */
  192. struct drm_property *tmds_pll_property;
  193. };
  194. #define MAX_H_CODE_TIMING_LEN 32
  195. #define MAX_V_CODE_TIMING_LEN 32
  196. /* need to store these as reading
  197. back code tables is excessive */
  198. struct radeon_tv_regs {
  199. uint32_t tv_uv_adr;
  200. uint32_t timing_cntl;
  201. uint32_t hrestart;
  202. uint32_t vrestart;
  203. uint32_t frestart;
  204. uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
  205. uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
  206. };
  207. struct radeon_crtc {
  208. struct drm_crtc base;
  209. int crtc_id;
  210. u16 lut_r[256], lut_g[256], lut_b[256];
  211. bool enabled;
  212. bool can_tile;
  213. uint32_t crtc_offset;
  214. struct drm_gem_object *cursor_bo;
  215. uint64_t cursor_addr;
  216. int cursor_width;
  217. int cursor_height;
  218. uint32_t legacy_display_base_addr;
  219. uint32_t legacy_cursor_offset;
  220. enum radeon_rmx_type rmx_type;
  221. fixed20_12 vsc;
  222. fixed20_12 hsc;
  223. struct drm_display_mode native_mode;
  224. };
  225. struct radeon_encoder_primary_dac {
  226. /* legacy primary dac */
  227. uint32_t ps2_pdac_adj;
  228. };
  229. struct radeon_encoder_lvds {
  230. /* legacy lvds */
  231. uint16_t panel_vcc_delay;
  232. uint8_t panel_pwr_delay;
  233. uint8_t panel_digon_delay;
  234. uint8_t panel_blon_delay;
  235. uint16_t panel_ref_divider;
  236. uint8_t panel_post_divider;
  237. uint16_t panel_fb_divider;
  238. bool use_bios_dividers;
  239. uint32_t lvds_gen_cntl;
  240. /* panel mode */
  241. struct drm_display_mode native_mode;
  242. };
  243. struct radeon_encoder_tv_dac {
  244. /* legacy tv dac */
  245. uint32_t ps2_tvdac_adj;
  246. uint32_t ntsc_tvdac_adj;
  247. uint32_t pal_tvdac_adj;
  248. int h_pos;
  249. int v_pos;
  250. int h_size;
  251. int supported_tv_stds;
  252. bool tv_on;
  253. enum radeon_tv_std tv_std;
  254. struct radeon_tv_regs tv;
  255. };
  256. struct radeon_encoder_int_tmds {
  257. /* legacy int tmds */
  258. struct radeon_tmds_pll tmds_pll[4];
  259. };
  260. struct radeon_encoder_ext_tmds {
  261. /* tmds over dvo */
  262. struct radeon_i2c_chan *i2c_bus;
  263. uint8_t slave_addr;
  264. enum radeon_dvo_chip dvo_chip;
  265. };
  266. /* spread spectrum */
  267. struct radeon_atom_ss {
  268. uint16_t percentage;
  269. uint8_t type;
  270. uint8_t step;
  271. uint8_t delay;
  272. uint8_t range;
  273. uint8_t refdiv;
  274. };
  275. struct radeon_encoder_atom_dig {
  276. /* atom dig */
  277. bool coherent_mode;
  278. int dig_block;
  279. /* atom lvds */
  280. uint32_t lvds_misc;
  281. uint16_t panel_pwr_delay;
  282. struct radeon_atom_ss *ss;
  283. /* panel mode */
  284. struct drm_display_mode native_mode;
  285. };
  286. struct radeon_encoder_atom_dac {
  287. enum radeon_tv_std tv_std;
  288. };
  289. struct radeon_encoder {
  290. struct drm_encoder base;
  291. uint32_t encoder_id;
  292. uint32_t devices;
  293. uint32_t active_device;
  294. uint32_t flags;
  295. uint32_t pixel_clock;
  296. enum radeon_rmx_type rmx_type;
  297. struct drm_display_mode native_mode;
  298. void *enc_priv;
  299. };
  300. struct radeon_connector_atom_dig {
  301. uint32_t igp_lane_info;
  302. bool linkb;
  303. uint16_t uc_i2c_id;
  304. struct radeon_i2c_chan *dp_i2c_bus;
  305. u8 dpcd[8];
  306. };
  307. struct radeon_connector {
  308. struct drm_connector base;
  309. uint32_t connector_id;
  310. uint32_t devices;
  311. struct radeon_i2c_chan *ddc_bus;
  312. /* some systems have a an hdmi and vga port with a shared ddc line */
  313. bool shared_ddc;
  314. bool use_digital;
  315. /* we need to mind the EDID between detect
  316. and get modes due to analog/digital/tvencoder */
  317. struct edid *edid;
  318. void *con_priv;
  319. bool dac_load_detect;
  320. uint16_t connector_object_id;
  321. /* need to keep this for display port */
  322. //
  323. };
  324. struct radeon_framebuffer {
  325. struct drm_framebuffer base;
  326. struct drm_gem_object *obj;
  327. };
  328. extern int radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
  329. extern void radeon_dp_getdpcd(struct radeon_connector *connector);
  330. extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
  331. uint8_t write_byte, uint8_t *read_byte);
  332. extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
  333. const char *name, bool dp, u8 i2c_id);
  334. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  335. struct radeon_i2c_bus_rec *rec,
  336. const char *name);
  337. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  338. extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
  339. u8 slave_addr,
  340. u8 addr,
  341. u8 *val);
  342. extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c,
  343. u8 slave_addr,
  344. u8 addr,
  345. u8 val);
  346. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  347. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  348. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  349. extern void radeon_compute_pll(struct radeon_pll *pll,
  350. uint64_t freq,
  351. uint32_t *dot_clock_p,
  352. uint32_t *fb_div_p,
  353. uint32_t *frac_fb_div_p,
  354. uint32_t *ref_div_p,
  355. uint32_t *post_div_p,
  356. int flags);
  357. extern void radeon_setup_encoder_clones(struct drm_device *dev);
  358. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  359. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  360. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  361. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  362. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  363. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  364. extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
  365. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  366. extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
  367. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  368. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  369. struct drm_framebuffer *old_fb);
  370. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  371. struct drm_display_mode *mode,
  372. struct drm_display_mode *adjusted_mode,
  373. int x, int y,
  374. struct drm_framebuffer *old_fb);
  375. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  376. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  377. struct drm_framebuffer *old_fb);
  378. extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
  379. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  380. struct drm_file *file_priv,
  381. uint32_t handle,
  382. uint32_t width,
  383. uint32_t height);
  384. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  385. int x, int y);
  386. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  387. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  388. extern struct radeon_encoder_atom_dig *
  389. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  390. extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
  391. struct radeon_encoder_int_tmds *tmds);
  392. extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
  393. struct radeon_encoder_int_tmds *tmds);
  394. extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
  395. struct radeon_encoder_int_tmds *tmds);
  396. extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
  397. struct radeon_encoder_ext_tmds *tmds);
  398. extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
  399. struct radeon_encoder_ext_tmds *tmds);
  400. extern struct radeon_encoder_primary_dac *
  401. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  402. extern struct radeon_encoder_tv_dac *
  403. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  404. extern struct radeon_encoder_lvds *
  405. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  406. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  407. extern struct radeon_encoder_tv_dac *
  408. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  409. extern struct radeon_encoder_primary_dac *
  410. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  411. extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
  412. extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
  413. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  414. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  415. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  416. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  417. extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
  418. extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
  419. extern void
  420. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  421. extern void
  422. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  423. extern void
  424. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  425. extern void
  426. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  427. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  428. u16 blue, int regno);
  429. extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  430. u16 *blue, int regno);
  431. struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
  432. struct drm_mode_fb_cmd *mode_cmd,
  433. struct drm_gem_object *obj);
  434. int radeonfb_probe(struct drm_device *dev);
  435. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  436. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  437. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  438. void radeon_atombios_init_crtc(struct drm_device *dev,
  439. struct radeon_crtc *radeon_crtc);
  440. void radeon_legacy_init_crtc(struct drm_device *dev,
  441. struct radeon_crtc *radeon_crtc);
  442. extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
  443. void radeon_get_clock_info(struct drm_device *dev);
  444. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  445. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  446. void radeon_enc_destroy(struct drm_encoder *encoder);
  447. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  448. void radeon_combios_asic_init(struct drm_device *dev);
  449. extern int radeon_static_clocks_init(struct drm_device *dev);
  450. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  451. struct drm_display_mode *mode,
  452. struct drm_display_mode *adjusted_mode);
  453. void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
  454. /* legacy tv */
  455. void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
  456. uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
  457. uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
  458. void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
  459. uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
  460. uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
  461. void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
  462. uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
  463. uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
  464. void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
  465. struct drm_display_mode *mode,
  466. struct drm_display_mode *adjusted_mode);
  467. #endif