events.c 28 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <asm/desc.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/irq.h>
  34. #include <asm/idle.h>
  35. #include <asm/io_apic.h>
  36. #include <asm/sync_bitops.h>
  37. #include <asm/xen/hypercall.h>
  38. #include <asm/xen/hypervisor.h>
  39. #include <xen/xen.h>
  40. #include <xen/hvm.h>
  41. #include <xen/xen-ops.h>
  42. #include <xen/events.h>
  43. #include <xen/interface/xen.h>
  44. #include <xen/interface/event_channel.h>
  45. #include <xen/interface/hvm/hvm_op.h>
  46. #include <xen/interface/hvm/params.h>
  47. /*
  48. * This lock protects updates to the following mapping and reference-count
  49. * arrays. The lock does not need to be acquired to read the mapping tables.
  50. */
  51. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  52. /* IRQ <-> VIRQ mapping. */
  53. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  54. /* IRQ <-> IPI mapping */
  55. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  56. /* Interrupt types. */
  57. enum xen_irq_type {
  58. IRQT_UNBOUND = 0,
  59. IRQT_PIRQ,
  60. IRQT_VIRQ,
  61. IRQT_IPI,
  62. IRQT_EVTCHN
  63. };
  64. /*
  65. * Packed IRQ information:
  66. * type - enum xen_irq_type
  67. * event channel - irq->event channel mapping
  68. * cpu - cpu this event channel is bound to
  69. * index - type-specific information:
  70. * PIRQ - vector, with MSB being "needs EIO"
  71. * VIRQ - virq number
  72. * IPI - IPI vector
  73. * EVTCHN -
  74. */
  75. struct irq_info
  76. {
  77. enum xen_irq_type type; /* type */
  78. unsigned short evtchn; /* event channel */
  79. unsigned short cpu; /* cpu bound */
  80. union {
  81. unsigned short virq;
  82. enum ipi_vector ipi;
  83. struct {
  84. unsigned short gsi;
  85. unsigned char vector;
  86. unsigned char flags;
  87. } pirq;
  88. } u;
  89. };
  90. #define PIRQ_NEEDS_EOI (1 << 0)
  91. static struct irq_info *irq_info;
  92. static int *evtchn_to_irq;
  93. struct cpu_evtchn_s {
  94. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  95. };
  96. static struct cpu_evtchn_s *cpu_evtchn_mask_p;
  97. static inline unsigned long *cpu_evtchn_mask(int cpu)
  98. {
  99. return cpu_evtchn_mask_p[cpu].bits;
  100. }
  101. /* Xen will never allocate port zero for any purpose. */
  102. #define VALID_EVTCHN(chn) ((chn) != 0)
  103. static struct irq_chip xen_dynamic_chip;
  104. static struct irq_chip xen_percpu_chip;
  105. static struct irq_chip xen_pirq_chip;
  106. /* Constructor for packed IRQ information. */
  107. static struct irq_info mk_unbound_info(void)
  108. {
  109. return (struct irq_info) { .type = IRQT_UNBOUND };
  110. }
  111. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  112. {
  113. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  114. .cpu = 0 };
  115. }
  116. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  117. {
  118. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  119. .cpu = 0, .u.ipi = ipi };
  120. }
  121. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  122. {
  123. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  124. .cpu = 0, .u.virq = virq };
  125. }
  126. static struct irq_info mk_pirq_info(unsigned short evtchn,
  127. unsigned short gsi, unsigned short vector)
  128. {
  129. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  130. .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
  131. }
  132. /*
  133. * Accessors for packed IRQ information.
  134. */
  135. static struct irq_info *info_for_irq(unsigned irq)
  136. {
  137. return &irq_info[irq];
  138. }
  139. static unsigned int evtchn_from_irq(unsigned irq)
  140. {
  141. return info_for_irq(irq)->evtchn;
  142. }
  143. unsigned irq_from_evtchn(unsigned int evtchn)
  144. {
  145. return evtchn_to_irq[evtchn];
  146. }
  147. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  148. static enum ipi_vector ipi_from_irq(unsigned irq)
  149. {
  150. struct irq_info *info = info_for_irq(irq);
  151. BUG_ON(info == NULL);
  152. BUG_ON(info->type != IRQT_IPI);
  153. return info->u.ipi;
  154. }
  155. static unsigned virq_from_irq(unsigned irq)
  156. {
  157. struct irq_info *info = info_for_irq(irq);
  158. BUG_ON(info == NULL);
  159. BUG_ON(info->type != IRQT_VIRQ);
  160. return info->u.virq;
  161. }
  162. static unsigned gsi_from_irq(unsigned irq)
  163. {
  164. struct irq_info *info = info_for_irq(irq);
  165. BUG_ON(info == NULL);
  166. BUG_ON(info->type != IRQT_PIRQ);
  167. return info->u.pirq.gsi;
  168. }
  169. static unsigned vector_from_irq(unsigned irq)
  170. {
  171. struct irq_info *info = info_for_irq(irq);
  172. BUG_ON(info == NULL);
  173. BUG_ON(info->type != IRQT_PIRQ);
  174. return info->u.pirq.vector;
  175. }
  176. static enum xen_irq_type type_from_irq(unsigned irq)
  177. {
  178. return info_for_irq(irq)->type;
  179. }
  180. static unsigned cpu_from_irq(unsigned irq)
  181. {
  182. return info_for_irq(irq)->cpu;
  183. }
  184. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  185. {
  186. int irq = evtchn_to_irq[evtchn];
  187. unsigned ret = 0;
  188. if (irq != -1)
  189. ret = cpu_from_irq(irq);
  190. return ret;
  191. }
  192. static bool pirq_needs_eoi(unsigned irq)
  193. {
  194. struct irq_info *info = info_for_irq(irq);
  195. BUG_ON(info->type != IRQT_PIRQ);
  196. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  197. }
  198. static inline unsigned long active_evtchns(unsigned int cpu,
  199. struct shared_info *sh,
  200. unsigned int idx)
  201. {
  202. return (sh->evtchn_pending[idx] &
  203. cpu_evtchn_mask(cpu)[idx] &
  204. ~sh->evtchn_mask[idx]);
  205. }
  206. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  207. {
  208. int irq = evtchn_to_irq[chn];
  209. BUG_ON(irq == -1);
  210. #ifdef CONFIG_SMP
  211. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  212. #endif
  213. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  214. __set_bit(chn, cpu_evtchn_mask(cpu));
  215. irq_info[irq].cpu = cpu;
  216. }
  217. static void init_evtchn_cpu_bindings(void)
  218. {
  219. #ifdef CONFIG_SMP
  220. struct irq_desc *desc;
  221. int i;
  222. /* By default all event channels notify CPU#0. */
  223. for_each_irq_desc(i, desc) {
  224. cpumask_copy(desc->affinity, cpumask_of(0));
  225. }
  226. #endif
  227. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  228. }
  229. static inline void clear_evtchn(int port)
  230. {
  231. struct shared_info *s = HYPERVISOR_shared_info;
  232. sync_clear_bit(port, &s->evtchn_pending[0]);
  233. }
  234. static inline void set_evtchn(int port)
  235. {
  236. struct shared_info *s = HYPERVISOR_shared_info;
  237. sync_set_bit(port, &s->evtchn_pending[0]);
  238. }
  239. static inline int test_evtchn(int port)
  240. {
  241. struct shared_info *s = HYPERVISOR_shared_info;
  242. return sync_test_bit(port, &s->evtchn_pending[0]);
  243. }
  244. /**
  245. * notify_remote_via_irq - send event to remote end of event channel via irq
  246. * @irq: irq of event channel to send event to
  247. *
  248. * Unlike notify_remote_via_evtchn(), this is safe to use across
  249. * save/restore. Notifications on a broken connection are silently
  250. * dropped.
  251. */
  252. void notify_remote_via_irq(int irq)
  253. {
  254. int evtchn = evtchn_from_irq(irq);
  255. if (VALID_EVTCHN(evtchn))
  256. notify_remote_via_evtchn(evtchn);
  257. }
  258. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  259. static void mask_evtchn(int port)
  260. {
  261. struct shared_info *s = HYPERVISOR_shared_info;
  262. sync_set_bit(port, &s->evtchn_mask[0]);
  263. }
  264. static void unmask_evtchn(int port)
  265. {
  266. struct shared_info *s = HYPERVISOR_shared_info;
  267. unsigned int cpu = get_cpu();
  268. BUG_ON(!irqs_disabled());
  269. /* Slow path (hypercall) if this is a non-local port. */
  270. if (unlikely(cpu != cpu_from_evtchn(port))) {
  271. struct evtchn_unmask unmask = { .port = port };
  272. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  273. } else {
  274. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  275. sync_clear_bit(port, &s->evtchn_mask[0]);
  276. /*
  277. * The following is basically the equivalent of
  278. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  279. * the interrupt edge' if the channel is masked.
  280. */
  281. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  282. !sync_test_and_set_bit(port / BITS_PER_LONG,
  283. &vcpu_info->evtchn_pending_sel))
  284. vcpu_info->evtchn_upcall_pending = 1;
  285. }
  286. put_cpu();
  287. }
  288. static int get_nr_hw_irqs(void)
  289. {
  290. int ret = 1;
  291. #ifdef CONFIG_X86_IO_APIC
  292. ret = get_nr_irqs_gsi();
  293. #endif
  294. return ret;
  295. }
  296. static int find_unbound_irq(void)
  297. {
  298. struct irq_data *data;
  299. int irq, res;
  300. for (irq = 0; irq < nr_irqs; irq++) {
  301. data = irq_get_irq_data(irq);
  302. /* only 0->15 have init'd desc; handle irq > 16 */
  303. if (!data)
  304. break;
  305. if (data->chip == &no_irq_chip)
  306. break;
  307. if (data->chip != &xen_dynamic_chip)
  308. continue;
  309. if (irq_info[irq].type == IRQT_UNBOUND)
  310. return irq;
  311. }
  312. if (irq == nr_irqs)
  313. panic("No available IRQ to bind to: increase nr_irqs!\n");
  314. res = irq_alloc_desc_at(irq, 0);
  315. if (WARN_ON(res != irq))
  316. return -1;
  317. return irq;
  318. }
  319. static bool identity_mapped_irq(unsigned irq)
  320. {
  321. /* identity map all the hardware irqs */
  322. return irq < get_nr_hw_irqs();
  323. }
  324. static void pirq_unmask_notify(int irq)
  325. {
  326. struct physdev_eoi eoi = { .irq = irq };
  327. if (unlikely(pirq_needs_eoi(irq))) {
  328. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  329. WARN_ON(rc);
  330. }
  331. }
  332. static void pirq_query_unmask(int irq)
  333. {
  334. struct physdev_irq_status_query irq_status;
  335. struct irq_info *info = info_for_irq(irq);
  336. BUG_ON(info->type != IRQT_PIRQ);
  337. irq_status.irq = irq;
  338. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  339. irq_status.flags = 0;
  340. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  341. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  342. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  343. }
  344. static bool probing_irq(int irq)
  345. {
  346. struct irq_desc *desc = irq_to_desc(irq);
  347. return desc && desc->action == NULL;
  348. }
  349. static unsigned int startup_pirq(unsigned int irq)
  350. {
  351. struct evtchn_bind_pirq bind_pirq;
  352. struct irq_info *info = info_for_irq(irq);
  353. int evtchn = evtchn_from_irq(irq);
  354. BUG_ON(info->type != IRQT_PIRQ);
  355. if (VALID_EVTCHN(evtchn))
  356. goto out;
  357. bind_pirq.pirq = irq;
  358. /* NB. We are happy to share unless we are probing. */
  359. bind_pirq.flags = probing_irq(irq) ? 0 : BIND_PIRQ__WILL_SHARE;
  360. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq) != 0) {
  361. if (!probing_irq(irq))
  362. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  363. irq);
  364. return 0;
  365. }
  366. evtchn = bind_pirq.port;
  367. pirq_query_unmask(irq);
  368. evtchn_to_irq[evtchn] = irq;
  369. bind_evtchn_to_cpu(evtchn, 0);
  370. info->evtchn = evtchn;
  371. out:
  372. unmask_evtchn(evtchn);
  373. pirq_unmask_notify(irq);
  374. return 0;
  375. }
  376. static void shutdown_pirq(unsigned int irq)
  377. {
  378. struct evtchn_close close;
  379. struct irq_info *info = info_for_irq(irq);
  380. int evtchn = evtchn_from_irq(irq);
  381. BUG_ON(info->type != IRQT_PIRQ);
  382. if (!VALID_EVTCHN(evtchn))
  383. return;
  384. mask_evtchn(evtchn);
  385. close.port = evtchn;
  386. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  387. BUG();
  388. bind_evtchn_to_cpu(evtchn, 0);
  389. evtchn_to_irq[evtchn] = -1;
  390. info->evtchn = 0;
  391. }
  392. static void enable_pirq(unsigned int irq)
  393. {
  394. startup_pirq(irq);
  395. }
  396. static void disable_pirq(unsigned int irq)
  397. {
  398. }
  399. static void ack_pirq(unsigned int irq)
  400. {
  401. int evtchn = evtchn_from_irq(irq);
  402. move_native_irq(irq);
  403. if (VALID_EVTCHN(evtchn)) {
  404. mask_evtchn(evtchn);
  405. clear_evtchn(evtchn);
  406. }
  407. }
  408. static void end_pirq(unsigned int irq)
  409. {
  410. int evtchn = evtchn_from_irq(irq);
  411. struct irq_desc *desc = irq_to_desc(irq);
  412. if (WARN_ON(!desc))
  413. return;
  414. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  415. (IRQ_DISABLED|IRQ_PENDING)) {
  416. shutdown_pirq(irq);
  417. } else if (VALID_EVTCHN(evtchn)) {
  418. unmask_evtchn(evtchn);
  419. pirq_unmask_notify(irq);
  420. }
  421. }
  422. static int find_irq_by_gsi(unsigned gsi)
  423. {
  424. int irq;
  425. for (irq = 0; irq < nr_irqs; irq++) {
  426. struct irq_info *info = info_for_irq(irq);
  427. if (info == NULL || info->type != IRQT_PIRQ)
  428. continue;
  429. if (gsi_from_irq(irq) == gsi)
  430. return irq;
  431. }
  432. return -1;
  433. }
  434. /*
  435. * Allocate a physical irq, along with a vector. We don't assign an
  436. * event channel until the irq actually started up. Return an
  437. * existing irq if we've already got one for the gsi.
  438. */
  439. int xen_allocate_pirq(unsigned gsi, char *name)
  440. {
  441. int irq;
  442. struct physdev_irq irq_op;
  443. spin_lock(&irq_mapping_update_lock);
  444. irq = find_irq_by_gsi(gsi);
  445. if (irq != -1) {
  446. printk(KERN_INFO "xen_allocate_pirq: returning irq %d for gsi %u\n",
  447. irq, gsi);
  448. goto out; /* XXX need refcount? */
  449. }
  450. if (identity_mapped_irq(gsi)) {
  451. irq = gsi;
  452. irq_to_desc_alloc_node(irq, 0);
  453. dynamic_irq_init(irq);
  454. } else
  455. irq = find_unbound_irq();
  456. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  457. handle_level_irq, name);
  458. irq_op.irq = irq;
  459. if (HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  460. dynamic_irq_cleanup(irq);
  461. irq = -ENOSPC;
  462. goto out;
  463. }
  464. irq_info[irq] = mk_pirq_info(0, gsi, irq_op.vector);
  465. out:
  466. spin_unlock(&irq_mapping_update_lock);
  467. return irq;
  468. }
  469. int xen_vector_from_irq(unsigned irq)
  470. {
  471. return vector_from_irq(irq);
  472. }
  473. int xen_gsi_from_irq(unsigned irq)
  474. {
  475. return gsi_from_irq(irq);
  476. }
  477. int bind_evtchn_to_irq(unsigned int evtchn)
  478. {
  479. int irq;
  480. spin_lock(&irq_mapping_update_lock);
  481. irq = evtchn_to_irq[evtchn];
  482. if (irq == -1) {
  483. irq = find_unbound_irq();
  484. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  485. handle_edge_irq, "event");
  486. evtchn_to_irq[evtchn] = irq;
  487. irq_info[irq] = mk_evtchn_info(evtchn);
  488. }
  489. spin_unlock(&irq_mapping_update_lock);
  490. return irq;
  491. }
  492. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  493. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  494. {
  495. struct evtchn_bind_ipi bind_ipi;
  496. int evtchn, irq;
  497. spin_lock(&irq_mapping_update_lock);
  498. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  499. if (irq == -1) {
  500. irq = find_unbound_irq();
  501. if (irq < 0)
  502. goto out;
  503. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  504. handle_percpu_irq, "ipi");
  505. bind_ipi.vcpu = cpu;
  506. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  507. &bind_ipi) != 0)
  508. BUG();
  509. evtchn = bind_ipi.port;
  510. evtchn_to_irq[evtchn] = irq;
  511. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  512. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  513. bind_evtchn_to_cpu(evtchn, cpu);
  514. }
  515. out:
  516. spin_unlock(&irq_mapping_update_lock);
  517. return irq;
  518. }
  519. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  520. {
  521. struct evtchn_bind_virq bind_virq;
  522. int evtchn, irq;
  523. spin_lock(&irq_mapping_update_lock);
  524. irq = per_cpu(virq_to_irq, cpu)[virq];
  525. if (irq == -1) {
  526. bind_virq.virq = virq;
  527. bind_virq.vcpu = cpu;
  528. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  529. &bind_virq) != 0)
  530. BUG();
  531. evtchn = bind_virq.port;
  532. irq = find_unbound_irq();
  533. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  534. handle_percpu_irq, "virq");
  535. evtchn_to_irq[evtchn] = irq;
  536. irq_info[irq] = mk_virq_info(evtchn, virq);
  537. per_cpu(virq_to_irq, cpu)[virq] = irq;
  538. bind_evtchn_to_cpu(evtchn, cpu);
  539. }
  540. spin_unlock(&irq_mapping_update_lock);
  541. return irq;
  542. }
  543. static void unbind_from_irq(unsigned int irq)
  544. {
  545. struct evtchn_close close;
  546. int evtchn = evtchn_from_irq(irq);
  547. spin_lock(&irq_mapping_update_lock);
  548. if (VALID_EVTCHN(evtchn)) {
  549. close.port = evtchn;
  550. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  551. BUG();
  552. switch (type_from_irq(irq)) {
  553. case IRQT_VIRQ:
  554. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  555. [virq_from_irq(irq)] = -1;
  556. break;
  557. case IRQT_IPI:
  558. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  559. [ipi_from_irq(irq)] = -1;
  560. break;
  561. default:
  562. break;
  563. }
  564. /* Closed ports are implicitly re-bound to VCPU0. */
  565. bind_evtchn_to_cpu(evtchn, 0);
  566. evtchn_to_irq[evtchn] = -1;
  567. }
  568. if (irq_info[irq].type != IRQT_UNBOUND) {
  569. irq_info[irq] = mk_unbound_info();
  570. irq_free_desc(irq);
  571. }
  572. spin_unlock(&irq_mapping_update_lock);
  573. }
  574. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  575. irq_handler_t handler,
  576. unsigned long irqflags,
  577. const char *devname, void *dev_id)
  578. {
  579. unsigned int irq;
  580. int retval;
  581. irq = bind_evtchn_to_irq(evtchn);
  582. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  583. if (retval != 0) {
  584. unbind_from_irq(irq);
  585. return retval;
  586. }
  587. return irq;
  588. }
  589. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  590. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  591. irq_handler_t handler,
  592. unsigned long irqflags, const char *devname, void *dev_id)
  593. {
  594. unsigned int irq;
  595. int retval;
  596. irq = bind_virq_to_irq(virq, cpu);
  597. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  598. if (retval != 0) {
  599. unbind_from_irq(irq);
  600. return retval;
  601. }
  602. return irq;
  603. }
  604. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  605. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  606. unsigned int cpu,
  607. irq_handler_t handler,
  608. unsigned long irqflags,
  609. const char *devname,
  610. void *dev_id)
  611. {
  612. int irq, retval;
  613. irq = bind_ipi_to_irq(ipi, cpu);
  614. if (irq < 0)
  615. return irq;
  616. irqflags |= IRQF_NO_SUSPEND;
  617. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  618. if (retval != 0) {
  619. unbind_from_irq(irq);
  620. return retval;
  621. }
  622. return irq;
  623. }
  624. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  625. {
  626. free_irq(irq, dev_id);
  627. unbind_from_irq(irq);
  628. }
  629. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  630. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  631. {
  632. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  633. BUG_ON(irq < 0);
  634. notify_remote_via_irq(irq);
  635. }
  636. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  637. {
  638. struct shared_info *sh = HYPERVISOR_shared_info;
  639. int cpu = smp_processor_id();
  640. int i;
  641. unsigned long flags;
  642. static DEFINE_SPINLOCK(debug_lock);
  643. spin_lock_irqsave(&debug_lock, flags);
  644. printk("vcpu %d\n ", cpu);
  645. for_each_online_cpu(i) {
  646. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  647. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  648. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  649. v->evtchn_upcall_pending,
  650. v->evtchn_pending_sel);
  651. }
  652. printk("pending:\n ");
  653. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  654. printk("%08lx%s", sh->evtchn_pending[i],
  655. i % 8 == 0 ? "\n " : " ");
  656. printk("\nmasks:\n ");
  657. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  658. printk("%08lx%s", sh->evtchn_mask[i],
  659. i % 8 == 0 ? "\n " : " ");
  660. printk("\nunmasked:\n ");
  661. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  662. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  663. i % 8 == 0 ? "\n " : " ");
  664. printk("\npending list:\n");
  665. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  666. if (sync_test_bit(i, sh->evtchn_pending)) {
  667. printk(" %d: event %d -> irq %d\n",
  668. cpu_from_evtchn(i), i,
  669. evtchn_to_irq[i]);
  670. }
  671. }
  672. spin_unlock_irqrestore(&debug_lock, flags);
  673. return IRQ_HANDLED;
  674. }
  675. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  676. /*
  677. * Search the CPUs pending events bitmasks. For each one found, map
  678. * the event number to an irq, and feed it into do_IRQ() for
  679. * handling.
  680. *
  681. * Xen uses a two-level bitmap to speed searching. The first level is
  682. * a bitset of words which contain pending event bits. The second
  683. * level is a bitset of pending events themselves.
  684. */
  685. static void __xen_evtchn_do_upcall(void)
  686. {
  687. int cpu = get_cpu();
  688. struct shared_info *s = HYPERVISOR_shared_info;
  689. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  690. unsigned count;
  691. do {
  692. unsigned long pending_words;
  693. vcpu_info->evtchn_upcall_pending = 0;
  694. if (__get_cpu_var(xed_nesting_count)++)
  695. goto out;
  696. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  697. /* Clear master flag /before/ clearing selector flag. */
  698. wmb();
  699. #endif
  700. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  701. while (pending_words != 0) {
  702. unsigned long pending_bits;
  703. int word_idx = __ffs(pending_words);
  704. pending_words &= ~(1UL << word_idx);
  705. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  706. int bit_idx = __ffs(pending_bits);
  707. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  708. int irq = evtchn_to_irq[port];
  709. struct irq_desc *desc;
  710. if (irq != -1) {
  711. desc = irq_to_desc(irq);
  712. if (desc)
  713. generic_handle_irq_desc(irq, desc);
  714. }
  715. }
  716. }
  717. BUG_ON(!irqs_disabled());
  718. count = __get_cpu_var(xed_nesting_count);
  719. __get_cpu_var(xed_nesting_count) = 0;
  720. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  721. out:
  722. put_cpu();
  723. }
  724. void xen_evtchn_do_upcall(struct pt_regs *regs)
  725. {
  726. struct pt_regs *old_regs = set_irq_regs(regs);
  727. exit_idle();
  728. irq_enter();
  729. __xen_evtchn_do_upcall();
  730. irq_exit();
  731. set_irq_regs(old_regs);
  732. }
  733. void xen_hvm_evtchn_do_upcall(void)
  734. {
  735. __xen_evtchn_do_upcall();
  736. }
  737. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  738. /* Rebind a new event channel to an existing irq. */
  739. void rebind_evtchn_irq(int evtchn, int irq)
  740. {
  741. struct irq_info *info = info_for_irq(irq);
  742. /* Make sure the irq is masked, since the new event channel
  743. will also be masked. */
  744. disable_irq(irq);
  745. spin_lock(&irq_mapping_update_lock);
  746. /* After resume the irq<->evtchn mappings are all cleared out */
  747. BUG_ON(evtchn_to_irq[evtchn] != -1);
  748. /* Expect irq to have been bound before,
  749. so there should be a proper type */
  750. BUG_ON(info->type == IRQT_UNBOUND);
  751. evtchn_to_irq[evtchn] = irq;
  752. irq_info[irq] = mk_evtchn_info(evtchn);
  753. spin_unlock(&irq_mapping_update_lock);
  754. /* new event channels are always bound to cpu 0 */
  755. irq_set_affinity(irq, cpumask_of(0));
  756. /* Unmask the event channel. */
  757. enable_irq(irq);
  758. }
  759. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  760. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  761. {
  762. struct evtchn_bind_vcpu bind_vcpu;
  763. int evtchn = evtchn_from_irq(irq);
  764. /* events delivered via platform PCI interrupts are always
  765. * routed to vcpu 0 */
  766. if (!VALID_EVTCHN(evtchn) ||
  767. (xen_hvm_domain() && !xen_have_vector_callback))
  768. return -1;
  769. /* Send future instances of this interrupt to other vcpu. */
  770. bind_vcpu.port = evtchn;
  771. bind_vcpu.vcpu = tcpu;
  772. /*
  773. * If this fails, it usually just indicates that we're dealing with a
  774. * virq or IPI channel, which don't actually need to be rebound. Ignore
  775. * it, but don't do the xenlinux-level rebind in that case.
  776. */
  777. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  778. bind_evtchn_to_cpu(evtchn, tcpu);
  779. return 0;
  780. }
  781. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  782. {
  783. unsigned tcpu = cpumask_first(dest);
  784. return rebind_irq_to_cpu(irq, tcpu);
  785. }
  786. int resend_irq_on_evtchn(unsigned int irq)
  787. {
  788. int masked, evtchn = evtchn_from_irq(irq);
  789. struct shared_info *s = HYPERVISOR_shared_info;
  790. if (!VALID_EVTCHN(evtchn))
  791. return 1;
  792. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  793. sync_set_bit(evtchn, s->evtchn_pending);
  794. if (!masked)
  795. unmask_evtchn(evtchn);
  796. return 1;
  797. }
  798. static void enable_dynirq(unsigned int irq)
  799. {
  800. int evtchn = evtchn_from_irq(irq);
  801. if (VALID_EVTCHN(evtchn))
  802. unmask_evtchn(evtchn);
  803. }
  804. static void disable_dynirq(unsigned int irq)
  805. {
  806. int evtchn = evtchn_from_irq(irq);
  807. if (VALID_EVTCHN(evtchn))
  808. mask_evtchn(evtchn);
  809. }
  810. static void ack_dynirq(unsigned int irq)
  811. {
  812. int evtchn = evtchn_from_irq(irq);
  813. move_native_irq(irq);
  814. if (VALID_EVTCHN(evtchn))
  815. clear_evtchn(evtchn);
  816. }
  817. static int retrigger_dynirq(unsigned int irq)
  818. {
  819. int evtchn = evtchn_from_irq(irq);
  820. struct shared_info *sh = HYPERVISOR_shared_info;
  821. int ret = 0;
  822. if (VALID_EVTCHN(evtchn)) {
  823. int masked;
  824. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  825. sync_set_bit(evtchn, sh->evtchn_pending);
  826. if (!masked)
  827. unmask_evtchn(evtchn);
  828. ret = 1;
  829. }
  830. return ret;
  831. }
  832. static void restore_cpu_virqs(unsigned int cpu)
  833. {
  834. struct evtchn_bind_virq bind_virq;
  835. int virq, irq, evtchn;
  836. for (virq = 0; virq < NR_VIRQS; virq++) {
  837. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  838. continue;
  839. BUG_ON(virq_from_irq(irq) != virq);
  840. /* Get a new binding from Xen. */
  841. bind_virq.virq = virq;
  842. bind_virq.vcpu = cpu;
  843. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  844. &bind_virq) != 0)
  845. BUG();
  846. evtchn = bind_virq.port;
  847. /* Record the new mapping. */
  848. evtchn_to_irq[evtchn] = irq;
  849. irq_info[irq] = mk_virq_info(evtchn, virq);
  850. bind_evtchn_to_cpu(evtchn, cpu);
  851. /* Ready for use. */
  852. unmask_evtchn(evtchn);
  853. }
  854. }
  855. static void restore_cpu_ipis(unsigned int cpu)
  856. {
  857. struct evtchn_bind_ipi bind_ipi;
  858. int ipi, irq, evtchn;
  859. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  860. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  861. continue;
  862. BUG_ON(ipi_from_irq(irq) != ipi);
  863. /* Get a new binding from Xen. */
  864. bind_ipi.vcpu = cpu;
  865. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  866. &bind_ipi) != 0)
  867. BUG();
  868. evtchn = bind_ipi.port;
  869. /* Record the new mapping. */
  870. evtchn_to_irq[evtchn] = irq;
  871. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  872. bind_evtchn_to_cpu(evtchn, cpu);
  873. /* Ready for use. */
  874. unmask_evtchn(evtchn);
  875. }
  876. }
  877. /* Clear an irq's pending state, in preparation for polling on it */
  878. void xen_clear_irq_pending(int irq)
  879. {
  880. int evtchn = evtchn_from_irq(irq);
  881. if (VALID_EVTCHN(evtchn))
  882. clear_evtchn(evtchn);
  883. }
  884. void xen_set_irq_pending(int irq)
  885. {
  886. int evtchn = evtchn_from_irq(irq);
  887. if (VALID_EVTCHN(evtchn))
  888. set_evtchn(evtchn);
  889. }
  890. bool xen_test_irq_pending(int irq)
  891. {
  892. int evtchn = evtchn_from_irq(irq);
  893. bool ret = false;
  894. if (VALID_EVTCHN(evtchn))
  895. ret = test_evtchn(evtchn);
  896. return ret;
  897. }
  898. /* Poll waiting for an irq to become pending. In the usual case, the
  899. irq will be disabled so it won't deliver an interrupt. */
  900. void xen_poll_irq(int irq)
  901. {
  902. evtchn_port_t evtchn = evtchn_from_irq(irq);
  903. if (VALID_EVTCHN(evtchn)) {
  904. struct sched_poll poll;
  905. poll.nr_ports = 1;
  906. poll.timeout = 0;
  907. set_xen_guest_handle(poll.ports, &evtchn);
  908. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  909. BUG();
  910. }
  911. }
  912. void xen_irq_resume(void)
  913. {
  914. unsigned int cpu, irq, evtchn;
  915. init_evtchn_cpu_bindings();
  916. /* New event-channel space is not 'live' yet. */
  917. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  918. mask_evtchn(evtchn);
  919. /* No IRQ <-> event-channel mappings. */
  920. for (irq = 0; irq < nr_irqs; irq++)
  921. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  922. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  923. evtchn_to_irq[evtchn] = -1;
  924. for_each_possible_cpu(cpu) {
  925. restore_cpu_virqs(cpu);
  926. restore_cpu_ipis(cpu);
  927. }
  928. }
  929. static struct irq_chip xen_dynamic_chip __read_mostly = {
  930. .name = "xen-dyn",
  931. .disable = disable_dynirq,
  932. .mask = disable_dynirq,
  933. .unmask = enable_dynirq,
  934. .ack = ack_dynirq,
  935. .set_affinity = set_affinity_irq,
  936. .retrigger = retrigger_dynirq,
  937. };
  938. static struct irq_chip xen_pirq_chip __read_mostly = {
  939. .name = "xen-pirq",
  940. .startup = startup_pirq,
  941. .shutdown = shutdown_pirq,
  942. .enable = enable_pirq,
  943. .unmask = enable_pirq,
  944. .disable = disable_pirq,
  945. .mask = disable_pirq,
  946. .ack = ack_pirq,
  947. .end = end_pirq,
  948. .set_affinity = set_affinity_irq,
  949. .retrigger = retrigger_dynirq,
  950. };
  951. static struct irq_chip xen_percpu_chip __read_mostly = {
  952. .name = "xen-percpu",
  953. .disable = disable_dynirq,
  954. .mask = disable_dynirq,
  955. .unmask = enable_dynirq,
  956. .ack = ack_dynirq,
  957. };
  958. int xen_set_callback_via(uint64_t via)
  959. {
  960. struct xen_hvm_param a;
  961. a.domid = DOMID_SELF;
  962. a.index = HVM_PARAM_CALLBACK_IRQ;
  963. a.value = via;
  964. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  965. }
  966. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  967. #ifdef CONFIG_XEN_PVHVM
  968. /* Vector callbacks are better than PCI interrupts to receive event
  969. * channel notifications because we can receive vector callbacks on any
  970. * vcpu and we don't need PCI support or APIC interactions. */
  971. void xen_callback_vector(void)
  972. {
  973. int rc;
  974. uint64_t callback_via;
  975. if (xen_have_vector_callback) {
  976. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  977. rc = xen_set_callback_via(callback_via);
  978. if (rc) {
  979. printk(KERN_ERR "Request for Xen HVM callback vector"
  980. " failed.\n");
  981. xen_have_vector_callback = 0;
  982. return;
  983. }
  984. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  985. "enabled\n");
  986. /* in the restore case the vector has already been allocated */
  987. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  988. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  989. }
  990. }
  991. #else
  992. void xen_callback_vector(void) {}
  993. #endif
  994. void __init xen_init_IRQ(void)
  995. {
  996. int i;
  997. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  998. GFP_KERNEL);
  999. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1000. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1001. GFP_KERNEL);
  1002. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1003. evtchn_to_irq[i] = -1;
  1004. init_evtchn_cpu_bindings();
  1005. /* No event channels are 'live' right now. */
  1006. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1007. mask_evtchn(i);
  1008. if (xen_hvm_domain()) {
  1009. xen_callback_vector();
  1010. native_init_IRQ();
  1011. } else {
  1012. irq_ctx_init(smp_processor_id());
  1013. }
  1014. }