dm9000.c 28 KB

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  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. *
  52. * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
  53. * * fixed spinlock call without pointer
  54. * * ensure spinlock is initialised
  55. */
  56. #include <linux/module.h>
  57. #include <linux/ioport.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/init.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/spinlock.h>
  63. #include <linux/crc32.h>
  64. #include <linux/mii.h>
  65. #include <linux/dm9000.h>
  66. #include <linux/delay.h>
  67. #include <linux/platform_device.h>
  68. #include <linux/irq.h>
  69. #include <asm/delay.h>
  70. #include <asm/irq.h>
  71. #include <asm/io.h>
  72. #include "dm9000.h"
  73. /* Board/System/Debug information/definition ---------------- */
  74. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  75. #define CARDNAME "dm9000"
  76. #define PFX CARDNAME ": "
  77. #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
  78. #ifdef CONFIG_BLACKFIN
  79. #define readsb insb
  80. #define readsw insw
  81. #define readsl insl
  82. #define writesb outsb
  83. #define writesw outsw
  84. #define writesl outsl
  85. #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
  86. #else
  87. #define DEFAULT_TRIGGER (0)
  88. #endif
  89. /*
  90. * Transmit timeout, default 5 seconds.
  91. */
  92. static int watchdog = 5000;
  93. module_param(watchdog, int, 0400);
  94. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  95. /* Structure/enum declaration ------------------------------- */
  96. typedef struct board_info {
  97. void __iomem *io_addr; /* Register I/O base address */
  98. void __iomem *io_data; /* Data I/O address */
  99. u16 irq; /* IRQ */
  100. u16 tx_pkt_cnt;
  101. u16 queue_pkt_len;
  102. u16 queue_start_addr;
  103. u16 dbug_cnt;
  104. u8 io_mode; /* 0:word, 2:byte */
  105. u8 phy_addr;
  106. unsigned int flags;
  107. int debug_level;
  108. void (*inblk)(void __iomem *port, void *data, int length);
  109. void (*outblk)(void __iomem *port, void *data, int length);
  110. void (*dumpblk)(void __iomem *port, int length);
  111. struct device *dev; /* parent device */
  112. struct resource *addr_res; /* resources found */
  113. struct resource *data_res;
  114. struct resource *addr_req; /* resources requested */
  115. struct resource *data_req;
  116. struct resource *irq_res;
  117. struct timer_list timer;
  118. unsigned char srom[128];
  119. spinlock_t lock;
  120. struct mii_if_info mii;
  121. u32 msg_enable;
  122. } board_info_t;
  123. /* debug code */
  124. #define dm9000_dbg(db, lev, msg...) do { \
  125. if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
  126. (lev) < db->debug_level) { \
  127. dev_dbg(db->dev, msg); \
  128. } \
  129. } while (0)
  130. /* function declaration ------------------------------------- */
  131. static int dm9000_probe(struct platform_device *);
  132. static int dm9000_open(struct net_device *);
  133. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  134. static int dm9000_stop(struct net_device *);
  135. static void dm9000_timer(unsigned long);
  136. static void dm9000_init_dm9000(struct net_device *);
  137. static irqreturn_t dm9000_interrupt(int, void *);
  138. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  139. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  140. int value);
  141. static u16 read_srom_word(board_info_t *, int);
  142. static void dm9000_rx(struct net_device *);
  143. static void dm9000_hash_table(struct net_device *);
  144. //#define DM9000_PROGRAM_EEPROM
  145. #ifdef DM9000_PROGRAM_EEPROM
  146. static void program_eeprom(board_info_t * db);
  147. #endif
  148. /* DM9000 network board routine ---------------------------- */
  149. static void
  150. dm9000_reset(board_info_t * db)
  151. {
  152. dev_dbg(db->dev, "resetting device\n");
  153. /* RESET device */
  154. writeb(DM9000_NCR, db->io_addr);
  155. udelay(200);
  156. writeb(NCR_RST, db->io_data);
  157. udelay(200);
  158. }
  159. /*
  160. * Read a byte from I/O port
  161. */
  162. static u8
  163. ior(board_info_t * db, int reg)
  164. {
  165. writeb(reg, db->io_addr);
  166. return readb(db->io_data);
  167. }
  168. /*
  169. * Write a byte to I/O port
  170. */
  171. static void
  172. iow(board_info_t * db, int reg, int value)
  173. {
  174. writeb(reg, db->io_addr);
  175. writeb(value, db->io_data);
  176. }
  177. /* routines for sending block to chip */
  178. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  179. {
  180. writesb(reg, data, count);
  181. }
  182. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  183. {
  184. writesw(reg, data, (count+1) >> 1);
  185. }
  186. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  187. {
  188. writesl(reg, data, (count+3) >> 2);
  189. }
  190. /* input block from chip to memory */
  191. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  192. {
  193. readsb(reg, data, count);
  194. }
  195. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  196. {
  197. readsw(reg, data, (count+1) >> 1);
  198. }
  199. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  200. {
  201. readsl(reg, data, (count+3) >> 2);
  202. }
  203. /* dump block from chip to null */
  204. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  205. {
  206. int i;
  207. int tmp;
  208. for (i = 0; i < count; i++)
  209. tmp = readb(reg);
  210. }
  211. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  212. {
  213. int i;
  214. int tmp;
  215. count = (count + 1) >> 1;
  216. for (i = 0; i < count; i++)
  217. tmp = readw(reg);
  218. }
  219. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  220. {
  221. int i;
  222. int tmp;
  223. count = (count + 3) >> 2;
  224. for (i = 0; i < count; i++)
  225. tmp = readl(reg);
  226. }
  227. /* dm9000_set_io
  228. *
  229. * select the specified set of io routines to use with the
  230. * device
  231. */
  232. static void dm9000_set_io(struct board_info *db, int byte_width)
  233. {
  234. /* use the size of the data resource to work out what IO
  235. * routines we want to use
  236. */
  237. switch (byte_width) {
  238. case 1:
  239. db->dumpblk = dm9000_dumpblk_8bit;
  240. db->outblk = dm9000_outblk_8bit;
  241. db->inblk = dm9000_inblk_8bit;
  242. break;
  243. case 3:
  244. dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
  245. case 2:
  246. db->dumpblk = dm9000_dumpblk_16bit;
  247. db->outblk = dm9000_outblk_16bit;
  248. db->inblk = dm9000_inblk_16bit;
  249. break;
  250. case 4:
  251. default:
  252. db->dumpblk = dm9000_dumpblk_32bit;
  253. db->outblk = dm9000_outblk_32bit;
  254. db->inblk = dm9000_inblk_32bit;
  255. break;
  256. }
  257. }
  258. /* Our watchdog timed out. Called by the networking layer */
  259. static void dm9000_timeout(struct net_device *dev)
  260. {
  261. board_info_t *db = (board_info_t *) dev->priv;
  262. u8 reg_save;
  263. unsigned long flags;
  264. /* Save previous register address */
  265. reg_save = readb(db->io_addr);
  266. spin_lock_irqsave(&db->lock,flags);
  267. netif_stop_queue(dev);
  268. dm9000_reset(db);
  269. dm9000_init_dm9000(dev);
  270. /* We can accept TX packets again */
  271. dev->trans_start = jiffies;
  272. netif_wake_queue(dev);
  273. /* Restore previous register address */
  274. writeb(reg_save, db->io_addr);
  275. spin_unlock_irqrestore(&db->lock,flags);
  276. }
  277. #ifdef CONFIG_NET_POLL_CONTROLLER
  278. /*
  279. *Used by netconsole
  280. */
  281. static void dm9000_poll_controller(struct net_device *dev)
  282. {
  283. disable_irq(dev->irq);
  284. dm9000_interrupt(dev->irq,dev);
  285. enable_irq(dev->irq);
  286. }
  287. #endif
  288. /* dm9000_release_board
  289. *
  290. * release a board, and any mapped resources
  291. */
  292. static void
  293. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  294. {
  295. if (db->data_res == NULL) {
  296. if (db->addr_res != NULL)
  297. release_mem_region((unsigned long)db->io_addr, 4);
  298. return;
  299. }
  300. /* unmap our resources */
  301. iounmap(db->io_addr);
  302. iounmap(db->io_data);
  303. /* release the resources */
  304. if (db->data_req != NULL) {
  305. release_resource(db->data_req);
  306. kfree(db->data_req);
  307. }
  308. if (db->addr_req != NULL) {
  309. release_resource(db->addr_req);
  310. kfree(db->addr_req);
  311. }
  312. }
  313. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  314. /*
  315. * Search DM9000 board, allocate space and register it
  316. */
  317. static int
  318. dm9000_probe(struct platform_device *pdev)
  319. {
  320. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  321. struct board_info *db; /* Point a board information structure */
  322. struct net_device *ndev;
  323. unsigned long base;
  324. int ret = 0;
  325. int iosize;
  326. int i;
  327. u32 id_val;
  328. /* Init network device */
  329. ndev = alloc_etherdev(sizeof (struct board_info));
  330. if (!ndev) {
  331. dev_err(&pdev->dev, "could not allocate device.\n");
  332. return -ENOMEM;
  333. }
  334. SET_NETDEV_DEV(ndev, &pdev->dev);
  335. dev_dbg(&pdev->dev, "dm9000_probe()");
  336. /* setup board info structure */
  337. db = (struct board_info *) ndev->priv;
  338. memset(db, 0, sizeof (*db));
  339. db->dev = &pdev->dev;
  340. spin_lock_init(&db->lock);
  341. if (pdev->num_resources < 2) {
  342. ret = -ENODEV;
  343. goto out;
  344. } else if (pdev->num_resources == 2) {
  345. base = pdev->resource[0].start;
  346. if (!request_mem_region(base, 4, ndev->name)) {
  347. ret = -EBUSY;
  348. goto out;
  349. }
  350. ndev->base_addr = base;
  351. ndev->irq = pdev->resource[1].start;
  352. db->io_addr = (void __iomem *)base;
  353. db->io_data = (void __iomem *)(base + 4);
  354. /* ensure at least we have a default set of IO routines */
  355. dm9000_set_io(db, 2);
  356. } else {
  357. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  358. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  359. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  360. if (db->addr_res == NULL || db->data_res == NULL ||
  361. db->irq_res == NULL) {
  362. dev_err(db->dev, "insufficient resources\n");
  363. ret = -ENOENT;
  364. goto out;
  365. }
  366. i = res_size(db->addr_res);
  367. db->addr_req = request_mem_region(db->addr_res->start, i,
  368. pdev->name);
  369. if (db->addr_req == NULL) {
  370. dev_err(db->dev, "cannot claim address reg area\n");
  371. ret = -EIO;
  372. goto out;
  373. }
  374. db->io_addr = ioremap(db->addr_res->start, i);
  375. if (db->io_addr == NULL) {
  376. dev_err(db->dev, "failed to ioremap address reg\n");
  377. ret = -EINVAL;
  378. goto out;
  379. }
  380. iosize = res_size(db->data_res);
  381. db->data_req = request_mem_region(db->data_res->start, iosize,
  382. pdev->name);
  383. if (db->data_req == NULL) {
  384. dev_err(db->dev, "cannot claim data reg area\n");
  385. ret = -EIO;
  386. goto out;
  387. }
  388. db->io_data = ioremap(db->data_res->start, iosize);
  389. if (db->io_data == NULL) {
  390. dev_err(db->dev,"failed to ioremap data reg\n");
  391. ret = -EINVAL;
  392. goto out;
  393. }
  394. /* fill in parameters for net-dev structure */
  395. ndev->base_addr = (unsigned long)db->io_addr;
  396. ndev->irq = db->irq_res->start;
  397. /* ensure at least we have a default set of IO routines */
  398. dm9000_set_io(db, iosize);
  399. }
  400. /* check to see if anything is being over-ridden */
  401. if (pdata != NULL) {
  402. /* check to see if the driver wants to over-ride the
  403. * default IO width */
  404. if (pdata->flags & DM9000_PLATF_8BITONLY)
  405. dm9000_set_io(db, 1);
  406. if (pdata->flags & DM9000_PLATF_16BITONLY)
  407. dm9000_set_io(db, 2);
  408. if (pdata->flags & DM9000_PLATF_32BITONLY)
  409. dm9000_set_io(db, 4);
  410. /* check to see if there are any IO routine
  411. * over-rides */
  412. if (pdata->inblk != NULL)
  413. db->inblk = pdata->inblk;
  414. if (pdata->outblk != NULL)
  415. db->outblk = pdata->outblk;
  416. if (pdata->dumpblk != NULL)
  417. db->dumpblk = pdata->dumpblk;
  418. db->flags = pdata->flags;
  419. }
  420. dm9000_reset(db);
  421. /* try two times, DM9000 sometimes gets the first read wrong */
  422. for (i = 0; i < 2; i++) {
  423. id_val = ior(db, DM9000_VIDL);
  424. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  425. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  426. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  427. if (id_val == DM9000_ID)
  428. break;
  429. dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
  430. }
  431. if (id_val != DM9000_ID) {
  432. dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
  433. ret = -ENODEV;
  434. goto out;
  435. }
  436. /* from this point we assume that we have found a DM9000 */
  437. /* driver system function */
  438. ether_setup(ndev);
  439. ndev->open = &dm9000_open;
  440. ndev->hard_start_xmit = &dm9000_start_xmit;
  441. ndev->tx_timeout = &dm9000_timeout;
  442. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  443. ndev->stop = &dm9000_stop;
  444. ndev->set_multicast_list = &dm9000_hash_table;
  445. #ifdef CONFIG_NET_POLL_CONTROLLER
  446. ndev->poll_controller = &dm9000_poll_controller;
  447. #endif
  448. #ifdef DM9000_PROGRAM_EEPROM
  449. program_eeprom(db);
  450. #endif
  451. db->msg_enable = NETIF_MSG_LINK;
  452. db->mii.phy_id_mask = 0x1f;
  453. db->mii.reg_num_mask = 0x1f;
  454. db->mii.force_media = 0;
  455. db->mii.full_duplex = 0;
  456. db->mii.dev = ndev;
  457. db->mii.mdio_read = dm9000_phy_read;
  458. db->mii.mdio_write = dm9000_phy_write;
  459. /* Read SROM content */
  460. for (i = 0; i < 64; i++)
  461. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  462. /* Set Node Address */
  463. for (i = 0; i < 6; i++)
  464. ndev->dev_addr[i] = db->srom[i];
  465. if (!is_valid_ether_addr(ndev->dev_addr)) {
  466. /* try reading from mac */
  467. for (i = 0; i < 6; i++)
  468. ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
  469. }
  470. if (!is_valid_ether_addr(ndev->dev_addr))
  471. dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
  472. "set using ifconfig\n", ndev->name);
  473. platform_set_drvdata(pdev, ndev);
  474. ret = register_netdev(ndev);
  475. if (ret == 0) {
  476. DECLARE_MAC_BUF(mac);
  477. printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
  478. ndev->name, db->io_addr, db->io_data, ndev->irq,
  479. print_mac(mac, ndev->dev_addr));
  480. }
  481. return 0;
  482. out:
  483. dev_err(db->dev, "not found (%d).\n", ret);
  484. dm9000_release_board(pdev, db);
  485. free_netdev(ndev);
  486. return ret;
  487. }
  488. /*
  489. * Open the interface.
  490. * The interface is opened whenever "ifconfig" actives it.
  491. */
  492. static int
  493. dm9000_open(struct net_device *dev)
  494. {
  495. board_info_t *db = (board_info_t *) dev->priv;
  496. unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
  497. dev_dbg(db->dev, "entering %s\n", __func__);
  498. /* If there is no IRQ type specified, default to something that
  499. * may work, and tell the user that this is a problem */
  500. if (irqflags == IRQF_TRIGGER_NONE) {
  501. dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
  502. irqflags = DEFAULT_TRIGGER;
  503. }
  504. irqflags |= IRQF_SHARED;
  505. if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
  506. return -EAGAIN;
  507. /* Initialize DM9000 board */
  508. dm9000_reset(db);
  509. dm9000_init_dm9000(dev);
  510. /* Init driver variable */
  511. db->dbug_cnt = 0;
  512. /* set and active a timer process */
  513. init_timer(&db->timer);
  514. db->timer.expires = DM9000_TIMER_WUT;
  515. db->timer.data = (unsigned long) dev;
  516. db->timer.function = &dm9000_timer;
  517. add_timer(&db->timer);
  518. mii_check_media(&db->mii, netif_msg_link(db), 1);
  519. netif_start_queue(dev);
  520. return 0;
  521. }
  522. /*
  523. * Initilize dm9000 board
  524. */
  525. static void
  526. dm9000_init_dm9000(struct net_device *dev)
  527. {
  528. board_info_t *db = (board_info_t *) dev->priv;
  529. dm9000_dbg(db, 1, "entering %s\n", __func__);
  530. /* I/O mode */
  531. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  532. /* GPIO0 on pre-activate PHY */
  533. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  534. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  535. iow(db, DM9000_GPR, 0); /* Enable PHY */
  536. if (db->flags & DM9000_PLATF_EXT_PHY)
  537. iow(db, DM9000_NCR, NCR_EXT_PHY);
  538. /* Program operating register */
  539. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  540. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  541. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  542. iow(db, DM9000_SMCR, 0); /* Special Mode */
  543. /* clear TX status */
  544. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  545. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  546. /* Set address filter table */
  547. dm9000_hash_table(dev);
  548. /* Activate DM9000 */
  549. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  550. /* Enable TX/RX interrupt mask */
  551. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  552. /* Init Driver variable */
  553. db->tx_pkt_cnt = 0;
  554. db->queue_pkt_len = 0;
  555. dev->trans_start = 0;
  556. }
  557. /*
  558. * Hardware start transmission.
  559. * Send a packet to media from the upper layer.
  560. */
  561. static int
  562. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  563. {
  564. unsigned long flags;
  565. board_info_t *db = (board_info_t *) dev->priv;
  566. dm9000_dbg(db, 3, "%s:\n", __func__);
  567. if (db->tx_pkt_cnt > 1)
  568. return 1;
  569. spin_lock_irqsave(&db->lock, flags);
  570. /* Move data to DM9000 TX RAM */
  571. writeb(DM9000_MWCMD, db->io_addr);
  572. (db->outblk)(db->io_data, skb->data, skb->len);
  573. dev->stats.tx_bytes += skb->len;
  574. db->tx_pkt_cnt++;
  575. /* TX control: First packet immediately send, second packet queue */
  576. if (db->tx_pkt_cnt == 1) {
  577. /* Set TX length to DM9000 */
  578. iow(db, DM9000_TXPLL, skb->len & 0xff);
  579. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  580. /* Issue TX polling command */
  581. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  582. dev->trans_start = jiffies; /* save the time stamp */
  583. } else {
  584. /* Second packet */
  585. db->queue_pkt_len = skb->len;
  586. netif_stop_queue(dev);
  587. }
  588. spin_unlock_irqrestore(&db->lock, flags);
  589. /* free this SKB */
  590. dev_kfree_skb(skb);
  591. return 0;
  592. }
  593. static void
  594. dm9000_shutdown(struct net_device *dev)
  595. {
  596. board_info_t *db = (board_info_t *) dev->priv;
  597. /* RESET device */
  598. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  599. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  600. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  601. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  602. }
  603. /*
  604. * Stop the interface.
  605. * The interface is stopped when it is brought.
  606. */
  607. static int
  608. dm9000_stop(struct net_device *ndev)
  609. {
  610. board_info_t *db = (board_info_t *) ndev->priv;
  611. dm9000_dbg(db, 1, "entering %s\n", __func__);
  612. /* deleted timer */
  613. del_timer(&db->timer);
  614. netif_stop_queue(ndev);
  615. netif_carrier_off(ndev);
  616. /* free interrupt */
  617. free_irq(ndev->irq, ndev);
  618. dm9000_shutdown(ndev);
  619. return 0;
  620. }
  621. /*
  622. * DM9000 interrupt handler
  623. * receive the packet to upper layer, free the transmitted packet
  624. */
  625. static void
  626. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  627. {
  628. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  629. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  630. /* One packet sent complete */
  631. db->tx_pkt_cnt--;
  632. dev->stats.tx_packets++;
  633. /* Queue packet check & send */
  634. if (db->tx_pkt_cnt > 0) {
  635. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  636. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  637. iow(db, DM9000_TCR, TCR_TXREQ);
  638. dev->trans_start = jiffies;
  639. }
  640. netif_wake_queue(dev);
  641. }
  642. }
  643. static irqreturn_t
  644. dm9000_interrupt(int irq, void *dev_id)
  645. {
  646. struct net_device *dev = dev_id;
  647. board_info_t *db = (board_info_t *) dev->priv;
  648. int int_status;
  649. u8 reg_save;
  650. dm9000_dbg(db, 3, "entering %s\n", __func__);
  651. /* A real interrupt coming */
  652. spin_lock(&db->lock);
  653. /* Save previous register address */
  654. reg_save = readb(db->io_addr);
  655. /* Disable all interrupts */
  656. iow(db, DM9000_IMR, IMR_PAR);
  657. /* Got DM9000 interrupt status */
  658. int_status = ior(db, DM9000_ISR); /* Got ISR */
  659. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  660. /* Received the coming packet */
  661. if (int_status & ISR_PRS)
  662. dm9000_rx(dev);
  663. /* Trnasmit Interrupt check */
  664. if (int_status & ISR_PTS)
  665. dm9000_tx_done(dev, db);
  666. /* Re-enable interrupt mask */
  667. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  668. /* Restore previous register address */
  669. writeb(reg_save, db->io_addr);
  670. spin_unlock(&db->lock);
  671. return IRQ_HANDLED;
  672. }
  673. /*
  674. * A periodic timer routine
  675. * Dynamic media sense, allocated Rx buffer...
  676. */
  677. static void
  678. dm9000_timer(unsigned long data)
  679. {
  680. struct net_device *dev = (struct net_device *) data;
  681. board_info_t *db = (board_info_t *) dev->priv;
  682. dm9000_dbg(db, 3, "entering %s\n", __func__);
  683. mii_check_media(&db->mii, netif_msg_link(db), 0);
  684. /* Set timer again */
  685. db->timer.expires = DM9000_TIMER_WUT;
  686. add_timer(&db->timer);
  687. }
  688. struct dm9000_rxhdr {
  689. u8 RxPktReady;
  690. u8 RxStatus;
  691. u16 RxLen;
  692. } __attribute__((__packed__));
  693. /*
  694. * Received a packet and pass to upper layer
  695. */
  696. static void
  697. dm9000_rx(struct net_device *dev)
  698. {
  699. board_info_t *db = (board_info_t *) dev->priv;
  700. struct dm9000_rxhdr rxhdr;
  701. struct sk_buff *skb;
  702. u8 rxbyte, *rdptr;
  703. bool GoodPacket;
  704. int RxLen;
  705. /* Check packet ready or not */
  706. do {
  707. ior(db, DM9000_MRCMDX); /* Dummy read */
  708. /* Get most updated data */
  709. rxbyte = readb(db->io_data);
  710. /* Status check: this byte must be 0 or 1 */
  711. if (rxbyte > DM9000_PKT_RDY) {
  712. dev_warn(db->dev, "status check fail: %d\n", rxbyte);
  713. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  714. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  715. return;
  716. }
  717. if (rxbyte != DM9000_PKT_RDY)
  718. return;
  719. /* A packet ready now & Get status/length */
  720. GoodPacket = true;
  721. writeb(DM9000_MRCMD, db->io_addr);
  722. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  723. RxLen = le16_to_cpu(rxhdr.RxLen);
  724. /* Packet Status check */
  725. if (RxLen < 0x40) {
  726. GoodPacket = false;
  727. dev_dbg(db->dev, "Bad Packet received (runt)\n");
  728. }
  729. if (RxLen > DM9000_PKT_MAX) {
  730. dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
  731. }
  732. if (rxhdr.RxStatus & 0xbf) {
  733. GoodPacket = false;
  734. if (rxhdr.RxStatus & 0x01) {
  735. dev_dbg(db->dev, "fifo error\n");
  736. dev->stats.rx_fifo_errors++;
  737. }
  738. if (rxhdr.RxStatus & 0x02) {
  739. dev_dbg(db->dev, "crc error\n");
  740. dev->stats.rx_crc_errors++;
  741. }
  742. if (rxhdr.RxStatus & 0x80) {
  743. dev_dbg(db->dev, "length error\n");
  744. dev->stats.rx_length_errors++;
  745. }
  746. }
  747. /* Move data from DM9000 */
  748. if (GoodPacket
  749. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  750. skb_reserve(skb, 2);
  751. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  752. /* Read received packet from RX SRAM */
  753. (db->inblk)(db->io_data, rdptr, RxLen);
  754. dev->stats.rx_bytes += RxLen;
  755. /* Pass to upper layer */
  756. skb->protocol = eth_type_trans(skb, dev);
  757. netif_rx(skb);
  758. dev->stats.rx_packets++;
  759. } else {
  760. /* need to dump the packet's data */
  761. (db->dumpblk)(db->io_data, RxLen);
  762. }
  763. } while (rxbyte == DM9000_PKT_RDY);
  764. }
  765. /*
  766. * Read a word data from SROM
  767. */
  768. static u16
  769. read_srom_word(board_info_t * db, int offset)
  770. {
  771. iow(db, DM9000_EPAR, offset);
  772. iow(db, DM9000_EPCR, EPCR_ERPRR);
  773. mdelay(8); /* according to the datasheet 200us should be enough,
  774. but it doesn't work */
  775. iow(db, DM9000_EPCR, 0x0);
  776. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  777. }
  778. #ifdef DM9000_PROGRAM_EEPROM
  779. /*
  780. * Write a word data to SROM
  781. */
  782. static void
  783. write_srom_word(board_info_t * db, int offset, u16 val)
  784. {
  785. iow(db, DM9000_EPAR, offset);
  786. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  787. iow(db, DM9000_EPDRL, (val & 0xff));
  788. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  789. mdelay(8); /* same shit */
  790. iow(db, DM9000_EPCR, 0);
  791. }
  792. /*
  793. * Only for development:
  794. * Here we write static data to the eeprom in case
  795. * we don't have valid content on a new board
  796. */
  797. static void
  798. program_eeprom(board_info_t * db)
  799. {
  800. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  801. 0x0000, /* Autoload: accept nothing */
  802. 0x0a46, 0x9000, /* Vendor / Product ID */
  803. 0x0000, /* pin control */
  804. 0x0000,
  805. }; /* Wake-up mode control */
  806. int i;
  807. for (i = 0; i < 8; i++)
  808. write_srom_word(db, i, eeprom[i]);
  809. }
  810. #endif
  811. /*
  812. * Calculate the CRC valude of the Rx packet
  813. * flag = 1 : return the reverse CRC (for the received packet CRC)
  814. * 0 : return the normal CRC (for Hash Table index)
  815. */
  816. static unsigned long
  817. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  818. {
  819. u32 crc = ether_crc_le(Len, Data);
  820. if (flag)
  821. return ~crc;
  822. return crc;
  823. }
  824. /*
  825. * Set DM9000 multicast address
  826. */
  827. static void
  828. dm9000_hash_table(struct net_device *dev)
  829. {
  830. board_info_t *db = (board_info_t *) dev->priv;
  831. struct dev_mc_list *mcptr = dev->mc_list;
  832. int mc_cnt = dev->mc_count;
  833. u32 hash_val;
  834. u16 i, oft, hash_table[4];
  835. unsigned long flags;
  836. dm9000_dbg(db, 1, "entering %s\n", __func__);
  837. spin_lock_irqsave(&db->lock,flags);
  838. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  839. iow(db, oft, dev->dev_addr[i]);
  840. /* Clear Hash Table */
  841. for (i = 0; i < 4; i++)
  842. hash_table[i] = 0x0;
  843. /* broadcast address */
  844. hash_table[3] = 0x8000;
  845. /* the multicast address in Hash Table : 64 bits */
  846. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  847. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  848. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  849. }
  850. /* Write the hash table to MAC MD table */
  851. for (i = 0, oft = 0x16; i < 4; i++) {
  852. iow(db, oft++, hash_table[i] & 0xff);
  853. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  854. }
  855. spin_unlock_irqrestore(&db->lock,flags);
  856. }
  857. /*
  858. * Read a word from phyxcer
  859. */
  860. static int
  861. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  862. {
  863. board_info_t *db = (board_info_t *) dev->priv;
  864. unsigned long flags;
  865. unsigned int reg_save;
  866. int ret;
  867. spin_lock_irqsave(&db->lock,flags);
  868. /* Save previous register address */
  869. reg_save = readb(db->io_addr);
  870. /* Fill the phyxcer register into REG_0C */
  871. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  872. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  873. udelay(100); /* Wait read complete */
  874. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  875. /* The read data keeps on REG_0D & REG_0E */
  876. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  877. /* restore the previous address */
  878. writeb(reg_save, db->io_addr);
  879. spin_unlock_irqrestore(&db->lock,flags);
  880. return ret;
  881. }
  882. /*
  883. * Write a word to phyxcer
  884. */
  885. static void
  886. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  887. {
  888. board_info_t *db = (board_info_t *) dev->priv;
  889. unsigned long flags;
  890. unsigned long reg_save;
  891. spin_lock_irqsave(&db->lock,flags);
  892. /* Save previous register address */
  893. reg_save = readb(db->io_addr);
  894. /* Fill the phyxcer register into REG_0C */
  895. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  896. /* Fill the written data into REG_0D & REG_0E */
  897. iow(db, DM9000_EPDRL, (value & 0xff));
  898. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  899. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  900. udelay(500); /* Wait write complete */
  901. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  902. /* restore the previous address */
  903. writeb(reg_save, db->io_addr);
  904. spin_unlock_irqrestore(&db->lock,flags);
  905. }
  906. static int
  907. dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
  908. {
  909. struct net_device *ndev = platform_get_drvdata(dev);
  910. if (ndev) {
  911. if (netif_running(ndev)) {
  912. netif_device_detach(ndev);
  913. dm9000_shutdown(ndev);
  914. }
  915. }
  916. return 0;
  917. }
  918. static int
  919. dm9000_drv_resume(struct platform_device *dev)
  920. {
  921. struct net_device *ndev = platform_get_drvdata(dev);
  922. board_info_t *db = (board_info_t *) ndev->priv;
  923. if (ndev) {
  924. if (netif_running(ndev)) {
  925. dm9000_reset(db);
  926. dm9000_init_dm9000(ndev);
  927. netif_device_attach(ndev);
  928. }
  929. }
  930. return 0;
  931. }
  932. static int
  933. dm9000_drv_remove(struct platform_device *pdev)
  934. {
  935. struct net_device *ndev = platform_get_drvdata(pdev);
  936. platform_set_drvdata(pdev, NULL);
  937. unregister_netdev(ndev);
  938. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  939. free_netdev(ndev); /* free device structure */
  940. dev_dbg(&pdev->dev, "released and freed device\n");
  941. return 0;
  942. }
  943. static struct platform_driver dm9000_driver = {
  944. .driver = {
  945. .name = "dm9000",
  946. .owner = THIS_MODULE,
  947. },
  948. .probe = dm9000_probe,
  949. .remove = dm9000_drv_remove,
  950. .suspend = dm9000_drv_suspend,
  951. .resume = dm9000_drv_resume,
  952. };
  953. static int __init
  954. dm9000_init(void)
  955. {
  956. printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
  957. return platform_driver_register(&dm9000_driver); /* search board and register */
  958. }
  959. static void __exit
  960. dm9000_cleanup(void)
  961. {
  962. platform_driver_unregister(&dm9000_driver);
  963. }
  964. module_init(dm9000_init);
  965. module_exit(dm9000_cleanup);
  966. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  967. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  968. MODULE_LICENSE("GPL");