devices.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/gpio.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/io.h>
  16. #include <linux/clk.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <mach/hardware.h>
  21. #include <mach/irqs.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/pmu.h>
  25. #include <plat/tc.h>
  26. #include <plat/board.h>
  27. #include <plat/mcbsp.h>
  28. #include <plat/mmc.h>
  29. #include <plat/dma.h>
  30. #include <plat/omap_hwmod.h>
  31. #include <plat/omap_device.h>
  32. #include <plat/omap4-keypad.h>
  33. #include "mux.h"
  34. #include "control.h"
  35. #include "devices.h"
  36. #define L3_MODULES_MAX_LEN 12
  37. #define L3_MODULES 3
  38. static int __init omap3_l3_init(void)
  39. {
  40. int l;
  41. struct omap_hwmod *oh;
  42. struct platform_device *pdev;
  43. char oh_name[L3_MODULES_MAX_LEN];
  44. /*
  45. * To avoid code running on other OMAPs in
  46. * multi-omap builds
  47. */
  48. if (!(cpu_is_omap34xx()))
  49. return -ENODEV;
  50. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  51. oh = omap_hwmod_lookup(oh_name);
  52. if (!oh)
  53. pr_err("could not look up %s\n", oh_name);
  54. pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  55. NULL, 0, 0);
  56. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  57. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  58. }
  59. postcore_initcall(omap3_l3_init);
  60. static int __init omap4_l3_init(void)
  61. {
  62. int l, i;
  63. struct omap_hwmod *oh[3];
  64. struct platform_device *pdev;
  65. char oh_name[L3_MODULES_MAX_LEN];
  66. /* If dtb is there, the devices will be created dynamically */
  67. if (of_have_populated_dt())
  68. return -ENODEV;
  69. /*
  70. * To avoid code running on other OMAPs in
  71. * multi-omap builds
  72. */
  73. if (!(cpu_is_omap44xx()))
  74. return -ENODEV;
  75. for (i = 0; i < L3_MODULES; i++) {
  76. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  77. oh[i] = omap_hwmod_lookup(oh_name);
  78. if (!(oh[i]))
  79. pr_err("could not look up %s\n", oh_name);
  80. }
  81. pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  82. 0, NULL, 0, 0);
  83. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  84. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  85. }
  86. postcore_initcall(omap4_l3_init);
  87. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  88. static struct resource omap2cam_resources[] = {
  89. {
  90. .start = OMAP24XX_CAMERA_BASE,
  91. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  92. .flags = IORESOURCE_MEM,
  93. },
  94. {
  95. .start = INT_24XX_CAM_IRQ,
  96. .flags = IORESOURCE_IRQ,
  97. }
  98. };
  99. static struct platform_device omap2cam_device = {
  100. .name = "omap24xxcam",
  101. .id = -1,
  102. .num_resources = ARRAY_SIZE(omap2cam_resources),
  103. .resource = omap2cam_resources,
  104. };
  105. #endif
  106. #if defined(CONFIG_IOMMU_API)
  107. #include <plat/iommu.h>
  108. static struct resource omap3isp_resources[] = {
  109. {
  110. .start = OMAP3430_ISP_BASE,
  111. .end = OMAP3430_ISP_END,
  112. .flags = IORESOURCE_MEM,
  113. },
  114. {
  115. .start = OMAP3430_ISP_CCP2_BASE,
  116. .end = OMAP3430_ISP_CCP2_END,
  117. .flags = IORESOURCE_MEM,
  118. },
  119. {
  120. .start = OMAP3430_ISP_CCDC_BASE,
  121. .end = OMAP3430_ISP_CCDC_END,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. {
  125. .start = OMAP3430_ISP_HIST_BASE,
  126. .end = OMAP3430_ISP_HIST_END,
  127. .flags = IORESOURCE_MEM,
  128. },
  129. {
  130. .start = OMAP3430_ISP_H3A_BASE,
  131. .end = OMAP3430_ISP_H3A_END,
  132. .flags = IORESOURCE_MEM,
  133. },
  134. {
  135. .start = OMAP3430_ISP_PREV_BASE,
  136. .end = OMAP3430_ISP_PREV_END,
  137. .flags = IORESOURCE_MEM,
  138. },
  139. {
  140. .start = OMAP3430_ISP_RESZ_BASE,
  141. .end = OMAP3430_ISP_RESZ_END,
  142. .flags = IORESOURCE_MEM,
  143. },
  144. {
  145. .start = OMAP3430_ISP_SBL_BASE,
  146. .end = OMAP3430_ISP_SBL_END,
  147. .flags = IORESOURCE_MEM,
  148. },
  149. {
  150. .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
  151. .end = OMAP3430_ISP_CSI2A_REGS1_END,
  152. .flags = IORESOURCE_MEM,
  153. },
  154. {
  155. .start = OMAP3430_ISP_CSIPHY2_BASE,
  156. .end = OMAP3430_ISP_CSIPHY2_END,
  157. .flags = IORESOURCE_MEM,
  158. },
  159. {
  160. .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
  161. .end = OMAP3630_ISP_CSI2A_REGS2_END,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. {
  165. .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
  166. .end = OMAP3630_ISP_CSI2C_REGS1_END,
  167. .flags = IORESOURCE_MEM,
  168. },
  169. {
  170. .start = OMAP3630_ISP_CSIPHY1_BASE,
  171. .end = OMAP3630_ISP_CSIPHY1_END,
  172. .flags = IORESOURCE_MEM,
  173. },
  174. {
  175. .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
  176. .end = OMAP3630_ISP_CSI2C_REGS2_END,
  177. .flags = IORESOURCE_MEM,
  178. },
  179. {
  180. .start = INT_34XX_CAM_IRQ,
  181. .flags = IORESOURCE_IRQ,
  182. }
  183. };
  184. static struct platform_device omap3isp_device = {
  185. .name = "omap3isp",
  186. .id = -1,
  187. .num_resources = ARRAY_SIZE(omap3isp_resources),
  188. .resource = omap3isp_resources,
  189. };
  190. static struct omap_iommu_arch_data omap3_isp_iommu = {
  191. .name = "isp",
  192. };
  193. int omap3_init_camera(struct isp_platform_data *pdata)
  194. {
  195. omap3isp_device.dev.platform_data = pdata;
  196. omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
  197. return platform_device_register(&omap3isp_device);
  198. }
  199. #else /* !CONFIG_IOMMU_API */
  200. int omap3_init_camera(struct isp_platform_data *pdata)
  201. {
  202. return 0;
  203. }
  204. #endif
  205. static inline void omap_init_camera(void)
  206. {
  207. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  208. if (cpu_is_omap24xx())
  209. platform_device_register(&omap2cam_device);
  210. #endif
  211. }
  212. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  213. *sdp4430_keypad_data, struct omap_board_data *bdata)
  214. {
  215. struct platform_device *pdev;
  216. struct omap_hwmod *oh;
  217. struct omap4_keypad_platform_data *keypad_data;
  218. unsigned int id = -1;
  219. char *oh_name = "kbd";
  220. char *name = "omap4-keypad";
  221. oh = omap_hwmod_lookup(oh_name);
  222. if (!oh) {
  223. pr_err("Could not look up %s\n", oh_name);
  224. return -ENODEV;
  225. }
  226. keypad_data = sdp4430_keypad_data;
  227. pdev = omap_device_build(name, id, oh, keypad_data,
  228. sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
  229. if (IS_ERR(pdev)) {
  230. WARN(1, "Can't build omap_device for %s:%s.\n",
  231. name, oh->name);
  232. return PTR_ERR(pdev);
  233. }
  234. oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
  235. return 0;
  236. }
  237. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  238. static inline void omap_init_mbox(void)
  239. {
  240. struct omap_hwmod *oh;
  241. struct platform_device *pdev;
  242. oh = omap_hwmod_lookup("mailbox");
  243. if (!oh) {
  244. pr_err("%s: unable to find hwmod\n", __func__);
  245. return;
  246. }
  247. pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
  248. WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
  249. __func__, PTR_ERR(pdev));
  250. }
  251. #else
  252. static inline void omap_init_mbox(void) { }
  253. #endif /* CONFIG_OMAP_MBOX_FWK */
  254. static inline void omap_init_sti(void) {}
  255. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  256. static struct platform_device omap_pcm = {
  257. .name = "omap-pcm-audio",
  258. .id = -1,
  259. };
  260. /*
  261. * OMAP2420 has 2 McBSP ports
  262. * OMAP2430 has 5 McBSP ports
  263. * OMAP3 has 5 McBSP ports
  264. * OMAP4 has 4 McBSP ports
  265. */
  266. OMAP_MCBSP_PLATFORM_DEVICE(1);
  267. OMAP_MCBSP_PLATFORM_DEVICE(2);
  268. OMAP_MCBSP_PLATFORM_DEVICE(3);
  269. OMAP_MCBSP_PLATFORM_DEVICE(4);
  270. OMAP_MCBSP_PLATFORM_DEVICE(5);
  271. static void omap_init_audio(void)
  272. {
  273. platform_device_register(&omap_mcbsp1);
  274. platform_device_register(&omap_mcbsp2);
  275. if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
  276. platform_device_register(&omap_mcbsp3);
  277. platform_device_register(&omap_mcbsp4);
  278. }
  279. if (cpu_is_omap243x() || cpu_is_omap34xx())
  280. platform_device_register(&omap_mcbsp5);
  281. platform_device_register(&omap_pcm);
  282. }
  283. #else
  284. static inline void omap_init_audio(void) {}
  285. #endif
  286. #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
  287. defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
  288. static void omap_init_mcpdm(void)
  289. {
  290. struct omap_hwmod *oh;
  291. struct platform_device *pdev;
  292. oh = omap_hwmod_lookup("mcpdm");
  293. if (!oh) {
  294. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  295. return;
  296. }
  297. pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
  298. WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
  299. }
  300. #else
  301. static inline void omap_init_mcpdm(void) {}
  302. #endif
  303. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  304. #include <plat/mcspi.h>
  305. static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  306. {
  307. struct platform_device *pdev;
  308. char *name = "omap2_mcspi";
  309. struct omap2_mcspi_platform_config *pdata;
  310. static int spi_num;
  311. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  312. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  313. if (!pdata) {
  314. pr_err("Memory allocation for McSPI device failed\n");
  315. return -ENOMEM;
  316. }
  317. pdata->num_cs = mcspi_attrib->num_chipselect;
  318. switch (oh->class->rev) {
  319. case OMAP2_MCSPI_REV:
  320. case OMAP3_MCSPI_REV:
  321. pdata->regs_offset = 0;
  322. break;
  323. case OMAP4_MCSPI_REV:
  324. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  325. break;
  326. default:
  327. pr_err("Invalid McSPI Revision value\n");
  328. return -EINVAL;
  329. }
  330. spi_num++;
  331. pdev = omap_device_build(name, spi_num, oh, pdata,
  332. sizeof(*pdata), NULL, 0, 0);
  333. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
  334. name, oh->name);
  335. kfree(pdata);
  336. return 0;
  337. }
  338. static void omap_init_mcspi(void)
  339. {
  340. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  341. }
  342. #else
  343. static inline void omap_init_mcspi(void) {}
  344. #endif
  345. static struct resource omap2_pmu_resource = {
  346. .start = 3,
  347. .end = 3,
  348. .flags = IORESOURCE_IRQ,
  349. };
  350. static struct resource omap3_pmu_resource = {
  351. .start = INT_34XX_BENCH_MPU_EMUL,
  352. .end = INT_34XX_BENCH_MPU_EMUL,
  353. .flags = IORESOURCE_IRQ,
  354. };
  355. static struct platform_device omap_pmu_device = {
  356. .name = "arm-pmu",
  357. .id = ARM_PMU_DEVICE_CPU,
  358. .num_resources = 1,
  359. };
  360. static void omap_init_pmu(void)
  361. {
  362. if (cpu_is_omap24xx())
  363. omap_pmu_device.resource = &omap2_pmu_resource;
  364. else if (cpu_is_omap34xx())
  365. omap_pmu_device.resource = &omap3_pmu_resource;
  366. else
  367. return;
  368. platform_device_register(&omap_pmu_device);
  369. }
  370. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  371. #ifdef CONFIG_ARCH_OMAP2
  372. static struct resource omap2_sham_resources[] = {
  373. {
  374. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  375. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  376. .flags = IORESOURCE_MEM,
  377. },
  378. {
  379. .start = INT_24XX_SHA1MD5,
  380. .flags = IORESOURCE_IRQ,
  381. }
  382. };
  383. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  384. #else
  385. #define omap2_sham_resources NULL
  386. #define omap2_sham_resources_sz 0
  387. #endif
  388. #ifdef CONFIG_ARCH_OMAP3
  389. static struct resource omap3_sham_resources[] = {
  390. {
  391. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  392. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  393. .flags = IORESOURCE_MEM,
  394. },
  395. {
  396. .start = INT_34XX_SHA1MD52_IRQ,
  397. .flags = IORESOURCE_IRQ,
  398. },
  399. {
  400. .start = OMAP34XX_DMA_SHA1MD5_RX,
  401. .flags = IORESOURCE_DMA,
  402. }
  403. };
  404. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  405. #else
  406. #define omap3_sham_resources NULL
  407. #define omap3_sham_resources_sz 0
  408. #endif
  409. static struct platform_device sham_device = {
  410. .name = "omap-sham",
  411. .id = -1,
  412. };
  413. static void omap_init_sham(void)
  414. {
  415. if (cpu_is_omap24xx()) {
  416. sham_device.resource = omap2_sham_resources;
  417. sham_device.num_resources = omap2_sham_resources_sz;
  418. } else if (cpu_is_omap34xx()) {
  419. sham_device.resource = omap3_sham_resources;
  420. sham_device.num_resources = omap3_sham_resources_sz;
  421. } else {
  422. pr_err("%s: platform not supported\n", __func__);
  423. return;
  424. }
  425. platform_device_register(&sham_device);
  426. }
  427. #else
  428. static inline void omap_init_sham(void) { }
  429. #endif
  430. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  431. #ifdef CONFIG_ARCH_OMAP2
  432. static struct resource omap2_aes_resources[] = {
  433. {
  434. .start = OMAP24XX_SEC_AES_BASE,
  435. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  436. .flags = IORESOURCE_MEM,
  437. },
  438. {
  439. .start = OMAP24XX_DMA_AES_TX,
  440. .flags = IORESOURCE_DMA,
  441. },
  442. {
  443. .start = OMAP24XX_DMA_AES_RX,
  444. .flags = IORESOURCE_DMA,
  445. }
  446. };
  447. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  448. #else
  449. #define omap2_aes_resources NULL
  450. #define omap2_aes_resources_sz 0
  451. #endif
  452. #ifdef CONFIG_ARCH_OMAP3
  453. static struct resource omap3_aes_resources[] = {
  454. {
  455. .start = OMAP34XX_SEC_AES_BASE,
  456. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  457. .flags = IORESOURCE_MEM,
  458. },
  459. {
  460. .start = OMAP34XX_DMA_AES2_TX,
  461. .flags = IORESOURCE_DMA,
  462. },
  463. {
  464. .start = OMAP34XX_DMA_AES2_RX,
  465. .flags = IORESOURCE_DMA,
  466. }
  467. };
  468. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  469. #else
  470. #define omap3_aes_resources NULL
  471. #define omap3_aes_resources_sz 0
  472. #endif
  473. static struct platform_device aes_device = {
  474. .name = "omap-aes",
  475. .id = -1,
  476. };
  477. static void omap_init_aes(void)
  478. {
  479. if (cpu_is_omap24xx()) {
  480. aes_device.resource = omap2_aes_resources;
  481. aes_device.num_resources = omap2_aes_resources_sz;
  482. } else if (cpu_is_omap34xx()) {
  483. aes_device.resource = omap3_aes_resources;
  484. aes_device.num_resources = omap3_aes_resources_sz;
  485. } else {
  486. pr_err("%s: platform not supported\n", __func__);
  487. return;
  488. }
  489. platform_device_register(&aes_device);
  490. }
  491. #else
  492. static inline void omap_init_aes(void) { }
  493. #endif
  494. /*-------------------------------------------------------------------------*/
  495. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  496. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  497. *mmc_controller)
  498. {
  499. if ((mmc_controller->slots[0].switch_pin > 0) && \
  500. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  501. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  502. OMAP_PIN_INPUT_PULLUP);
  503. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  504. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  505. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  506. OMAP_PIN_INPUT_PULLUP);
  507. omap_mux_init_signal("sdmmc_cmd", 0);
  508. omap_mux_init_signal("sdmmc_clki", 0);
  509. omap_mux_init_signal("sdmmc_clko", 0);
  510. omap_mux_init_signal("sdmmc_dat0", 0);
  511. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  512. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  513. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  514. omap_mux_init_signal("sdmmc_dat1", 0);
  515. omap_mux_init_signal("sdmmc_dat2", 0);
  516. omap_mux_init_signal("sdmmc_dat3", 0);
  517. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  518. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  519. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  520. }
  521. /*
  522. * Use internal loop-back in MMC/SDIO Module Input Clock
  523. * selection
  524. */
  525. if (mmc_controller->slots[0].internal_clock) {
  526. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  527. v |= (1 << 24);
  528. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  529. }
  530. }
  531. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  532. {
  533. char *name = "mmci-omap";
  534. if (!mmc_data[0]) {
  535. pr_err("%s fails: Incomplete platform data\n", __func__);
  536. return;
  537. }
  538. omap242x_mmc_mux(mmc_data[0]);
  539. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  540. INT_24XX_MMC_IRQ, mmc_data[0]);
  541. }
  542. #endif
  543. /*-------------------------------------------------------------------------*/
  544. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  545. #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
  546. #define OMAP_HDQ_BASE 0x480B2000
  547. #endif
  548. static struct resource omap_hdq_resources[] = {
  549. {
  550. .start = OMAP_HDQ_BASE,
  551. .end = OMAP_HDQ_BASE + 0x1C,
  552. .flags = IORESOURCE_MEM,
  553. },
  554. {
  555. .start = INT_24XX_HDQ_IRQ,
  556. .flags = IORESOURCE_IRQ,
  557. },
  558. };
  559. static struct platform_device omap_hdq_dev = {
  560. .name = "omap_hdq",
  561. .id = 0,
  562. .dev = {
  563. .platform_data = NULL,
  564. },
  565. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  566. .resource = omap_hdq_resources,
  567. };
  568. static inline void omap_hdq_init(void)
  569. {
  570. (void) platform_device_register(&omap_hdq_dev);
  571. }
  572. #else
  573. static inline void omap_hdq_init(void) {}
  574. #endif
  575. /*---------------------------------------------------------------------------*/
  576. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  577. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  578. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  579. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  580. };
  581. #else
  582. static struct resource omap_vout_resource[2] = {
  583. };
  584. #endif
  585. static struct platform_device omap_vout_device = {
  586. .name = "omap_vout",
  587. .num_resources = ARRAY_SIZE(omap_vout_resource),
  588. .resource = &omap_vout_resource[0],
  589. .id = -1,
  590. };
  591. static void omap_init_vout(void)
  592. {
  593. if (platform_device_register(&omap_vout_device) < 0)
  594. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  595. }
  596. #else
  597. static inline void omap_init_vout(void) {}
  598. #endif
  599. /*-------------------------------------------------------------------------*/
  600. static int __init omap2_init_devices(void)
  601. {
  602. /*
  603. * please keep these calls, and their implementations above,
  604. * in alphabetical order so they're easier to sort through.
  605. */
  606. omap_init_audio();
  607. omap_init_mcpdm();
  608. omap_init_camera();
  609. omap_init_mbox();
  610. omap_init_mcspi();
  611. omap_init_pmu();
  612. omap_hdq_init();
  613. omap_init_sti();
  614. omap_init_sham();
  615. omap_init_aes();
  616. omap_init_vout();
  617. return 0;
  618. }
  619. arch_initcall(omap2_init_devices);
  620. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  621. static int __init omap_init_wdt(void)
  622. {
  623. int id = -1;
  624. struct platform_device *pdev;
  625. struct omap_hwmod *oh;
  626. char *oh_name = "wd_timer2";
  627. char *dev_name = "omap_wdt";
  628. if (!cpu_class_is_omap2())
  629. return 0;
  630. oh = omap_hwmod_lookup(oh_name);
  631. if (!oh) {
  632. pr_err("Could not look up wd_timer%d hwmod\n", id);
  633. return -EINVAL;
  634. }
  635. pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
  636. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
  637. dev_name, oh->name);
  638. return 0;
  639. }
  640. subsys_initcall(omap_init_wdt);
  641. #endif