processor_idle.c 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170
  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <asm/io.h>
  41. #include <asm/uaccess.h>
  42. #include <acpi/acpi_bus.h>
  43. #include <acpi/processor.h>
  44. #define ACPI_PROCESSOR_COMPONENT 0x01000000
  45. #define ACPI_PROCESSOR_CLASS "processor"
  46. #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
  47. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  48. ACPI_MODULE_NAME("acpi_processor")
  49. #define ACPI_PROCESSOR_FILE_POWER "power"
  50. #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
  51. #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  52. #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  53. static void (*pm_idle_save) (void) __read_mostly;
  54. module_param(max_cstate, uint, 0644);
  55. static unsigned int nocst __read_mostly;
  56. module_param(nocst, uint, 0000);
  57. /*
  58. * bm_history -- bit-mask with a bit per jiffy of bus-master activity
  59. * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
  60. * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
  61. * 100 HZ: 0x0000000F: 4 jiffies = 40ms
  62. * reduce history for more aggressive entry into C3
  63. */
  64. static unsigned int bm_history __read_mostly =
  65. (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
  66. module_param(bm_history, uint, 0644);
  67. /* --------------------------------------------------------------------------
  68. Power Management
  69. -------------------------------------------------------------------------- */
  70. /*
  71. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  72. * For now disable this. Probably a bug somewhere else.
  73. *
  74. * To skip this limit, boot/load with a large max_cstate limit.
  75. */
  76. static int set_max_cstate(struct dmi_system_id *id)
  77. {
  78. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  79. return 0;
  80. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  81. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  82. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  83. max_cstate = (long)id->driver_data;
  84. return 0;
  85. }
  86. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  87. callers to only run once -AK */
  88. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  89. { set_max_cstate, "IBM ThinkPad R40e", {
  90. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  91. DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
  92. { set_max_cstate, "IBM ThinkPad R40e", {
  93. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  94. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
  95. { set_max_cstate, "IBM ThinkPad R40e", {
  96. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  97. DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
  98. { set_max_cstate, "IBM ThinkPad R40e", {
  99. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  100. DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
  101. { set_max_cstate, "IBM ThinkPad R40e", {
  102. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  103. DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
  104. { set_max_cstate, "IBM ThinkPad R40e", {
  105. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  106. DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
  107. { set_max_cstate, "IBM ThinkPad R40e", {
  108. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  109. DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
  110. { set_max_cstate, "IBM ThinkPad R40e", {
  111. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  112. DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
  113. { set_max_cstate, "IBM ThinkPad R40e", {
  114. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  115. DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
  116. { set_max_cstate, "IBM ThinkPad R40e", {
  117. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  118. DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
  119. { set_max_cstate, "IBM ThinkPad R40e", {
  120. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  121. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
  122. { set_max_cstate, "IBM ThinkPad R40e", {
  123. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  124. DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
  125. { set_max_cstate, "IBM ThinkPad R40e", {
  126. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  127. DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
  128. { set_max_cstate, "IBM ThinkPad R40e", {
  129. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  130. DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
  131. { set_max_cstate, "IBM ThinkPad R40e", {
  132. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  133. DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
  134. { set_max_cstate, "IBM ThinkPad R40e", {
  135. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  136. DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
  137. { set_max_cstate, "Medion 41700", {
  138. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  139. DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
  140. { set_max_cstate, "Clevo 5600D", {
  141. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  142. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  143. (void *)2},
  144. {},
  145. };
  146. static inline u32 ticks_elapsed(u32 t1, u32 t2)
  147. {
  148. if (t2 >= t1)
  149. return (t2 - t1);
  150. else if (!acpi_fadt.tmr_val_ext)
  151. return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
  152. else
  153. return ((0xFFFFFFFF - t1) + t2);
  154. }
  155. static void
  156. acpi_processor_power_activate(struct acpi_processor *pr,
  157. struct acpi_processor_cx *new)
  158. {
  159. struct acpi_processor_cx *old;
  160. if (!pr || !new)
  161. return;
  162. old = pr->power.state;
  163. if (old)
  164. old->promotion.count = 0;
  165. new->demotion.count = 0;
  166. /* Cleanup from old state. */
  167. if (old) {
  168. switch (old->type) {
  169. case ACPI_STATE_C3:
  170. /* Disable bus master reload */
  171. if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
  172. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
  173. ACPI_MTX_DO_NOT_LOCK);
  174. break;
  175. }
  176. }
  177. /* Prepare to use new state. */
  178. switch (new->type) {
  179. case ACPI_STATE_C3:
  180. /* Enable bus master reload */
  181. if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
  182. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1,
  183. ACPI_MTX_DO_NOT_LOCK);
  184. break;
  185. }
  186. pr->power.state = new;
  187. return;
  188. }
  189. static void acpi_safe_halt(void)
  190. {
  191. current_thread_info()->status &= ~TS_POLLING;
  192. smp_mb__after_clear_bit();
  193. if (!need_resched())
  194. safe_halt();
  195. current_thread_info()->status |= TS_POLLING;
  196. }
  197. static atomic_t c3_cpu_count;
  198. static void acpi_processor_idle(void)
  199. {
  200. struct acpi_processor *pr = NULL;
  201. struct acpi_processor_cx *cx = NULL;
  202. struct acpi_processor_cx *next_state = NULL;
  203. int sleep_ticks = 0;
  204. u32 t1, t2 = 0;
  205. pr = processors[smp_processor_id()];
  206. if (!pr)
  207. return;
  208. /*
  209. * Interrupts must be disabled during bus mastering calculations and
  210. * for C2/C3 transitions.
  211. */
  212. local_irq_disable();
  213. /*
  214. * Check whether we truly need to go idle, or should
  215. * reschedule:
  216. */
  217. if (unlikely(need_resched())) {
  218. local_irq_enable();
  219. return;
  220. }
  221. cx = pr->power.state;
  222. if (!cx) {
  223. if (pm_idle_save)
  224. pm_idle_save();
  225. else
  226. acpi_safe_halt();
  227. return;
  228. }
  229. /*
  230. * Check BM Activity
  231. * -----------------
  232. * Check for bus mastering activity (if required), record, and check
  233. * for demotion.
  234. */
  235. if (pr->flags.bm_check) {
  236. u32 bm_status = 0;
  237. unsigned long diff = jiffies - pr->power.bm_check_timestamp;
  238. if (diff > 31)
  239. diff = 31;
  240. pr->power.bm_activity <<= diff;
  241. acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
  242. &bm_status, ACPI_MTX_DO_NOT_LOCK);
  243. if (bm_status) {
  244. pr->power.bm_activity |= 0x1;
  245. acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
  246. 1, ACPI_MTX_DO_NOT_LOCK);
  247. }
  248. /*
  249. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  250. * the true state of bus mastering activity; forcing us to
  251. * manually check the BMIDEA bit of each IDE channel.
  252. */
  253. else if (errata.piix4.bmisx) {
  254. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  255. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  256. pr->power.bm_activity |= 0x1;
  257. }
  258. pr->power.bm_check_timestamp = jiffies;
  259. /*
  260. * If bus mastering is or was active this jiffy, demote
  261. * to avoid a faulty transition. Note that the processor
  262. * won't enter a low-power state during this call (to this
  263. * function) but should upon the next.
  264. *
  265. * TBD: A better policy might be to fallback to the demotion
  266. * state (use it for this quantum only) istead of
  267. * demoting -- and rely on duration as our sole demotion
  268. * qualification. This may, however, introduce DMA
  269. * issues (e.g. floppy DMA transfer overrun/underrun).
  270. */
  271. if ((pr->power.bm_activity & 0x1) &&
  272. cx->demotion.threshold.bm) {
  273. local_irq_enable();
  274. next_state = cx->demotion.state;
  275. goto end;
  276. }
  277. }
  278. #ifdef CONFIG_HOTPLUG_CPU
  279. /*
  280. * Check for P_LVL2_UP flag before entering C2 and above on
  281. * an SMP system. We do it here instead of doing it at _CST/P_LVL
  282. * detection phase, to work cleanly with logical CPU hotplug.
  283. */
  284. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  285. !pr->flags.has_cst && !acpi_fadt.plvl2_up)
  286. cx = &pr->power.states[ACPI_STATE_C1];
  287. #endif
  288. /*
  289. * Sleep:
  290. * ------
  291. * Invoke the current Cx state to put the processor to sleep.
  292. */
  293. if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
  294. current_thread_info()->status &= ~TS_POLLING;
  295. smp_mb__after_clear_bit();
  296. if (need_resched()) {
  297. current_thread_info()->status |= TS_POLLING;
  298. local_irq_enable();
  299. return;
  300. }
  301. }
  302. switch (cx->type) {
  303. case ACPI_STATE_C1:
  304. /*
  305. * Invoke C1.
  306. * Use the appropriate idle routine, the one that would
  307. * be used without acpi C-states.
  308. */
  309. if (pm_idle_save)
  310. pm_idle_save();
  311. else
  312. acpi_safe_halt();
  313. /*
  314. * TBD: Can't get time duration while in C1, as resumes
  315. * go to an ISR rather than here. Need to instrument
  316. * base interrupt handler.
  317. */
  318. sleep_ticks = 0xFFFFFFFF;
  319. break;
  320. case ACPI_STATE_C2:
  321. /* Get start time (ticks) */
  322. t1 = inl(acpi_fadt.xpm_tmr_blk.address);
  323. /* Invoke C2 */
  324. inb(cx->address);
  325. /* Dummy wait op - must do something useless after P_LVL2 read
  326. because chipsets cannot guarantee that STPCLK# signal
  327. gets asserted in time to freeze execution properly. */
  328. t2 = inl(acpi_fadt.xpm_tmr_blk.address);
  329. /* Get end time (ticks) */
  330. t2 = inl(acpi_fadt.xpm_tmr_blk.address);
  331. #ifdef CONFIG_GENERIC_TIME
  332. /* TSC halts in C2, so notify users */
  333. mark_tsc_unstable();
  334. #endif
  335. /* Re-enable interrupts */
  336. local_irq_enable();
  337. current_thread_info()->status |= TS_POLLING;
  338. /* Compute time (ticks) that we were actually asleep */
  339. sleep_ticks =
  340. ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
  341. break;
  342. case ACPI_STATE_C3:
  343. if (pr->flags.bm_check) {
  344. if (atomic_inc_return(&c3_cpu_count) ==
  345. num_online_cpus()) {
  346. /*
  347. * All CPUs are trying to go to C3
  348. * Disable bus master arbitration
  349. */
  350. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
  351. ACPI_MTX_DO_NOT_LOCK);
  352. }
  353. } else {
  354. /* SMP with no shared cache... Invalidate cache */
  355. ACPI_FLUSH_CPU_CACHE();
  356. }
  357. /* Get start time (ticks) */
  358. t1 = inl(acpi_fadt.xpm_tmr_blk.address);
  359. /* Invoke C3 */
  360. inb(cx->address);
  361. /* Dummy wait op (see above) */
  362. t2 = inl(acpi_fadt.xpm_tmr_blk.address);
  363. /* Get end time (ticks) */
  364. t2 = inl(acpi_fadt.xpm_tmr_blk.address);
  365. if (pr->flags.bm_check) {
  366. /* Enable bus master arbitration */
  367. atomic_dec(&c3_cpu_count);
  368. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
  369. ACPI_MTX_DO_NOT_LOCK);
  370. }
  371. #ifdef CONFIG_GENERIC_TIME
  372. /* TSC halts in C3, so notify users */
  373. mark_tsc_unstable();
  374. #endif
  375. /* Re-enable interrupts */
  376. local_irq_enable();
  377. current_thread_info()->status |= TS_POLLING;
  378. /* Compute time (ticks) that we were actually asleep */
  379. sleep_ticks =
  380. ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
  381. break;
  382. default:
  383. local_irq_enable();
  384. return;
  385. }
  386. cx->usage++;
  387. if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
  388. cx->time += sleep_ticks;
  389. next_state = pr->power.state;
  390. #ifdef CONFIG_HOTPLUG_CPU
  391. /* Don't do promotion/demotion */
  392. if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  393. !pr->flags.has_cst && !acpi_fadt.plvl2_up) {
  394. next_state = cx;
  395. goto end;
  396. }
  397. #endif
  398. /*
  399. * Promotion?
  400. * ----------
  401. * Track the number of longs (time asleep is greater than threshold)
  402. * and promote when the count threshold is reached. Note that bus
  403. * mastering activity may prevent promotions.
  404. * Do not promote above max_cstate.
  405. */
  406. if (cx->promotion.state &&
  407. ((cx->promotion.state - pr->power.states) <= max_cstate)) {
  408. if (sleep_ticks > cx->promotion.threshold.ticks) {
  409. cx->promotion.count++;
  410. cx->demotion.count = 0;
  411. if (cx->promotion.count >=
  412. cx->promotion.threshold.count) {
  413. if (pr->flags.bm_check) {
  414. if (!
  415. (pr->power.bm_activity & cx->
  416. promotion.threshold.bm)) {
  417. next_state =
  418. cx->promotion.state;
  419. goto end;
  420. }
  421. } else {
  422. next_state = cx->promotion.state;
  423. goto end;
  424. }
  425. }
  426. }
  427. }
  428. /*
  429. * Demotion?
  430. * ---------
  431. * Track the number of shorts (time asleep is less than time threshold)
  432. * and demote when the usage threshold is reached.
  433. */
  434. if (cx->demotion.state) {
  435. if (sleep_ticks < cx->demotion.threshold.ticks) {
  436. cx->demotion.count++;
  437. cx->promotion.count = 0;
  438. if (cx->demotion.count >= cx->demotion.threshold.count) {
  439. next_state = cx->demotion.state;
  440. goto end;
  441. }
  442. }
  443. }
  444. end:
  445. /*
  446. * Demote if current state exceeds max_cstate
  447. */
  448. if ((pr->power.state - pr->power.states) > max_cstate) {
  449. if (cx->demotion.state)
  450. next_state = cx->demotion.state;
  451. }
  452. /*
  453. * New Cx State?
  454. * -------------
  455. * If we're going to start using a new Cx state we must clean up
  456. * from the previous and prepare to use the new.
  457. */
  458. if (next_state != pr->power.state)
  459. acpi_processor_power_activate(pr, next_state);
  460. }
  461. static int acpi_processor_set_power_policy(struct acpi_processor *pr)
  462. {
  463. unsigned int i;
  464. unsigned int state_is_set = 0;
  465. struct acpi_processor_cx *lower = NULL;
  466. struct acpi_processor_cx *higher = NULL;
  467. struct acpi_processor_cx *cx;
  468. if (!pr)
  469. return -EINVAL;
  470. /*
  471. * This function sets the default Cx state policy (OS idle handler).
  472. * Our scheme is to promote quickly to C2 but more conservatively
  473. * to C3. We're favoring C2 for its characteristics of low latency
  474. * (quick response), good power savings, and ability to allow bus
  475. * mastering activity. Note that the Cx state policy is completely
  476. * customizable and can be altered dynamically.
  477. */
  478. /* startup state */
  479. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  480. cx = &pr->power.states[i];
  481. if (!cx->valid)
  482. continue;
  483. if (!state_is_set)
  484. pr->power.state = cx;
  485. state_is_set++;
  486. break;
  487. }
  488. if (!state_is_set)
  489. return -ENODEV;
  490. /* demotion */
  491. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  492. cx = &pr->power.states[i];
  493. if (!cx->valid)
  494. continue;
  495. if (lower) {
  496. cx->demotion.state = lower;
  497. cx->demotion.threshold.ticks = cx->latency_ticks;
  498. cx->demotion.threshold.count = 1;
  499. if (cx->type == ACPI_STATE_C3)
  500. cx->demotion.threshold.bm = bm_history;
  501. }
  502. lower = cx;
  503. }
  504. /* promotion */
  505. for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
  506. cx = &pr->power.states[i];
  507. if (!cx->valid)
  508. continue;
  509. if (higher) {
  510. cx->promotion.state = higher;
  511. cx->promotion.threshold.ticks = cx->latency_ticks;
  512. if (cx->type >= ACPI_STATE_C2)
  513. cx->promotion.threshold.count = 4;
  514. else
  515. cx->promotion.threshold.count = 10;
  516. if (higher->type == ACPI_STATE_C3)
  517. cx->promotion.threshold.bm = bm_history;
  518. }
  519. higher = cx;
  520. }
  521. return 0;
  522. }
  523. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  524. {
  525. if (!pr)
  526. return -EINVAL;
  527. if (!pr->pblk)
  528. return -ENODEV;
  529. /* if info is obtained from pblk/fadt, type equals state */
  530. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  531. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  532. #ifndef CONFIG_HOTPLUG_CPU
  533. /*
  534. * Check for P_LVL2_UP flag before entering C2 and above on
  535. * an SMP system.
  536. */
  537. if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up)
  538. return -ENODEV;
  539. #endif
  540. /* determine C2 and C3 address from pblk */
  541. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  542. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  543. /* determine latencies from FADT */
  544. pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat;
  545. pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat;
  546. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  547. "lvl2[0x%08x] lvl3[0x%08x]\n",
  548. pr->power.states[ACPI_STATE_C2].address,
  549. pr->power.states[ACPI_STATE_C3].address));
  550. return 0;
  551. }
  552. static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr)
  553. {
  554. /* Zero initialize all the C-states info. */
  555. memset(pr->power.states, 0, sizeof(pr->power.states));
  556. /* set the first C-State to C1 */
  557. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  558. /* the C0 state only exists as a filler in our array,
  559. * and all processors need to support C1 */
  560. pr->power.states[ACPI_STATE_C0].valid = 1;
  561. pr->power.states[ACPI_STATE_C1].valid = 1;
  562. return 0;
  563. }
  564. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  565. {
  566. acpi_status status = 0;
  567. acpi_integer count;
  568. int current_count;
  569. int i;
  570. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  571. union acpi_object *cst;
  572. if (nocst)
  573. return -ENODEV;
  574. current_count = 1;
  575. /* Zero initialize C2 onwards and prepare for fresh CST lookup */
  576. for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++)
  577. memset(&(pr->power.states[i]), 0,
  578. sizeof(struct acpi_processor_cx));
  579. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  580. if (ACPI_FAILURE(status)) {
  581. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  582. return -ENODEV;
  583. }
  584. cst = (union acpi_object *)buffer.pointer;
  585. /* There must be at least 2 elements */
  586. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  587. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  588. status = -EFAULT;
  589. goto end;
  590. }
  591. count = cst->package.elements[0].integer.value;
  592. /* Validate number of power states. */
  593. if (count < 1 || count != cst->package.count - 1) {
  594. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  595. status = -EFAULT;
  596. goto end;
  597. }
  598. /* Tell driver that at least _CST is supported. */
  599. pr->flags.has_cst = 1;
  600. for (i = 1; i <= count; i++) {
  601. union acpi_object *element;
  602. union acpi_object *obj;
  603. struct acpi_power_register *reg;
  604. struct acpi_processor_cx cx;
  605. memset(&cx, 0, sizeof(cx));
  606. element = (union acpi_object *)&(cst->package.elements[i]);
  607. if (element->type != ACPI_TYPE_PACKAGE)
  608. continue;
  609. if (element->package.count != 4)
  610. continue;
  611. obj = (union acpi_object *)&(element->package.elements[0]);
  612. if (obj->type != ACPI_TYPE_BUFFER)
  613. continue;
  614. reg = (struct acpi_power_register *)obj->buffer.pointer;
  615. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  616. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  617. continue;
  618. cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ?
  619. 0 : reg->address;
  620. /* There should be an easy way to extract an integer... */
  621. obj = (union acpi_object *)&(element->package.elements[1]);
  622. if (obj->type != ACPI_TYPE_INTEGER)
  623. continue;
  624. cx.type = obj->integer.value;
  625. if ((cx.type != ACPI_STATE_C1) &&
  626. (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO))
  627. continue;
  628. if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3))
  629. continue;
  630. obj = (union acpi_object *)&(element->package.elements[2]);
  631. if (obj->type != ACPI_TYPE_INTEGER)
  632. continue;
  633. cx.latency = obj->integer.value;
  634. obj = (union acpi_object *)&(element->package.elements[3]);
  635. if (obj->type != ACPI_TYPE_INTEGER)
  636. continue;
  637. cx.power = obj->integer.value;
  638. current_count++;
  639. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  640. /*
  641. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  642. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  643. */
  644. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  645. printk(KERN_WARNING
  646. "Limiting number of power states to max (%d)\n",
  647. ACPI_PROCESSOR_MAX_POWER);
  648. printk(KERN_WARNING
  649. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  650. break;
  651. }
  652. }
  653. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  654. current_count));
  655. /* Validate number of power states discovered */
  656. if (current_count < 2)
  657. status = -EFAULT;
  658. end:
  659. kfree(buffer.pointer);
  660. return status;
  661. }
  662. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  663. {
  664. if (!cx->address)
  665. return;
  666. /*
  667. * C2 latency must be less than or equal to 100
  668. * microseconds.
  669. */
  670. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  671. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  672. "latency too large [%d]\n", cx->latency));
  673. return;
  674. }
  675. /*
  676. * Otherwise we've met all of our C2 requirements.
  677. * Normalize the C2 latency to expidite policy
  678. */
  679. cx->valid = 1;
  680. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  681. return;
  682. }
  683. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  684. struct acpi_processor_cx *cx)
  685. {
  686. static int bm_check_flag;
  687. if (!cx->address)
  688. return;
  689. /*
  690. * C3 latency must be less than or equal to 1000
  691. * microseconds.
  692. */
  693. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  694. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  695. "latency too large [%d]\n", cx->latency));
  696. return;
  697. }
  698. /*
  699. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  700. * DMA transfers are used by any ISA device to avoid livelock.
  701. * Note that we could disable Type-F DMA (as recommended by
  702. * the erratum), but this is known to disrupt certain ISA
  703. * devices thus we take the conservative approach.
  704. */
  705. else if (errata.piix4.fdma) {
  706. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  707. "C3 not supported on PIIX4 with Type-F DMA\n"));
  708. return;
  709. }
  710. /* All the logic here assumes flags.bm_check is same across all CPUs */
  711. if (!bm_check_flag) {
  712. /* Determine whether bm_check is needed based on CPU */
  713. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  714. bm_check_flag = pr->flags.bm_check;
  715. } else {
  716. pr->flags.bm_check = bm_check_flag;
  717. }
  718. if (pr->flags.bm_check) {
  719. /* bus mastering control is necessary */
  720. if (!pr->flags.bm_control) {
  721. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  722. "C3 support requires bus mastering control\n"));
  723. return;
  724. }
  725. } else {
  726. /*
  727. * WBINVD should be set in fadt, for C3 state to be
  728. * supported on when bm_check is not required.
  729. */
  730. if (acpi_fadt.wb_invd != 1) {
  731. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  732. "Cache invalidation should work properly"
  733. " for C3 to be enabled on SMP systems\n"));
  734. return;
  735. }
  736. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
  737. 0, ACPI_MTX_DO_NOT_LOCK);
  738. }
  739. /*
  740. * Otherwise we've met all of our C3 requirements.
  741. * Normalize the C3 latency to expidite policy. Enable
  742. * checking of bus mastering status (bm_check) so we can
  743. * use this in our C3 policy
  744. */
  745. cx->valid = 1;
  746. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  747. return;
  748. }
  749. static int acpi_processor_power_verify(struct acpi_processor *pr)
  750. {
  751. unsigned int i;
  752. unsigned int working = 0;
  753. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  754. int timer_broadcast = 0;
  755. cpumask_t mask = cpumask_of_cpu(pr->id);
  756. on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
  757. #endif
  758. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  759. struct acpi_processor_cx *cx = &pr->power.states[i];
  760. switch (cx->type) {
  761. case ACPI_STATE_C1:
  762. cx->valid = 1;
  763. break;
  764. case ACPI_STATE_C2:
  765. acpi_processor_power_verify_c2(cx);
  766. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  767. /* Some AMD systems fake C3 as C2, but still
  768. have timer troubles */
  769. if (cx->valid &&
  770. boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
  771. timer_broadcast++;
  772. #endif
  773. break;
  774. case ACPI_STATE_C3:
  775. acpi_processor_power_verify_c3(pr, cx);
  776. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  777. if (cx->valid)
  778. timer_broadcast++;
  779. #endif
  780. break;
  781. }
  782. if (cx->valid)
  783. working++;
  784. }
  785. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  786. if (timer_broadcast)
  787. on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
  788. #endif
  789. return (working);
  790. }
  791. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  792. {
  793. unsigned int i;
  794. int result;
  795. /* NOTE: the idle thread may not be running while calling
  796. * this function */
  797. /* Adding C1 state */
  798. acpi_processor_get_power_info_default_c1(pr);
  799. result = acpi_processor_get_power_info_cst(pr);
  800. if (result == -ENODEV)
  801. acpi_processor_get_power_info_fadt(pr);
  802. pr->power.count = acpi_processor_power_verify(pr);
  803. /*
  804. * Set Default Policy
  805. * ------------------
  806. * Now that we know which states are supported, set the default
  807. * policy. Note that this policy can be changed dynamically
  808. * (e.g. encourage deeper sleeps to conserve battery life when
  809. * not on AC).
  810. */
  811. result = acpi_processor_set_power_policy(pr);
  812. if (result)
  813. return result;
  814. /*
  815. * if one state of type C2 or C3 is available, mark this
  816. * CPU as being "idle manageable"
  817. */
  818. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  819. if (pr->power.states[i].valid) {
  820. pr->power.count = i;
  821. if (pr->power.states[i].type >= ACPI_STATE_C2)
  822. pr->flags.power = 1;
  823. }
  824. }
  825. return 0;
  826. }
  827. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  828. {
  829. int result = 0;
  830. if (!pr)
  831. return -EINVAL;
  832. if (nocst) {
  833. return -ENODEV;
  834. }
  835. if (!pr->flags.power_setup_done)
  836. return -ENODEV;
  837. /* Fall back to the default idle loop */
  838. pm_idle = pm_idle_save;
  839. synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
  840. pr->flags.power = 0;
  841. result = acpi_processor_get_power_info(pr);
  842. if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
  843. pm_idle = acpi_processor_idle;
  844. return result;
  845. }
  846. /* proc interface */
  847. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  848. {
  849. struct acpi_processor *pr = (struct acpi_processor *)seq->private;
  850. unsigned int i;
  851. if (!pr)
  852. goto end;
  853. seq_printf(seq, "active state: C%zd\n"
  854. "max_cstate: C%d\n"
  855. "bus master activity: %08x\n",
  856. pr->power.state ? pr->power.state - pr->power.states : 0,
  857. max_cstate, (unsigned)pr->power.bm_activity);
  858. seq_puts(seq, "states:\n");
  859. for (i = 1; i <= pr->power.count; i++) {
  860. seq_printf(seq, " %cC%d: ",
  861. (&pr->power.states[i] ==
  862. pr->power.state ? '*' : ' '), i);
  863. if (!pr->power.states[i].valid) {
  864. seq_puts(seq, "<not supported>\n");
  865. continue;
  866. }
  867. switch (pr->power.states[i].type) {
  868. case ACPI_STATE_C1:
  869. seq_printf(seq, "type[C1] ");
  870. break;
  871. case ACPI_STATE_C2:
  872. seq_printf(seq, "type[C2] ");
  873. break;
  874. case ACPI_STATE_C3:
  875. seq_printf(seq, "type[C3] ");
  876. break;
  877. default:
  878. seq_printf(seq, "type[--] ");
  879. break;
  880. }
  881. if (pr->power.states[i].promotion.state)
  882. seq_printf(seq, "promotion[C%zd] ",
  883. (pr->power.states[i].promotion.state -
  884. pr->power.states));
  885. else
  886. seq_puts(seq, "promotion[--] ");
  887. if (pr->power.states[i].demotion.state)
  888. seq_printf(seq, "demotion[C%zd] ",
  889. (pr->power.states[i].demotion.state -
  890. pr->power.states));
  891. else
  892. seq_puts(seq, "demotion[--] ");
  893. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  894. pr->power.states[i].latency,
  895. pr->power.states[i].usage,
  896. pr->power.states[i].time);
  897. }
  898. end:
  899. return 0;
  900. }
  901. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  902. {
  903. return single_open(file, acpi_processor_power_seq_show,
  904. PDE(inode)->data);
  905. }
  906. static const struct file_operations acpi_processor_power_fops = {
  907. .open = acpi_processor_power_open_fs,
  908. .read = seq_read,
  909. .llseek = seq_lseek,
  910. .release = single_release,
  911. };
  912. int acpi_processor_power_init(struct acpi_processor *pr,
  913. struct acpi_device *device)
  914. {
  915. acpi_status status = 0;
  916. static int first_run;
  917. struct proc_dir_entry *entry = NULL;
  918. unsigned int i;
  919. if (!first_run) {
  920. dmi_check_system(processor_power_dmi_table);
  921. if (max_cstate < ACPI_C_STATES_MAX)
  922. printk(KERN_NOTICE
  923. "ACPI: processor limited to max C-state %d\n",
  924. max_cstate);
  925. first_run++;
  926. }
  927. if (!pr)
  928. return -EINVAL;
  929. if (acpi_fadt.cst_cnt && !nocst) {
  930. status =
  931. acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8);
  932. if (ACPI_FAILURE(status)) {
  933. ACPI_EXCEPTION((AE_INFO, status,
  934. "Notifying BIOS of _CST ability failed"));
  935. }
  936. }
  937. acpi_processor_get_power_info(pr);
  938. /*
  939. * Install the idle handler if processor power management is supported.
  940. * Note that we use previously set idle handler will be used on
  941. * platforms that only support C1.
  942. */
  943. if ((pr->flags.power) && (!boot_option_idle_override)) {
  944. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  945. for (i = 1; i <= pr->power.count; i++)
  946. if (pr->power.states[i].valid)
  947. printk(" C%d[C%d]", i,
  948. pr->power.states[i].type);
  949. printk(")\n");
  950. if (pr->id == 0) {
  951. pm_idle_save = pm_idle;
  952. pm_idle = acpi_processor_idle;
  953. }
  954. }
  955. /* 'power' [R] */
  956. entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  957. S_IRUGO, acpi_device_dir(device));
  958. if (!entry)
  959. return -EIO;
  960. else {
  961. entry->proc_fops = &acpi_processor_power_fops;
  962. entry->data = acpi_driver_data(device);
  963. entry->owner = THIS_MODULE;
  964. }
  965. pr->flags.power_setup_done = 1;
  966. return 0;
  967. }
  968. int acpi_processor_power_exit(struct acpi_processor *pr,
  969. struct acpi_device *device)
  970. {
  971. pr->flags.power_setup_done = 0;
  972. if (acpi_device_dir(device))
  973. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  974. acpi_device_dir(device));
  975. /* Unregister the idle handler when processor #0 is removed. */
  976. if (pr->id == 0) {
  977. pm_idle = pm_idle_save;
  978. /*
  979. * We are about to unload the current idle thread pm callback
  980. * (pm_idle), Wait for all processors to update cached/local
  981. * copies of pm_idle before proceeding.
  982. */
  983. cpu_idle_wait();
  984. }
  985. return 0;
  986. }