pontis.c 22 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Pontis MS300
  5. *
  6. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <sound/driver.h>
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <linux/mutex.h>
  30. #include <sound/core.h>
  31. #include <sound/info.h>
  32. #include "ice1712.h"
  33. #include "envy24ht.h"
  34. #include "pontis.h"
  35. /* I2C addresses */
  36. #define WM_DEV 0x34
  37. #define CS_DEV 0x20
  38. /* WM8776 registers */
  39. #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
  40. #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
  41. #define WM_HP_MASTER 0x02 /* headphone master (both channels), override LLR */
  42. #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
  43. #define WM_DAC_ATTEN_R 0x04
  44. #define WM_DAC_MASTER 0x05
  45. #define WM_PHASE_SWAP 0x06 /* DAC phase swap */
  46. #define WM_DAC_CTRL1 0x07
  47. #define WM_DAC_MUTE 0x08
  48. #define WM_DAC_CTRL2 0x09
  49. #define WM_DAC_INT 0x0a
  50. #define WM_ADC_INT 0x0b
  51. #define WM_MASTER_CTRL 0x0c
  52. #define WM_POWERDOWN 0x0d
  53. #define WM_ADC_ATTEN_L 0x0e
  54. #define WM_ADC_ATTEN_R 0x0f
  55. #define WM_ALC_CTRL1 0x10
  56. #define WM_ALC_CTRL2 0x11
  57. #define WM_ALC_CTRL3 0x12
  58. #define WM_NOISE_GATE 0x13
  59. #define WM_LIMITER 0x14
  60. #define WM_ADC_MUX 0x15
  61. #define WM_OUT_MUX 0x16
  62. #define WM_RESET 0x17
  63. /*
  64. * GPIO
  65. */
  66. #define PONTIS_CS_CS (1<<4) /* CS */
  67. #define PONTIS_CS_CLK (1<<5) /* CLK */
  68. #define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */
  69. #define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */
  70. /*
  71. * get the current register value of WM codec
  72. */
  73. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  74. {
  75. reg <<= 1;
  76. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  77. ice->akm[0].images[reg + 1];
  78. }
  79. /*
  80. * set the register value of WM codec and remember it
  81. */
  82. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  83. {
  84. unsigned short cval;
  85. cval = (reg << 9) | val;
  86. snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
  87. }
  88. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  89. {
  90. wm_put_nocache(ice, reg, val);
  91. reg <<= 1;
  92. ice->akm[0].images[reg] = val >> 8;
  93. ice->akm[0].images[reg + 1] = val;
  94. }
  95. /*
  96. * DAC volume attenuation mixer control (-64dB to 0dB)
  97. */
  98. #define DAC_0dB 0xff
  99. #define DAC_RES 128
  100. #define DAC_MIN (DAC_0dB - DAC_RES)
  101. static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  102. {
  103. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  104. uinfo->count = 2;
  105. uinfo->value.integer.min = 0; /* mute */
  106. uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
  107. return 0;
  108. }
  109. static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  110. {
  111. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  112. unsigned short val;
  113. int i;
  114. mutex_lock(&ice->gpio_mutex);
  115. for (i = 0; i < 2; i++) {
  116. val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
  117. val = val > DAC_MIN ? (val - DAC_MIN) : 0;
  118. ucontrol->value.integer.value[i] = val;
  119. }
  120. mutex_unlock(&ice->gpio_mutex);
  121. return 0;
  122. }
  123. static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  124. {
  125. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  126. unsigned short oval, nval;
  127. int i, idx, change = 0;
  128. mutex_lock(&ice->gpio_mutex);
  129. for (i = 0; i < 2; i++) {
  130. nval = ucontrol->value.integer.value[i];
  131. nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
  132. idx = WM_DAC_ATTEN_L + i;
  133. oval = wm_get(ice, idx) & 0xff;
  134. if (oval != nval) {
  135. wm_put(ice, idx, nval);
  136. wm_put_nocache(ice, idx, nval | 0x100);
  137. change = 1;
  138. }
  139. }
  140. mutex_unlock(&ice->gpio_mutex);
  141. return change;
  142. }
  143. /*
  144. * ADC gain mixer control (-64dB to 0dB)
  145. */
  146. #define ADC_0dB 0xcf
  147. #define ADC_RES 128
  148. #define ADC_MIN (ADC_0dB - ADC_RES)
  149. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  150. {
  151. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  152. uinfo->count = 2;
  153. uinfo->value.integer.min = 0; /* mute (-64dB) */
  154. uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
  155. return 0;
  156. }
  157. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  158. {
  159. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  160. unsigned short val;
  161. int i;
  162. mutex_lock(&ice->gpio_mutex);
  163. for (i = 0; i < 2; i++) {
  164. val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
  165. val = val > ADC_MIN ? (val - ADC_MIN) : 0;
  166. ucontrol->value.integer.value[i] = val;
  167. }
  168. mutex_unlock(&ice->gpio_mutex);
  169. return 0;
  170. }
  171. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  172. {
  173. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  174. unsigned short ovol, nvol;
  175. int i, idx, change = 0;
  176. mutex_lock(&ice->gpio_mutex);
  177. for (i = 0; i < 2; i++) {
  178. nvol = ucontrol->value.integer.value[i];
  179. nvol = nvol ? (nvol + ADC_MIN) : 0;
  180. idx = WM_ADC_ATTEN_L + i;
  181. ovol = wm_get(ice, idx) & 0xff;
  182. if (ovol != nvol) {
  183. wm_put(ice, idx, nvol);
  184. change = 1;
  185. }
  186. }
  187. mutex_unlock(&ice->gpio_mutex);
  188. return change;
  189. }
  190. /*
  191. * ADC input mux mixer control
  192. */
  193. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  194. {
  195. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  196. uinfo->count = 1;
  197. uinfo->value.integer.min = 0;
  198. uinfo->value.integer.max = 1;
  199. return 0;
  200. }
  201. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  202. {
  203. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  204. int bit = kcontrol->private_value;
  205. mutex_lock(&ice->gpio_mutex);
  206. ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
  207. mutex_unlock(&ice->gpio_mutex);
  208. return 0;
  209. }
  210. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  211. {
  212. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  213. int bit = kcontrol->private_value;
  214. unsigned short oval, nval;
  215. int change;
  216. mutex_lock(&ice->gpio_mutex);
  217. nval = oval = wm_get(ice, WM_ADC_MUX);
  218. if (ucontrol->value.integer.value[0])
  219. nval |= (1 << bit);
  220. else
  221. nval &= ~(1 << bit);
  222. change = nval != oval;
  223. if (change) {
  224. wm_put(ice, WM_ADC_MUX, nval);
  225. }
  226. mutex_unlock(&ice->gpio_mutex);
  227. return 0;
  228. }
  229. /*
  230. * Analog bypass (In -> Out)
  231. */
  232. static int wm_bypass_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  233. {
  234. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  235. uinfo->count = 1;
  236. uinfo->value.integer.min = 0;
  237. uinfo->value.integer.max = 1;
  238. return 0;
  239. }
  240. static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  241. {
  242. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  243. mutex_lock(&ice->gpio_mutex);
  244. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
  245. mutex_unlock(&ice->gpio_mutex);
  246. return 0;
  247. }
  248. static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  249. {
  250. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  251. unsigned short val, oval;
  252. int change = 0;
  253. mutex_lock(&ice->gpio_mutex);
  254. val = oval = wm_get(ice, WM_OUT_MUX);
  255. if (ucontrol->value.integer.value[0])
  256. val |= 0x04;
  257. else
  258. val &= ~0x04;
  259. if (val != oval) {
  260. wm_put(ice, WM_OUT_MUX, val);
  261. change = 1;
  262. }
  263. mutex_unlock(&ice->gpio_mutex);
  264. return change;
  265. }
  266. /*
  267. * Left/Right swap
  268. */
  269. static int wm_chswap_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  270. {
  271. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  272. uinfo->count = 1;
  273. uinfo->value.integer.min = 0;
  274. uinfo->value.integer.max = 1;
  275. return 0;
  276. }
  277. static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  278. {
  279. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  280. mutex_lock(&ice->gpio_mutex);
  281. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
  282. mutex_unlock(&ice->gpio_mutex);
  283. return 0;
  284. }
  285. static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  286. {
  287. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  288. unsigned short val, oval;
  289. int change = 0;
  290. mutex_lock(&ice->gpio_mutex);
  291. oval = wm_get(ice, WM_DAC_CTRL1);
  292. val = oval & 0x0f;
  293. if (ucontrol->value.integer.value[0])
  294. val |= 0x60;
  295. else
  296. val |= 0x90;
  297. if (val != oval) {
  298. wm_put(ice, WM_DAC_CTRL1, val);
  299. wm_put_nocache(ice, WM_DAC_CTRL1, val);
  300. change = 1;
  301. }
  302. mutex_unlock(&ice->gpio_mutex);
  303. return change;
  304. }
  305. /*
  306. * write data in the SPI mode
  307. */
  308. static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
  309. {
  310. unsigned int tmp = snd_ice1712_gpio_read(ice);
  311. if (val)
  312. tmp |= bit;
  313. else
  314. tmp &= ~bit;
  315. snd_ice1712_gpio_write(ice, tmp);
  316. }
  317. static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
  318. {
  319. int i;
  320. for (i = 0; i < 8; i++) {
  321. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  322. udelay(1);
  323. set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
  324. udelay(1);
  325. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  326. udelay(1);
  327. data <<= 1;
  328. }
  329. }
  330. static unsigned int spi_read_byte(struct snd_ice1712 *ice)
  331. {
  332. int i;
  333. unsigned int val = 0;
  334. for (i = 0; i < 8; i++) {
  335. val <<= 1;
  336. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  337. udelay(1);
  338. if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
  339. val |= 1;
  340. udelay(1);
  341. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  342. udelay(1);
  343. }
  344. return val;
  345. }
  346. static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
  347. {
  348. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  349. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  350. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  351. spi_send_byte(ice, dev & ~1); /* WRITE */
  352. spi_send_byte(ice, reg); /* MAP */
  353. spi_send_byte(ice, data); /* DATA */
  354. /* trigger */
  355. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  356. udelay(1);
  357. /* restore */
  358. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  359. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  360. }
  361. static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
  362. {
  363. unsigned int val;
  364. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  365. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  366. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  367. spi_send_byte(ice, dev & ~1); /* WRITE */
  368. spi_send_byte(ice, reg); /* MAP */
  369. /* trigger */
  370. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  371. udelay(1);
  372. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  373. spi_send_byte(ice, dev | 1); /* READ */
  374. val = spi_read_byte(ice);
  375. /* trigger */
  376. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  377. udelay(1);
  378. /* restore */
  379. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  380. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  381. return val;
  382. }
  383. /*
  384. * SPDIF input source
  385. */
  386. static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  387. {
  388. static char *texts[] = {
  389. "Coax", /* RXP0 */
  390. "Optical", /* RXP1 */
  391. "CD", /* RXP2 */
  392. };
  393. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  394. uinfo->count = 1;
  395. uinfo->value.enumerated.items = 3;
  396. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  397. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  398. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  399. return 0;
  400. }
  401. static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  402. {
  403. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  404. mutex_lock(&ice->gpio_mutex);
  405. ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
  406. mutex_unlock(&ice->gpio_mutex);
  407. return 0;
  408. }
  409. static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  410. {
  411. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  412. unsigned char val;
  413. int change = 0;
  414. mutex_lock(&ice->gpio_mutex);
  415. if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
  416. ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
  417. val = 0x80 | (ice->gpio.saved[0] << 3);
  418. spi_write(ice, CS_DEV, 0x04, val);
  419. change = 1;
  420. }
  421. mutex_unlock(&ice->gpio_mutex);
  422. return 0;
  423. }
  424. /*
  425. * GPIO controls
  426. */
  427. static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  428. {
  429. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  430. uinfo->count = 1;
  431. uinfo->value.integer.min = 0;
  432. uinfo->value.integer.max = 0xffff; /* 16bit */
  433. return 0;
  434. }
  435. static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  436. {
  437. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  438. mutex_lock(&ice->gpio_mutex);
  439. /* 4-7 reserved */
  440. ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
  441. mutex_unlock(&ice->gpio_mutex);
  442. return 0;
  443. }
  444. static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  445. {
  446. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  447. unsigned int val;
  448. int changed;
  449. mutex_lock(&ice->gpio_mutex);
  450. /* 4-7 reserved */
  451. val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
  452. changed = val != ice->gpio.write_mask;
  453. ice->gpio.write_mask = val;
  454. mutex_unlock(&ice->gpio_mutex);
  455. return changed;
  456. }
  457. static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  458. {
  459. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  460. mutex_lock(&ice->gpio_mutex);
  461. /* 4-7 reserved */
  462. ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
  463. mutex_unlock(&ice->gpio_mutex);
  464. return 0;
  465. }
  466. static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  467. {
  468. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  469. unsigned int val;
  470. int changed;
  471. mutex_lock(&ice->gpio_mutex);
  472. /* 4-7 reserved */
  473. val = ucontrol->value.integer.value[0] & 0xff0f;
  474. changed = (val != ice->gpio.direction);
  475. ice->gpio.direction = val;
  476. mutex_unlock(&ice->gpio_mutex);
  477. return changed;
  478. }
  479. static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  480. {
  481. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  482. mutex_lock(&ice->gpio_mutex);
  483. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  484. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  485. ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
  486. mutex_unlock(&ice->gpio_mutex);
  487. return 0;
  488. }
  489. static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  490. {
  491. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  492. unsigned int val, nval;
  493. int changed = 0;
  494. mutex_lock(&ice->gpio_mutex);
  495. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  496. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  497. val = snd_ice1712_gpio_read(ice) & 0xffff;
  498. nval = ucontrol->value.integer.value[0] & 0xffff;
  499. if (val != nval) {
  500. snd_ice1712_gpio_write(ice, nval);
  501. changed = 1;
  502. }
  503. mutex_unlock(&ice->gpio_mutex);
  504. return changed;
  505. }
  506. /*
  507. * mixers
  508. */
  509. static struct snd_kcontrol_new pontis_controls[] __devinitdata = {
  510. {
  511. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  512. .name = "PCM Playback Volume",
  513. .info = wm_dac_vol_info,
  514. .get = wm_dac_vol_get,
  515. .put = wm_dac_vol_put,
  516. },
  517. {
  518. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  519. .name = "Capture Volume",
  520. .info = wm_adc_vol_info,
  521. .get = wm_adc_vol_get,
  522. .put = wm_adc_vol_put,
  523. },
  524. {
  525. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  526. .name = "CD Capture Switch",
  527. .info = wm_adc_mux_info,
  528. .get = wm_adc_mux_get,
  529. .put = wm_adc_mux_put,
  530. .private_value = 0,
  531. },
  532. {
  533. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  534. .name = "Line Capture Switch",
  535. .info = wm_adc_mux_info,
  536. .get = wm_adc_mux_get,
  537. .put = wm_adc_mux_put,
  538. .private_value = 1,
  539. },
  540. {
  541. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  542. .name = "Analog Bypass Switch",
  543. .info = wm_bypass_info,
  544. .get = wm_bypass_get,
  545. .put = wm_bypass_put,
  546. },
  547. {
  548. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  549. .name = "Swap Output Channels",
  550. .info = wm_chswap_info,
  551. .get = wm_chswap_get,
  552. .put = wm_chswap_put,
  553. },
  554. {
  555. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  556. .name = "IEC958 Input Source",
  557. .info = cs_source_info,
  558. .get = cs_source_get,
  559. .put = cs_source_put,
  560. },
  561. /* FIXME: which interface? */
  562. {
  563. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  564. .name = "GPIO Mask",
  565. .info = pontis_gpio_mask_info,
  566. .get = pontis_gpio_mask_get,
  567. .put = pontis_gpio_mask_put,
  568. },
  569. {
  570. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  571. .name = "GPIO Direction",
  572. .info = pontis_gpio_mask_info,
  573. .get = pontis_gpio_dir_get,
  574. .put = pontis_gpio_dir_put,
  575. },
  576. {
  577. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  578. .name = "GPIO Data",
  579. .info = pontis_gpio_mask_info,
  580. .get = pontis_gpio_data_get,
  581. .put = pontis_gpio_data_put,
  582. },
  583. };
  584. /*
  585. * WM codec registers
  586. */
  587. static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  588. {
  589. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  590. char line[64];
  591. unsigned int reg, val;
  592. mutex_lock(&ice->gpio_mutex);
  593. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  594. if (sscanf(line, "%x %x", &reg, &val) != 2)
  595. continue;
  596. if (reg <= 0x17 && val <= 0xffff)
  597. wm_put(ice, reg, val);
  598. }
  599. mutex_unlock(&ice->gpio_mutex);
  600. }
  601. static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  602. {
  603. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  604. int reg, val;
  605. mutex_lock(&ice->gpio_mutex);
  606. for (reg = 0; reg <= 0x17; reg++) {
  607. val = wm_get(ice, reg);
  608. snd_iprintf(buffer, "%02x = %04x\n", reg, val);
  609. }
  610. mutex_unlock(&ice->gpio_mutex);
  611. }
  612. static void wm_proc_init(struct snd_ice1712 *ice)
  613. {
  614. struct snd_info_entry *entry;
  615. if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
  616. snd_info_set_text_ops(entry, ice, 1024, wm_proc_regs_read);
  617. entry->mode |= S_IWUSR;
  618. entry->c.text.write_size = 1024;
  619. entry->c.text.write = wm_proc_regs_write;
  620. }
  621. }
  622. static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  623. {
  624. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  625. int reg, val;
  626. mutex_lock(&ice->gpio_mutex);
  627. for (reg = 0; reg <= 0x26; reg++) {
  628. val = spi_read(ice, CS_DEV, reg);
  629. snd_iprintf(buffer, "%02x = %02x\n", reg, val);
  630. }
  631. val = spi_read(ice, CS_DEV, 0x7f);
  632. snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
  633. mutex_unlock(&ice->gpio_mutex);
  634. }
  635. static void cs_proc_init(struct snd_ice1712 *ice)
  636. {
  637. struct snd_info_entry *entry;
  638. if (! snd_card_proc_new(ice->card, "cs_codec", &entry)) {
  639. snd_info_set_text_ops(entry, ice, 1024, cs_proc_regs_read);
  640. }
  641. }
  642. static int __devinit pontis_add_controls(struct snd_ice1712 *ice)
  643. {
  644. unsigned int i;
  645. int err;
  646. for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
  647. err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
  648. if (err < 0)
  649. return err;
  650. }
  651. wm_proc_init(ice);
  652. cs_proc_init(ice);
  653. return 0;
  654. }
  655. /*
  656. * initialize the chip
  657. */
  658. static int __devinit pontis_init(struct snd_ice1712 *ice)
  659. {
  660. static unsigned short wm_inits[] = {
  661. /* These come first to reduce init pop noise */
  662. WM_ADC_MUX, 0x00c0, /* ADC mute */
  663. WM_DAC_MUTE, 0x0001, /* DAC softmute */
  664. WM_DAC_CTRL1, 0x0000, /* DAC mute */
  665. WM_POWERDOWN, 0x0008, /* All power-up except HP */
  666. WM_RESET, 0x0000, /* reset */
  667. };
  668. static unsigned short wm_inits2[] = {
  669. WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
  670. WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  671. WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  672. WM_DAC_CTRL1, 0x0090, /* DAC L/R */
  673. WM_OUT_MUX, 0x0001, /* OUT DAC */
  674. WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
  675. WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
  676. WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
  677. WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
  678. WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
  679. WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
  680. // WM_DAC_MASTER, 0x0100, /* DAC master muted */
  681. WM_PHASE_SWAP, 0x0000, /* phase normal */
  682. WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
  683. WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
  684. WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
  685. #if 0
  686. WM_ALC_CTRL1, 0x007b, /* */
  687. WM_ALC_CTRL2, 0x0000, /* */
  688. WM_ALC_CTRL3, 0x0000, /* */
  689. WM_NOISE_GATE, 0x0000, /* */
  690. #endif
  691. WM_DAC_MUTE, 0x0000, /* DAC unmute */
  692. WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
  693. };
  694. static unsigned char cs_inits[] = {
  695. 0x04, 0x80, /* RUN, RXP0 */
  696. 0x05, 0x05, /* slave, 24bit */
  697. 0x01, 0x00,
  698. 0x02, 0x00,
  699. 0x03, 0x00,
  700. };
  701. unsigned int i;
  702. ice->vt1720 = 1;
  703. ice->num_total_dacs = 2;
  704. ice->num_total_adcs = 2;
  705. /* to remeber the register values */
  706. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  707. if (! ice->akm)
  708. return -ENOMEM;
  709. ice->akm_codecs = 1;
  710. /* HACK - use this as the SPDIF source.
  711. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  712. */
  713. ice->gpio.saved[0] = 0;
  714. /* initialize WM8776 codec */
  715. for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
  716. wm_put(ice, wm_inits[i], wm_inits[i+1]);
  717. schedule_timeout_uninterruptible(1);
  718. for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
  719. wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
  720. /* initialize CS8416 codec */
  721. /* assert PRST#; MT05 bit 7 */
  722. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  723. mdelay(5);
  724. /* deassert PRST# */
  725. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  726. for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
  727. spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
  728. return 0;
  729. }
  730. /*
  731. * Pontis boards don't provide the EEPROM data at all.
  732. * hence the driver needs to sets up it properly.
  733. */
  734. static unsigned char pontis_eeprom[] __devinitdata = {
  735. 0x08, /* SYSCONF: clock 256, mpu401, spdif-in/ADC, 1DAC */
  736. 0x80, /* ACLINK: I2S */
  737. 0xf8, /* I2S: vol, 96k, 24bit, 192k */
  738. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  739. 0x07, /* GPIO_DIR */
  740. 0x00, /* GPIO_DIR1 */
  741. 0x00, /* GPIO_DIR2 (ignored) */
  742. 0x0f, /* GPIO_MASK (4-7 reserved for CS8416) */
  743. 0xff, /* GPIO_MASK1 */
  744. 0x00, /* GPIO_MASK2 (ignored) */
  745. 0x06, /* GPIO_STATE (0-low, 1-high, 2-high) */
  746. 0x00, /* GPIO_STATE1 */
  747. 0x00, /* GPIO_STATE2 (ignored) */
  748. };
  749. /* entry point */
  750. struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = {
  751. {
  752. .subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
  753. .name = "Pontis MS300",
  754. .model = "ms300",
  755. .chip_init = pontis_init,
  756. .build_controls = pontis_add_controls,
  757. .eeprom_size = sizeof(pontis_eeprom),
  758. .eeprom_data = pontis_eeprom,
  759. },
  760. { } /* terminator */
  761. };