ice1712.c 82 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. /*
  22. NOTES:
  23. - spdif nonaudio consumer mode does not work (at least with my
  24. Sony STR-DB830)
  25. */
  26. /*
  27. * Changes:
  28. *
  29. * 2002.09.09 Takashi Iwai <tiwai@suse.de>
  30. * split the code to several files. each low-level routine
  31. * is stored in the local file and called from registration
  32. * function from card_info struct.
  33. *
  34. * 2002.11.26 James Stafford <jstafford@ampltd.com>
  35. * Added support for VT1724 (Envy24HT)
  36. * I have left out support for 176.4 and 192 KHz for the moment.
  37. * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
  38. *
  39. * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
  40. * Split vt1724 part to an independent driver.
  41. * The GPIO is accessed through the callback functions now.
  42. *
  43. * 2004.03.31 Doug McLain <nostar@comcast.net>
  44. * Added support for Event Electronics EZ8 card to hoontech.c.
  45. */
  46. #include <sound/driver.h>
  47. #include <asm/io.h>
  48. #include <linux/delay.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/init.h>
  51. #include <linux/pci.h>
  52. #include <linux/dma-mapping.h>
  53. #include <linux/slab.h>
  54. #include <linux/moduleparam.h>
  55. #include <linux/dma-mapping.h>
  56. #include <linux/mutex.h>
  57. #include <sound/core.h>
  58. #include <sound/cs8427.h>
  59. #include <sound/info.h>
  60. #include <sound/mpu401.h>
  61. #include <sound/initval.h>
  62. #include <sound/asoundef.h>
  63. #include "ice1712.h"
  64. /* lowlevel routines */
  65. #include "delta.h"
  66. #include "ews.h"
  67. #include "hoontech.h"
  68. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  69. MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
  70. MODULE_LICENSE("GPL");
  71. MODULE_SUPPORTED_DEVICE("{"
  72. HOONTECH_DEVICE_DESC
  73. DELTA_DEVICE_DESC
  74. EWS_DEVICE_DESC
  75. "{ICEnsemble,Generic ICE1712},"
  76. "{ICEnsemble,Generic Envy24}}");
  77. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  78. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  79. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
  80. static char *model[SNDRV_CARDS];
  81. static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
  82. static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
  83. static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
  84. module_param_array(index, int, NULL, 0444);
  85. MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
  86. module_param_array(id, charp, NULL, 0444);
  87. MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
  88. module_param_array(enable, bool, NULL, 0444);
  89. MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
  90. module_param_array(omni, bool, NULL, 0444);
  91. MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
  92. module_param_array(cs8427_timeout, int, NULL, 0444);
  93. MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
  94. module_param_array(model, charp, NULL, 0444);
  95. MODULE_PARM_DESC(model, "Use the given board model.");
  96. module_param_array(dxr_enable, int, NULL, 0444);
  97. MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
  98. static struct pci_device_id snd_ice1712_ids[] = {
  99. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
  100. { 0, }
  101. };
  102. MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
  103. static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
  104. static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
  105. static int PRO_RATE_LOCKED;
  106. static int PRO_RATE_RESET = 1;
  107. static unsigned int PRO_RATE_DEFAULT = 44100;
  108. /*
  109. * Basic I/O
  110. */
  111. /* check whether the clock mode is spdif-in */
  112. static inline int is_spdif_master(struct snd_ice1712 *ice)
  113. {
  114. return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
  115. }
  116. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  117. {
  118. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  119. }
  120. static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
  121. {
  122. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  123. outl(data, ICEDS(ice, DATA));
  124. }
  125. static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
  126. {
  127. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  128. return inl(ICEDS(ice, DATA));
  129. }
  130. static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
  131. unsigned short reg,
  132. unsigned short val)
  133. {
  134. struct snd_ice1712 *ice = ac97->private_data;
  135. int tm;
  136. unsigned char old_cmd = 0;
  137. for (tm = 0; tm < 0x10000; tm++) {
  138. old_cmd = inb(ICEREG(ice, AC97_CMD));
  139. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  140. continue;
  141. if (!(old_cmd & ICE1712_AC97_READY))
  142. continue;
  143. break;
  144. }
  145. outb(reg, ICEREG(ice, AC97_INDEX));
  146. outw(val, ICEREG(ice, AC97_DATA));
  147. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  148. outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
  149. for (tm = 0; tm < 0x10000; tm++)
  150. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  151. break;
  152. }
  153. static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
  154. unsigned short reg)
  155. {
  156. struct snd_ice1712 *ice = ac97->private_data;
  157. int tm;
  158. unsigned char old_cmd = 0;
  159. for (tm = 0; tm < 0x10000; tm++) {
  160. old_cmd = inb(ICEREG(ice, AC97_CMD));
  161. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  162. continue;
  163. if (!(old_cmd & ICE1712_AC97_READY))
  164. continue;
  165. break;
  166. }
  167. outb(reg, ICEREG(ice, AC97_INDEX));
  168. outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
  169. for (tm = 0; tm < 0x10000; tm++)
  170. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  171. break;
  172. if (tm >= 0x10000) /* timeout */
  173. return ~0;
  174. return inw(ICEREG(ice, AC97_DATA));
  175. }
  176. /*
  177. * pro ac97 section
  178. */
  179. static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
  180. unsigned short reg,
  181. unsigned short val)
  182. {
  183. struct snd_ice1712 *ice = ac97->private_data;
  184. int tm;
  185. unsigned char old_cmd = 0;
  186. for (tm = 0; tm < 0x10000; tm++) {
  187. old_cmd = inb(ICEMT(ice, AC97_CMD));
  188. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  189. continue;
  190. if (!(old_cmd & ICE1712_AC97_READY))
  191. continue;
  192. break;
  193. }
  194. outb(reg, ICEMT(ice, AC97_INDEX));
  195. outw(val, ICEMT(ice, AC97_DATA));
  196. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  197. outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
  198. for (tm = 0; tm < 0x10000; tm++)
  199. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  200. break;
  201. }
  202. static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
  203. unsigned short reg)
  204. {
  205. struct snd_ice1712 *ice = ac97->private_data;
  206. int tm;
  207. unsigned char old_cmd = 0;
  208. for (tm = 0; tm < 0x10000; tm++) {
  209. old_cmd = inb(ICEMT(ice, AC97_CMD));
  210. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  211. continue;
  212. if (!(old_cmd & ICE1712_AC97_READY))
  213. continue;
  214. break;
  215. }
  216. outb(reg, ICEMT(ice, AC97_INDEX));
  217. outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
  218. for (tm = 0; tm < 0x10000; tm++)
  219. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  220. break;
  221. if (tm >= 0x10000) /* timeout */
  222. return ~0;
  223. return inw(ICEMT(ice, AC97_DATA));
  224. }
  225. /*
  226. * consumer ac97 digital mix
  227. */
  228. static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  229. {
  230. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  231. uinfo->count = 1;
  232. uinfo->value.integer.min = 0;
  233. uinfo->value.integer.max = 1;
  234. return 0;
  235. }
  236. static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  237. {
  238. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  239. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
  240. return 0;
  241. }
  242. static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  243. {
  244. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  245. unsigned char val, nval;
  246. spin_lock_irq(&ice->reg_lock);
  247. val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
  248. nval = val & ~ICE1712_ROUTE_AC97;
  249. if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
  250. outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
  251. spin_unlock_irq(&ice->reg_lock);
  252. return val != nval;
  253. }
  254. static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
  255. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  256. .name = "Digital Mixer To AC97",
  257. .info = snd_ice1712_digmix_route_ac97_info,
  258. .get = snd_ice1712_digmix_route_ac97_get,
  259. .put = snd_ice1712_digmix_route_ac97_put,
  260. };
  261. /*
  262. * gpio operations
  263. */
  264. static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  265. {
  266. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
  267. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  268. }
  269. static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  270. {
  271. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
  272. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  273. }
  274. static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
  275. {
  276. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  277. }
  278. static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
  279. {
  280. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
  281. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  282. }
  283. /*
  284. *
  285. * CS8427 interface
  286. *
  287. */
  288. /*
  289. * change the input clock selection
  290. * spdif_clock = 1 - IEC958 input, 0 - Envy24
  291. */
  292. static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
  293. {
  294. unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
  295. unsigned char val, nval;
  296. int res = 0;
  297. snd_i2c_lock(ice->i2c);
  298. if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
  299. snd_i2c_unlock(ice->i2c);
  300. return -EIO;
  301. }
  302. if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
  303. snd_i2c_unlock(ice->i2c);
  304. return -EIO;
  305. }
  306. nval = val & 0xf0;
  307. if (spdif_clock)
  308. nval |= 0x01;
  309. else
  310. nval |= 0x04;
  311. if (val != nval) {
  312. reg[1] = nval;
  313. if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
  314. res = -EIO;
  315. } else {
  316. res++;
  317. }
  318. }
  319. snd_i2c_unlock(ice->i2c);
  320. return res;
  321. }
  322. /*
  323. * spdif callbacks
  324. */
  325. static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  326. {
  327. snd_cs8427_iec958_active(ice->cs8427, 1);
  328. }
  329. static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  330. {
  331. snd_cs8427_iec958_active(ice->cs8427, 0);
  332. }
  333. static void setup_cs8427(struct snd_ice1712 *ice, int rate)
  334. {
  335. snd_cs8427_iec958_pcm(ice->cs8427, rate);
  336. }
  337. /*
  338. * create and initialize callbacks for cs8427 interface
  339. */
  340. int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
  341. {
  342. int err;
  343. if ((err = snd_cs8427_create(ice->i2c, addr,
  344. (ice->cs8427_timeout * HZ) / 1000,
  345. &ice->cs8427)) < 0) {
  346. snd_printk(KERN_ERR "CS8427 initialization failed\n");
  347. return err;
  348. }
  349. ice->spdif.ops.open = open_cs8427;
  350. ice->spdif.ops.close = close_cs8427;
  351. ice->spdif.ops.setup_rate = setup_cs8427;
  352. return 0;
  353. }
  354. static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
  355. {
  356. /* change CS8427 clock source too */
  357. if (ice->cs8427)
  358. snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
  359. /* notify ak4524 chip as well */
  360. if (spdif_is_master) {
  361. unsigned int i;
  362. for (i = 0; i < ice->akm_codecs; i++) {
  363. if (ice->akm[i].ops.set_rate_val)
  364. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  365. }
  366. }
  367. }
  368. /*
  369. * Interrupt handler
  370. */
  371. static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  372. {
  373. struct snd_ice1712 *ice = dev_id;
  374. unsigned char status;
  375. int handled = 0;
  376. while (1) {
  377. status = inb(ICEREG(ice, IRQSTAT));
  378. if (status == 0)
  379. break;
  380. handled = 1;
  381. if (status & ICE1712_IRQ_MPU1) {
  382. if (ice->rmidi[0])
  383. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
  384. outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
  385. status &= ~ICE1712_IRQ_MPU1;
  386. }
  387. if (status & ICE1712_IRQ_TIMER)
  388. outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
  389. if (status & ICE1712_IRQ_MPU2) {
  390. if (ice->rmidi[1])
  391. snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
  392. outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
  393. status &= ~ICE1712_IRQ_MPU2;
  394. }
  395. if (status & ICE1712_IRQ_PROPCM) {
  396. unsigned char mtstat = inb(ICEMT(ice, IRQ));
  397. if (mtstat & ICE1712_MULTI_PBKSTATUS) {
  398. if (ice->playback_pro_substream)
  399. snd_pcm_period_elapsed(ice->playback_pro_substream);
  400. outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
  401. }
  402. if (mtstat & ICE1712_MULTI_CAPSTATUS) {
  403. if (ice->capture_pro_substream)
  404. snd_pcm_period_elapsed(ice->capture_pro_substream);
  405. outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
  406. }
  407. }
  408. if (status & ICE1712_IRQ_FM)
  409. outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
  410. if (status & ICE1712_IRQ_PBKDS) {
  411. u32 idx;
  412. u16 pbkstatus;
  413. struct snd_pcm_substream *substream;
  414. pbkstatus = inw(ICEDS(ice, INTSTAT));
  415. //printk("pbkstatus = 0x%x\n", pbkstatus);
  416. for (idx = 0; idx < 6; idx++) {
  417. if ((pbkstatus & (3 << (idx * 2))) == 0)
  418. continue;
  419. if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
  420. snd_pcm_period_elapsed(substream);
  421. outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
  422. }
  423. outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
  424. }
  425. if (status & ICE1712_IRQ_CONCAP) {
  426. if (ice->capture_con_substream)
  427. snd_pcm_period_elapsed(ice->capture_con_substream);
  428. outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
  429. }
  430. if (status & ICE1712_IRQ_CONPBK) {
  431. if (ice->playback_con_substream)
  432. snd_pcm_period_elapsed(ice->playback_con_substream);
  433. outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
  434. }
  435. }
  436. return IRQ_RETVAL(handled);
  437. }
  438. /*
  439. * PCM part - misc
  440. */
  441. static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
  442. struct snd_pcm_hw_params *hw_params)
  443. {
  444. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  445. }
  446. static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
  447. {
  448. return snd_pcm_lib_free_pages(substream);
  449. }
  450. /*
  451. * PCM part - consumer I/O
  452. */
  453. static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
  454. int cmd)
  455. {
  456. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  457. int result = 0;
  458. u32 tmp;
  459. spin_lock(&ice->reg_lock);
  460. tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
  461. if (cmd == SNDRV_PCM_TRIGGER_START) {
  462. tmp |= 1;
  463. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  464. tmp &= ~1;
  465. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  466. tmp |= 2;
  467. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  468. tmp &= ~2;
  469. } else {
  470. result = -EINVAL;
  471. }
  472. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  473. spin_unlock(&ice->reg_lock);
  474. return result;
  475. }
  476. static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
  477. int cmd)
  478. {
  479. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  480. int result = 0;
  481. u32 tmp;
  482. spin_lock(&ice->reg_lock);
  483. tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
  484. if (cmd == SNDRV_PCM_TRIGGER_START) {
  485. tmp |= 1;
  486. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  487. tmp &= ~1;
  488. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  489. tmp |= 2;
  490. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  491. tmp &= ~2;
  492. } else {
  493. result = -EINVAL;
  494. }
  495. snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
  496. spin_unlock(&ice->reg_lock);
  497. return result;
  498. }
  499. static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
  500. int cmd)
  501. {
  502. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  503. int result = 0;
  504. u8 tmp;
  505. spin_lock(&ice->reg_lock);
  506. tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
  507. if (cmd == SNDRV_PCM_TRIGGER_START) {
  508. tmp |= 1;
  509. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  510. tmp &= ~1;
  511. } else {
  512. result = -EINVAL;
  513. }
  514. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  515. spin_unlock(&ice->reg_lock);
  516. return result;
  517. }
  518. static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
  519. {
  520. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  521. struct snd_pcm_runtime *runtime = substream->runtime;
  522. u32 period_size, buf_size, rate, tmp;
  523. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  524. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  525. tmp = 0x0000;
  526. if (snd_pcm_format_width(runtime->format) == 16)
  527. tmp |= 0x10;
  528. if (runtime->channels == 2)
  529. tmp |= 0x08;
  530. rate = (runtime->rate * 8192) / 375;
  531. if (rate > 0x000fffff)
  532. rate = 0x000fffff;
  533. spin_lock_irq(&ice->reg_lock);
  534. outb(0, ice->ddma_port + 15);
  535. outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
  536. outl(runtime->dma_addr, ice->ddma_port + 0);
  537. outw(buf_size, ice->ddma_port + 4);
  538. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
  539. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
  540. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
  541. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  542. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
  543. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
  544. snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
  545. snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
  546. spin_unlock_irq(&ice->reg_lock);
  547. return 0;
  548. }
  549. static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
  550. {
  551. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  552. struct snd_pcm_runtime *runtime = substream->runtime;
  553. u32 period_size, buf_size, rate, tmp, chn;
  554. period_size = snd_pcm_lib_period_bytes(substream) - 1;
  555. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  556. tmp = 0x0064;
  557. if (snd_pcm_format_width(runtime->format) == 16)
  558. tmp &= ~0x04;
  559. if (runtime->channels == 2)
  560. tmp |= 0x08;
  561. rate = (runtime->rate * 8192) / 375;
  562. if (rate > 0x000fffff)
  563. rate = 0x000fffff;
  564. ice->playback_con_active_buf[substream->number] = 0;
  565. ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
  566. chn = substream->number * 2;
  567. spin_lock_irq(&ice->reg_lock);
  568. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
  569. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
  570. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
  571. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
  572. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
  573. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
  574. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
  575. if (runtime->channels == 2) {
  576. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
  577. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
  578. }
  579. spin_unlock_irq(&ice->reg_lock);
  580. return 0;
  581. }
  582. static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
  583. {
  584. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  585. struct snd_pcm_runtime *runtime = substream->runtime;
  586. u32 period_size, buf_size;
  587. u8 tmp;
  588. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  589. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  590. tmp = 0x06;
  591. if (snd_pcm_format_width(runtime->format) == 16)
  592. tmp &= ~0x04;
  593. if (runtime->channels == 2)
  594. tmp &= ~0x02;
  595. spin_lock_irq(&ice->reg_lock);
  596. outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
  597. outw(buf_size, ICEREG(ice, CONCAP_COUNT));
  598. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
  599. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
  600. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  601. spin_unlock_irq(&ice->reg_lock);
  602. snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  603. return 0;
  604. }
  605. static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
  606. {
  607. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  608. struct snd_pcm_runtime *runtime = substream->runtime;
  609. size_t ptr;
  610. if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
  611. return 0;
  612. ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
  613. if (ptr == runtime->buffer_size)
  614. ptr = 0;
  615. return bytes_to_frames(substream->runtime, ptr);
  616. }
  617. static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
  618. {
  619. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  620. u8 addr;
  621. size_t ptr;
  622. if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
  623. return 0;
  624. if (ice->playback_con_active_buf[substream->number])
  625. addr = ICE1712_DSC_ADDR1;
  626. else
  627. addr = ICE1712_DSC_ADDR0;
  628. ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
  629. ice->playback_con_virt_addr[substream->number];
  630. if (ptr == substream->runtime->buffer_size)
  631. ptr = 0;
  632. return bytes_to_frames(substream->runtime, ptr);
  633. }
  634. static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
  635. {
  636. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  637. size_t ptr;
  638. if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
  639. return 0;
  640. ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
  641. if (ptr == substream->runtime->buffer_size)
  642. ptr = 0;
  643. return bytes_to_frames(substream->runtime, ptr);
  644. }
  645. static struct snd_pcm_hardware snd_ice1712_playback =
  646. {
  647. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  648. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  649. SNDRV_PCM_INFO_MMAP_VALID |
  650. SNDRV_PCM_INFO_PAUSE),
  651. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  652. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  653. .rate_min = 4000,
  654. .rate_max = 48000,
  655. .channels_min = 1,
  656. .channels_max = 2,
  657. .buffer_bytes_max = (64*1024),
  658. .period_bytes_min = 64,
  659. .period_bytes_max = (64*1024),
  660. .periods_min = 1,
  661. .periods_max = 1024,
  662. .fifo_size = 0,
  663. };
  664. static struct snd_pcm_hardware snd_ice1712_playback_ds =
  665. {
  666. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  667. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  668. SNDRV_PCM_INFO_MMAP_VALID |
  669. SNDRV_PCM_INFO_PAUSE),
  670. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  671. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  672. .rate_min = 4000,
  673. .rate_max = 48000,
  674. .channels_min = 1,
  675. .channels_max = 2,
  676. .buffer_bytes_max = (128*1024),
  677. .period_bytes_min = 64,
  678. .period_bytes_max = (128*1024),
  679. .periods_min = 2,
  680. .periods_max = 2,
  681. .fifo_size = 0,
  682. };
  683. static struct snd_pcm_hardware snd_ice1712_capture =
  684. {
  685. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  686. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  687. SNDRV_PCM_INFO_MMAP_VALID),
  688. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  689. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  690. .rate_min = 4000,
  691. .rate_max = 48000,
  692. .channels_min = 1,
  693. .channels_max = 2,
  694. .buffer_bytes_max = (64*1024),
  695. .period_bytes_min = 64,
  696. .period_bytes_max = (64*1024),
  697. .periods_min = 1,
  698. .periods_max = 1024,
  699. .fifo_size = 0,
  700. };
  701. static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
  702. {
  703. struct snd_pcm_runtime *runtime = substream->runtime;
  704. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  705. ice->playback_con_substream = substream;
  706. runtime->hw = snd_ice1712_playback;
  707. return 0;
  708. }
  709. static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
  710. {
  711. struct snd_pcm_runtime *runtime = substream->runtime;
  712. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  713. u32 tmp;
  714. ice->playback_con_substream_ds[substream->number] = substream;
  715. runtime->hw = snd_ice1712_playback_ds;
  716. spin_lock_irq(&ice->reg_lock);
  717. tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
  718. outw(tmp, ICEDS(ice, INTMASK));
  719. spin_unlock_irq(&ice->reg_lock);
  720. return 0;
  721. }
  722. static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
  723. {
  724. struct snd_pcm_runtime *runtime = substream->runtime;
  725. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  726. ice->capture_con_substream = substream;
  727. runtime->hw = snd_ice1712_capture;
  728. runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
  729. if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
  730. runtime->hw.rate_min = 48000;
  731. return 0;
  732. }
  733. static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
  734. {
  735. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  736. ice->playback_con_substream = NULL;
  737. return 0;
  738. }
  739. static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
  740. {
  741. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  742. u32 tmp;
  743. spin_lock_irq(&ice->reg_lock);
  744. tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
  745. outw(tmp, ICEDS(ice, INTMASK));
  746. spin_unlock_irq(&ice->reg_lock);
  747. ice->playback_con_substream_ds[substream->number] = NULL;
  748. return 0;
  749. }
  750. static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
  751. {
  752. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  753. ice->capture_con_substream = NULL;
  754. return 0;
  755. }
  756. static struct snd_pcm_ops snd_ice1712_playback_ops = {
  757. .open = snd_ice1712_playback_open,
  758. .close = snd_ice1712_playback_close,
  759. .ioctl = snd_pcm_lib_ioctl,
  760. .hw_params = snd_ice1712_hw_params,
  761. .hw_free = snd_ice1712_hw_free,
  762. .prepare = snd_ice1712_playback_prepare,
  763. .trigger = snd_ice1712_playback_trigger,
  764. .pointer = snd_ice1712_playback_pointer,
  765. };
  766. static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
  767. .open = snd_ice1712_playback_ds_open,
  768. .close = snd_ice1712_playback_ds_close,
  769. .ioctl = snd_pcm_lib_ioctl,
  770. .hw_params = snd_ice1712_hw_params,
  771. .hw_free = snd_ice1712_hw_free,
  772. .prepare = snd_ice1712_playback_ds_prepare,
  773. .trigger = snd_ice1712_playback_ds_trigger,
  774. .pointer = snd_ice1712_playback_ds_pointer,
  775. };
  776. static struct snd_pcm_ops snd_ice1712_capture_ops = {
  777. .open = snd_ice1712_capture_open,
  778. .close = snd_ice1712_capture_close,
  779. .ioctl = snd_pcm_lib_ioctl,
  780. .hw_params = snd_ice1712_hw_params,
  781. .hw_free = snd_ice1712_hw_free,
  782. .prepare = snd_ice1712_capture_prepare,
  783. .trigger = snd_ice1712_capture_trigger,
  784. .pointer = snd_ice1712_capture_pointer,
  785. };
  786. static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  787. {
  788. struct snd_pcm *pcm;
  789. int err;
  790. if (rpcm)
  791. *rpcm = NULL;
  792. err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
  793. if (err < 0)
  794. return err;
  795. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
  796. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
  797. pcm->private_data = ice;
  798. pcm->info_flags = 0;
  799. strcpy(pcm->name, "ICE1712 consumer");
  800. ice->pcm = pcm;
  801. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  802. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  803. if (rpcm)
  804. *rpcm = pcm;
  805. printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
  806. return 0;
  807. }
  808. static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  809. {
  810. struct snd_pcm *pcm;
  811. int err;
  812. if (rpcm)
  813. *rpcm = NULL;
  814. err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
  815. if (err < 0)
  816. return err;
  817. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
  818. pcm->private_data = ice;
  819. pcm->info_flags = 0;
  820. strcpy(pcm->name, "ICE1712 consumer (DS)");
  821. ice->pcm_ds = pcm;
  822. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  823. snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
  824. if (rpcm)
  825. *rpcm = pcm;
  826. return 0;
  827. }
  828. /*
  829. * PCM code - professional part (multitrack)
  830. */
  831. static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  832. 32000, 44100, 48000, 64000, 88200, 96000 };
  833. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  834. .count = ARRAY_SIZE(rates),
  835. .list = rates,
  836. .mask = 0,
  837. };
  838. static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
  839. int cmd)
  840. {
  841. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  842. switch (cmd) {
  843. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  844. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  845. {
  846. unsigned int what;
  847. unsigned int old;
  848. if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
  849. return -EINVAL;
  850. what = ICE1712_PLAYBACK_PAUSE;
  851. snd_pcm_trigger_done(substream, substream);
  852. spin_lock(&ice->reg_lock);
  853. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  854. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  855. old |= what;
  856. else
  857. old &= ~what;
  858. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  859. spin_unlock(&ice->reg_lock);
  860. break;
  861. }
  862. case SNDRV_PCM_TRIGGER_START:
  863. case SNDRV_PCM_TRIGGER_STOP:
  864. {
  865. unsigned int what = 0;
  866. unsigned int old;
  867. struct list_head *pos;
  868. struct snd_pcm_substream *s;
  869. snd_pcm_group_for_each(pos, substream) {
  870. s = snd_pcm_group_substream_entry(pos);
  871. if (s == ice->playback_pro_substream) {
  872. what |= ICE1712_PLAYBACK_START;
  873. snd_pcm_trigger_done(s, substream);
  874. } else if (s == ice->capture_pro_substream) {
  875. what |= ICE1712_CAPTURE_START_SHADOW;
  876. snd_pcm_trigger_done(s, substream);
  877. }
  878. }
  879. spin_lock(&ice->reg_lock);
  880. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  881. if (cmd == SNDRV_PCM_TRIGGER_START)
  882. old |= what;
  883. else
  884. old &= ~what;
  885. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  886. spin_unlock(&ice->reg_lock);
  887. break;
  888. }
  889. default:
  890. return -EINVAL;
  891. }
  892. return 0;
  893. }
  894. /*
  895. */
  896. static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
  897. {
  898. unsigned long flags;
  899. unsigned char val, old;
  900. unsigned int i;
  901. switch (rate) {
  902. case 8000: val = 6; break;
  903. case 9600: val = 3; break;
  904. case 11025: val = 10; break;
  905. case 12000: val = 2; break;
  906. case 16000: val = 5; break;
  907. case 22050: val = 9; break;
  908. case 24000: val = 1; break;
  909. case 32000: val = 4; break;
  910. case 44100: val = 8; break;
  911. case 48000: val = 0; break;
  912. case 64000: val = 15; break;
  913. case 88200: val = 11; break;
  914. case 96000: val = 7; break;
  915. default:
  916. snd_BUG();
  917. val = 0;
  918. rate = 48000;
  919. break;
  920. }
  921. spin_lock_irqsave(&ice->reg_lock, flags);
  922. if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
  923. ICE1712_PLAYBACK_PAUSE|
  924. ICE1712_PLAYBACK_START)) {
  925. __out:
  926. spin_unlock_irqrestore(&ice->reg_lock, flags);
  927. return;
  928. }
  929. if (!force && is_pro_rate_locked(ice))
  930. goto __out;
  931. old = inb(ICEMT(ice, RATE));
  932. if (!force && old == val)
  933. goto __out;
  934. outb(val, ICEMT(ice, RATE));
  935. spin_unlock_irqrestore(&ice->reg_lock, flags);
  936. if (ice->gpio.set_pro_rate)
  937. ice->gpio.set_pro_rate(ice, rate);
  938. for (i = 0; i < ice->akm_codecs; i++) {
  939. if (ice->akm[i].ops.set_rate_val)
  940. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  941. }
  942. if (ice->spdif.ops.setup_rate)
  943. ice->spdif.ops.setup_rate(ice, rate);
  944. }
  945. static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
  946. {
  947. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  948. ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
  949. spin_lock_irq(&ice->reg_lock);
  950. outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
  951. outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
  952. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
  953. spin_unlock_irq(&ice->reg_lock);
  954. return 0;
  955. }
  956. static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
  957. struct snd_pcm_hw_params *hw_params)
  958. {
  959. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  960. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  961. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  962. }
  963. static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
  964. {
  965. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  966. ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
  967. spin_lock_irq(&ice->reg_lock);
  968. outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
  969. outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
  970. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
  971. spin_unlock_irq(&ice->reg_lock);
  972. return 0;
  973. }
  974. static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
  975. struct snd_pcm_hw_params *hw_params)
  976. {
  977. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  978. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  979. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  980. }
  981. static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
  982. {
  983. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  984. size_t ptr;
  985. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
  986. return 0;
  987. ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
  988. if (ptr == substream->runtime->buffer_size)
  989. ptr = 0;
  990. return bytes_to_frames(substream->runtime, ptr);
  991. }
  992. static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
  993. {
  994. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  995. size_t ptr;
  996. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
  997. return 0;
  998. ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
  999. if (ptr == substream->runtime->buffer_size)
  1000. ptr = 0;
  1001. return bytes_to_frames(substream->runtime, ptr);
  1002. }
  1003. static struct snd_pcm_hardware snd_ice1712_playback_pro =
  1004. {
  1005. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1006. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1007. SNDRV_PCM_INFO_MMAP_VALID |
  1008. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1009. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1010. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1011. .rate_min = 4000,
  1012. .rate_max = 96000,
  1013. .channels_min = 10,
  1014. .channels_max = 10,
  1015. .buffer_bytes_max = (256*1024),
  1016. .period_bytes_min = 10 * 4 * 2,
  1017. .period_bytes_max = 131040,
  1018. .periods_min = 1,
  1019. .periods_max = 1024,
  1020. .fifo_size = 0,
  1021. };
  1022. static struct snd_pcm_hardware snd_ice1712_capture_pro =
  1023. {
  1024. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1025. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1026. SNDRV_PCM_INFO_MMAP_VALID |
  1027. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1028. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1029. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1030. .rate_min = 4000,
  1031. .rate_max = 96000,
  1032. .channels_min = 12,
  1033. .channels_max = 12,
  1034. .buffer_bytes_max = (256*1024),
  1035. .period_bytes_min = 12 * 4 * 2,
  1036. .period_bytes_max = 131040,
  1037. .periods_min = 1,
  1038. .periods_max = 1024,
  1039. .fifo_size = 0,
  1040. };
  1041. static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
  1042. {
  1043. struct snd_pcm_runtime *runtime = substream->runtime;
  1044. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1045. ice->playback_pro_substream = substream;
  1046. runtime->hw = snd_ice1712_playback_pro;
  1047. snd_pcm_set_sync(substream);
  1048. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1049. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1050. if (ice->spdif.ops.open)
  1051. ice->spdif.ops.open(ice, substream);
  1052. return 0;
  1053. }
  1054. static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
  1055. {
  1056. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1057. struct snd_pcm_runtime *runtime = substream->runtime;
  1058. ice->capture_pro_substream = substream;
  1059. runtime->hw = snd_ice1712_capture_pro;
  1060. snd_pcm_set_sync(substream);
  1061. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1062. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1063. return 0;
  1064. }
  1065. static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
  1066. {
  1067. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1068. if (PRO_RATE_RESET)
  1069. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1070. ice->playback_pro_substream = NULL;
  1071. if (ice->spdif.ops.close)
  1072. ice->spdif.ops.close(ice, substream);
  1073. return 0;
  1074. }
  1075. static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
  1076. {
  1077. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1078. if (PRO_RATE_RESET)
  1079. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1080. ice->capture_pro_substream = NULL;
  1081. return 0;
  1082. }
  1083. static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
  1084. .open = snd_ice1712_playback_pro_open,
  1085. .close = snd_ice1712_playback_pro_close,
  1086. .ioctl = snd_pcm_lib_ioctl,
  1087. .hw_params = snd_ice1712_playback_pro_hw_params,
  1088. .hw_free = snd_ice1712_hw_free,
  1089. .prepare = snd_ice1712_playback_pro_prepare,
  1090. .trigger = snd_ice1712_pro_trigger,
  1091. .pointer = snd_ice1712_playback_pro_pointer,
  1092. };
  1093. static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
  1094. .open = snd_ice1712_capture_pro_open,
  1095. .close = snd_ice1712_capture_pro_close,
  1096. .ioctl = snd_pcm_lib_ioctl,
  1097. .hw_params = snd_ice1712_capture_pro_hw_params,
  1098. .hw_free = snd_ice1712_hw_free,
  1099. .prepare = snd_ice1712_capture_pro_prepare,
  1100. .trigger = snd_ice1712_pro_trigger,
  1101. .pointer = snd_ice1712_capture_pro_pointer,
  1102. };
  1103. static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  1104. {
  1105. struct snd_pcm *pcm;
  1106. int err;
  1107. if (rpcm)
  1108. *rpcm = NULL;
  1109. err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
  1110. if (err < 0)
  1111. return err;
  1112. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
  1113. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
  1114. pcm->private_data = ice;
  1115. pcm->info_flags = 0;
  1116. strcpy(pcm->name, "ICE1712 multi");
  1117. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1118. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  1119. ice->pcm_pro = pcm;
  1120. if (rpcm)
  1121. *rpcm = pcm;
  1122. if (ice->cs8427) {
  1123. /* assign channels to iec958 */
  1124. err = snd_cs8427_iec958_build(ice->cs8427,
  1125. pcm->streams[0].substream,
  1126. pcm->streams[1].substream);
  1127. if (err < 0)
  1128. return err;
  1129. }
  1130. if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
  1131. return err;
  1132. return 0;
  1133. }
  1134. /*
  1135. * Mixer section
  1136. */
  1137. static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
  1138. {
  1139. unsigned int vol = ice->pro_volumes[index];
  1140. unsigned short val = 0;
  1141. val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
  1142. val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
  1143. outb(index, ICEMT(ice, MONITOR_INDEX));
  1144. outw(val, ICEMT(ice, MONITOR_VOLUME));
  1145. }
  1146. static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1147. {
  1148. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1149. uinfo->count = 2;
  1150. uinfo->value.integer.min = 0;
  1151. uinfo->value.integer.max = 1;
  1152. return 0;
  1153. }
  1154. static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1155. {
  1156. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1157. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1158. spin_lock_irq(&ice->reg_lock);
  1159. ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
  1160. ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
  1161. spin_unlock_irq(&ice->reg_lock);
  1162. return 0;
  1163. }
  1164. static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1165. {
  1166. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1167. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1168. unsigned int nval, change;
  1169. nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
  1170. (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
  1171. spin_lock_irq(&ice->reg_lock);
  1172. nval |= ice->pro_volumes[index] & ~0x80008000;
  1173. change = nval != ice->pro_volumes[index];
  1174. ice->pro_volumes[index] = nval;
  1175. snd_ice1712_update_volume(ice, index);
  1176. spin_unlock_irq(&ice->reg_lock);
  1177. return change;
  1178. }
  1179. static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1180. {
  1181. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1182. uinfo->count = 2;
  1183. uinfo->value.integer.min = 0;
  1184. uinfo->value.integer.max = 96;
  1185. return 0;
  1186. }
  1187. static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1188. {
  1189. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1190. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1191. spin_lock_irq(&ice->reg_lock);
  1192. ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
  1193. ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
  1194. spin_unlock_irq(&ice->reg_lock);
  1195. return 0;
  1196. }
  1197. static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1198. {
  1199. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1200. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1201. unsigned int nval, change;
  1202. nval = (ucontrol->value.integer.value[0] & 127) |
  1203. ((ucontrol->value.integer.value[1] & 127) << 16);
  1204. spin_lock_irq(&ice->reg_lock);
  1205. nval |= ice->pro_volumes[index] & ~0x007f007f;
  1206. change = nval != ice->pro_volumes[index];
  1207. ice->pro_volumes[index] = nval;
  1208. snd_ice1712_update_volume(ice, index);
  1209. spin_unlock_irq(&ice->reg_lock);
  1210. return change;
  1211. }
  1212. static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
  1213. {
  1214. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1215. .name = "Multi Playback Switch",
  1216. .info = snd_ice1712_pro_mixer_switch_info,
  1217. .get = snd_ice1712_pro_mixer_switch_get,
  1218. .put = snd_ice1712_pro_mixer_switch_put,
  1219. .private_value = 0,
  1220. .count = 10,
  1221. },
  1222. {
  1223. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1224. .name = "Multi Playback Volume",
  1225. .info = snd_ice1712_pro_mixer_volume_info,
  1226. .get = snd_ice1712_pro_mixer_volume_get,
  1227. .put = snd_ice1712_pro_mixer_volume_put,
  1228. .private_value = 0,
  1229. .count = 10,
  1230. },
  1231. };
  1232. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
  1233. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1234. .name = "H/W Multi Capture Switch",
  1235. .info = snd_ice1712_pro_mixer_switch_info,
  1236. .get = snd_ice1712_pro_mixer_switch_get,
  1237. .put = snd_ice1712_pro_mixer_switch_put,
  1238. .private_value = 10,
  1239. };
  1240. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
  1241. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1242. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
  1243. .info = snd_ice1712_pro_mixer_switch_info,
  1244. .get = snd_ice1712_pro_mixer_switch_get,
  1245. .put = snd_ice1712_pro_mixer_switch_put,
  1246. .private_value = 18,
  1247. .count = 2,
  1248. };
  1249. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
  1250. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1251. .name = "H/W Multi Capture Volume",
  1252. .info = snd_ice1712_pro_mixer_volume_info,
  1253. .get = snd_ice1712_pro_mixer_volume_get,
  1254. .put = snd_ice1712_pro_mixer_volume_put,
  1255. .private_value = 10,
  1256. };
  1257. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
  1258. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1259. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
  1260. .info = snd_ice1712_pro_mixer_volume_info,
  1261. .get = snd_ice1712_pro_mixer_volume_get,
  1262. .put = snd_ice1712_pro_mixer_volume_put,
  1263. .private_value = 18,
  1264. .count = 2,
  1265. };
  1266. static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
  1267. {
  1268. struct snd_card *card = ice->card;
  1269. unsigned int idx;
  1270. int err;
  1271. /* multi-channel mixer */
  1272. for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
  1273. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
  1274. if (err < 0)
  1275. return err;
  1276. }
  1277. if (ice->num_total_adcs > 0) {
  1278. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
  1279. tmp.count = ice->num_total_adcs;
  1280. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1281. if (err < 0)
  1282. return err;
  1283. }
  1284. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
  1285. if (err < 0)
  1286. return err;
  1287. if (ice->num_total_adcs > 0) {
  1288. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
  1289. tmp.count = ice->num_total_adcs;
  1290. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1291. if (err < 0)
  1292. return err;
  1293. }
  1294. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
  1295. if (err < 0)
  1296. return err;
  1297. /* initialize volumes */
  1298. for (idx = 0; idx < 10; idx++) {
  1299. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1300. snd_ice1712_update_volume(ice, idx);
  1301. }
  1302. for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
  1303. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1304. snd_ice1712_update_volume(ice, idx);
  1305. }
  1306. for (idx = 18; idx < 20; idx++) {
  1307. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1308. snd_ice1712_update_volume(ice, idx);
  1309. }
  1310. return 0;
  1311. }
  1312. static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
  1313. {
  1314. struct snd_ice1712 *ice = ac97->private_data;
  1315. ice->ac97 = NULL;
  1316. }
  1317. static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
  1318. {
  1319. int err, bus_num = 0;
  1320. struct snd_ac97_template ac97;
  1321. struct snd_ac97_bus *pbus;
  1322. static struct snd_ac97_bus_ops con_ops = {
  1323. .write = snd_ice1712_ac97_write,
  1324. .read = snd_ice1712_ac97_read,
  1325. };
  1326. static struct snd_ac97_bus_ops pro_ops = {
  1327. .write = snd_ice1712_pro_ac97_write,
  1328. .read = snd_ice1712_pro_ac97_read,
  1329. };
  1330. if (ice_has_con_ac97(ice)) {
  1331. if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
  1332. return err;
  1333. memset(&ac97, 0, sizeof(ac97));
  1334. ac97.private_data = ice;
  1335. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1336. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1337. printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
  1338. else {
  1339. if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
  1340. return err;
  1341. return 0;
  1342. }
  1343. }
  1344. if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
  1345. if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
  1346. return err;
  1347. memset(&ac97, 0, sizeof(ac97));
  1348. ac97.private_data = ice;
  1349. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1350. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1351. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1352. else
  1353. return 0;
  1354. }
  1355. /* I2S mixer only */
  1356. strcat(ice->card->mixername, "ICE1712 - multitrack");
  1357. return 0;
  1358. }
  1359. /*
  1360. *
  1361. */
  1362. static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
  1363. {
  1364. return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
  1365. }
  1366. static void snd_ice1712_proc_read(struct snd_info_entry *entry,
  1367. struct snd_info_buffer *buffer)
  1368. {
  1369. struct snd_ice1712 *ice = entry->private_data;
  1370. unsigned int idx;
  1371. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1372. snd_iprintf(buffer, "EEPROM:\n");
  1373. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1374. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1375. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1376. snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
  1377. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
  1378. snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
  1379. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
  1380. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1381. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1382. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1383. snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
  1384. snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
  1385. snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
  1386. snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
  1387. for (idx = 0; idx < 4; idx++)
  1388. snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
  1389. for (idx = 0; idx < 4; idx++)
  1390. snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
  1391. for (idx = 0x1c; idx < ice->eeprom.size; idx++)
  1392. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1393. snd_iprintf(buffer, "\nRegisters:\n");
  1394. snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
  1395. snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
  1396. snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
  1397. snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
  1398. snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
  1399. snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
  1400. snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
  1401. }
  1402. static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
  1403. {
  1404. struct snd_info_entry *entry;
  1405. if (! snd_card_proc_new(ice->card, "ice1712", &entry))
  1406. snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
  1407. }
  1408. /*
  1409. *
  1410. */
  1411. static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
  1412. struct snd_ctl_elem_info *uinfo)
  1413. {
  1414. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1415. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1416. return 0;
  1417. }
  1418. static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
  1419. struct snd_ctl_elem_value *ucontrol)
  1420. {
  1421. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1422. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1423. return 0;
  1424. }
  1425. static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
  1426. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1427. .name = "ICE1712 EEPROM",
  1428. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1429. .info = snd_ice1712_eeprom_info,
  1430. .get = snd_ice1712_eeprom_get
  1431. };
  1432. /*
  1433. */
  1434. static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
  1435. struct snd_ctl_elem_info *uinfo)
  1436. {
  1437. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1438. uinfo->count = 1;
  1439. return 0;
  1440. }
  1441. static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
  1442. struct snd_ctl_elem_value *ucontrol)
  1443. {
  1444. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1445. if (ice->spdif.ops.default_get)
  1446. ice->spdif.ops.default_get(ice, ucontrol);
  1447. return 0;
  1448. }
  1449. static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
  1450. struct snd_ctl_elem_value *ucontrol)
  1451. {
  1452. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1453. if (ice->spdif.ops.default_put)
  1454. return ice->spdif.ops.default_put(ice, ucontrol);
  1455. return 0;
  1456. }
  1457. static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
  1458. {
  1459. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1460. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1461. .info = snd_ice1712_spdif_info,
  1462. .get = snd_ice1712_spdif_default_get,
  1463. .put = snd_ice1712_spdif_default_put
  1464. };
  1465. static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1466. struct snd_ctl_elem_value *ucontrol)
  1467. {
  1468. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1469. if (ice->spdif.ops.default_get) {
  1470. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1471. IEC958_AES0_PROFESSIONAL |
  1472. IEC958_AES0_CON_NOT_COPYRIGHT |
  1473. IEC958_AES0_CON_EMPHASIS;
  1474. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1475. IEC958_AES1_CON_CATEGORY;
  1476. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1477. } else {
  1478. ucontrol->value.iec958.status[0] = 0xff;
  1479. ucontrol->value.iec958.status[1] = 0xff;
  1480. ucontrol->value.iec958.status[2] = 0xff;
  1481. ucontrol->value.iec958.status[3] = 0xff;
  1482. ucontrol->value.iec958.status[4] = 0xff;
  1483. }
  1484. return 0;
  1485. }
  1486. static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1487. struct snd_ctl_elem_value *ucontrol)
  1488. {
  1489. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1490. if (ice->spdif.ops.default_get) {
  1491. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1492. IEC958_AES0_PROFESSIONAL |
  1493. IEC958_AES0_PRO_FS |
  1494. IEC958_AES0_PRO_EMPHASIS;
  1495. ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
  1496. } else {
  1497. ucontrol->value.iec958.status[0] = 0xff;
  1498. ucontrol->value.iec958.status[1] = 0xff;
  1499. ucontrol->value.iec958.status[2] = 0xff;
  1500. ucontrol->value.iec958.status[3] = 0xff;
  1501. ucontrol->value.iec958.status[4] = 0xff;
  1502. }
  1503. return 0;
  1504. }
  1505. static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
  1506. {
  1507. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1508. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1509. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1510. .info = snd_ice1712_spdif_info,
  1511. .get = snd_ice1712_spdif_maskc_get,
  1512. };
  1513. static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
  1514. {
  1515. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1516. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1517. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1518. .info = snd_ice1712_spdif_info,
  1519. .get = snd_ice1712_spdif_maskp_get,
  1520. };
  1521. static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1522. struct snd_ctl_elem_value *ucontrol)
  1523. {
  1524. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1525. if (ice->spdif.ops.stream_get)
  1526. ice->spdif.ops.stream_get(ice, ucontrol);
  1527. return 0;
  1528. }
  1529. static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1530. struct snd_ctl_elem_value *ucontrol)
  1531. {
  1532. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1533. if (ice->spdif.ops.stream_put)
  1534. return ice->spdif.ops.stream_put(ice, ucontrol);
  1535. return 0;
  1536. }
  1537. static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
  1538. {
  1539. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1540. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  1541. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1542. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1543. .info = snd_ice1712_spdif_info,
  1544. .get = snd_ice1712_spdif_stream_get,
  1545. .put = snd_ice1712_spdif_stream_put
  1546. };
  1547. int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
  1548. struct snd_ctl_elem_info *uinfo)
  1549. {
  1550. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1551. uinfo->count = 1;
  1552. uinfo->value.integer.min = 0;
  1553. uinfo->value.integer.max = 1;
  1554. return 0;
  1555. }
  1556. int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
  1557. struct snd_ctl_elem_value *ucontrol)
  1558. {
  1559. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1560. unsigned char mask = kcontrol->private_value & 0xff;
  1561. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1562. snd_ice1712_save_gpio_status(ice);
  1563. ucontrol->value.integer.value[0] =
  1564. (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
  1565. snd_ice1712_restore_gpio_status(ice);
  1566. return 0;
  1567. }
  1568. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1569. struct snd_ctl_elem_value *ucontrol)
  1570. {
  1571. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1572. unsigned char mask = kcontrol->private_value & 0xff;
  1573. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1574. unsigned int val, nval;
  1575. if (kcontrol->private_value & (1 << 31))
  1576. return -EPERM;
  1577. nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
  1578. snd_ice1712_save_gpio_status(ice);
  1579. val = snd_ice1712_gpio_read(ice);
  1580. nval |= val & ~mask;
  1581. if (val != nval)
  1582. snd_ice1712_gpio_write(ice, nval);
  1583. snd_ice1712_restore_gpio_status(ice);
  1584. return val != nval;
  1585. }
  1586. /*
  1587. * rate
  1588. */
  1589. static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1590. struct snd_ctl_elem_info *uinfo)
  1591. {
  1592. static char *texts[] = {
  1593. "8000", /* 0: 6 */
  1594. "9600", /* 1: 3 */
  1595. "11025", /* 2: 10 */
  1596. "12000", /* 3: 2 */
  1597. "16000", /* 4: 5 */
  1598. "22050", /* 5: 9 */
  1599. "24000", /* 6: 1 */
  1600. "32000", /* 7: 4 */
  1601. "44100", /* 8: 8 */
  1602. "48000", /* 9: 0 */
  1603. "64000", /* 10: 15 */
  1604. "88200", /* 11: 11 */
  1605. "96000", /* 12: 7 */
  1606. "IEC958 Input", /* 13: -- */
  1607. };
  1608. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1609. uinfo->count = 1;
  1610. uinfo->value.enumerated.items = 14;
  1611. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1612. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1613. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1614. return 0;
  1615. }
  1616. static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1617. struct snd_ctl_elem_value *ucontrol)
  1618. {
  1619. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1620. static unsigned char xlate[16] = {
  1621. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
  1622. };
  1623. unsigned char val;
  1624. spin_lock_irq(&ice->reg_lock);
  1625. if (is_spdif_master(ice)) {
  1626. ucontrol->value.enumerated.item[0] = 13;
  1627. } else {
  1628. val = xlate[inb(ICEMT(ice, RATE)) & 15];
  1629. if (val == 255) {
  1630. snd_BUG();
  1631. val = 0;
  1632. }
  1633. ucontrol->value.enumerated.item[0] = val;
  1634. }
  1635. spin_unlock_irq(&ice->reg_lock);
  1636. return 0;
  1637. }
  1638. static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1639. struct snd_ctl_elem_value *ucontrol)
  1640. {
  1641. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1642. static unsigned int xrate[13] = {
  1643. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1644. 32000, 44100, 48000, 64000, 88200, 96000
  1645. };
  1646. unsigned char oval;
  1647. int change = 0;
  1648. spin_lock_irq(&ice->reg_lock);
  1649. oval = inb(ICEMT(ice, RATE));
  1650. if (ucontrol->value.enumerated.item[0] == 13) {
  1651. outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
  1652. } else {
  1653. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1654. spin_unlock_irq(&ice->reg_lock);
  1655. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1656. spin_lock_irq(&ice->reg_lock);
  1657. }
  1658. change = inb(ICEMT(ice, RATE)) != oval;
  1659. spin_unlock_irq(&ice->reg_lock);
  1660. if ((oval & ICE1712_SPDIF_MASTER) !=
  1661. (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
  1662. snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
  1663. return change;
  1664. }
  1665. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
  1666. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1667. .name = "Multi Track Internal Clock",
  1668. .info = snd_ice1712_pro_internal_clock_info,
  1669. .get = snd_ice1712_pro_internal_clock_get,
  1670. .put = snd_ice1712_pro_internal_clock_put
  1671. };
  1672. static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
  1673. struct snd_ctl_elem_info *uinfo)
  1674. {
  1675. static char *texts[] = {
  1676. "8000", /* 0: 6 */
  1677. "9600", /* 1: 3 */
  1678. "11025", /* 2: 10 */
  1679. "12000", /* 3: 2 */
  1680. "16000", /* 4: 5 */
  1681. "22050", /* 5: 9 */
  1682. "24000", /* 6: 1 */
  1683. "32000", /* 7: 4 */
  1684. "44100", /* 8: 8 */
  1685. "48000", /* 9: 0 */
  1686. "64000", /* 10: 15 */
  1687. "88200", /* 11: 11 */
  1688. "96000", /* 12: 7 */
  1689. // "IEC958 Input", /* 13: -- */
  1690. };
  1691. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1692. uinfo->count = 1;
  1693. uinfo->value.enumerated.items = 13;
  1694. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1695. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1696. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1697. return 0;
  1698. }
  1699. static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
  1700. struct snd_ctl_elem_value *ucontrol)
  1701. {
  1702. int val;
  1703. static unsigned int xrate[13] = {
  1704. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1705. 32000, 44100, 48000, 64000, 88200, 96000
  1706. };
  1707. for (val = 0; val < 13; val++) {
  1708. if (xrate[val] == PRO_RATE_DEFAULT)
  1709. break;
  1710. }
  1711. ucontrol->value.enumerated.item[0] = val;
  1712. return 0;
  1713. }
  1714. static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
  1715. struct snd_ctl_elem_value *ucontrol)
  1716. {
  1717. static unsigned int xrate[13] = {
  1718. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1719. 32000, 44100, 48000, 64000, 88200, 96000
  1720. };
  1721. unsigned char oval;
  1722. int change = 0;
  1723. oval = PRO_RATE_DEFAULT;
  1724. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1725. change = PRO_RATE_DEFAULT != oval;
  1726. return change;
  1727. }
  1728. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
  1729. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1730. .name = "Multi Track Internal Clock Default",
  1731. .info = snd_ice1712_pro_internal_clock_default_info,
  1732. .get = snd_ice1712_pro_internal_clock_default_get,
  1733. .put = snd_ice1712_pro_internal_clock_default_put
  1734. };
  1735. static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
  1736. struct snd_ctl_elem_info *uinfo)
  1737. {
  1738. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1739. uinfo->count = 1;
  1740. uinfo->value.integer.min = 0;
  1741. uinfo->value.integer.max = 1;
  1742. return 0;
  1743. }
  1744. static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1745. struct snd_ctl_elem_value *ucontrol)
  1746. {
  1747. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1748. return 0;
  1749. }
  1750. static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1751. struct snd_ctl_elem_value *ucontrol)
  1752. {
  1753. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1754. int change = 0, nval;
  1755. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1756. spin_lock_irq(&ice->reg_lock);
  1757. change = PRO_RATE_LOCKED != nval;
  1758. PRO_RATE_LOCKED = nval;
  1759. spin_unlock_irq(&ice->reg_lock);
  1760. return change;
  1761. }
  1762. static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
  1763. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1764. .name = "Multi Track Rate Locking",
  1765. .info = snd_ice1712_pro_rate_locking_info,
  1766. .get = snd_ice1712_pro_rate_locking_get,
  1767. .put = snd_ice1712_pro_rate_locking_put
  1768. };
  1769. static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
  1770. struct snd_ctl_elem_info *uinfo)
  1771. {
  1772. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1773. uinfo->count = 1;
  1774. uinfo->value.integer.min = 0;
  1775. uinfo->value.integer.max = 1;
  1776. return 0;
  1777. }
  1778. static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1779. struct snd_ctl_elem_value *ucontrol)
  1780. {
  1781. ucontrol->value.integer.value[0] = PRO_RATE_RESET;
  1782. return 0;
  1783. }
  1784. static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1785. struct snd_ctl_elem_value *ucontrol)
  1786. {
  1787. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1788. int change = 0, nval;
  1789. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1790. spin_lock_irq(&ice->reg_lock);
  1791. change = PRO_RATE_RESET != nval;
  1792. PRO_RATE_RESET = nval;
  1793. spin_unlock_irq(&ice->reg_lock);
  1794. return change;
  1795. }
  1796. static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
  1797. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1798. .name = "Multi Track Rate Reset",
  1799. .info = snd_ice1712_pro_rate_reset_info,
  1800. .get = snd_ice1712_pro_rate_reset_get,
  1801. .put = snd_ice1712_pro_rate_reset_put
  1802. };
  1803. /*
  1804. * routing
  1805. */
  1806. static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
  1807. struct snd_ctl_elem_info *uinfo)
  1808. {
  1809. static char *texts[] = {
  1810. "PCM Out", /* 0 */
  1811. "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
  1812. "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
  1813. "IEC958 In L", "IEC958 In R", /* 9-10 */
  1814. "Digital Mixer", /* 11 - optional */
  1815. };
  1816. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1817. uinfo->count = 1;
  1818. uinfo->value.enumerated.items =
  1819. snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
  1820. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1821. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1822. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1823. return 0;
  1824. }
  1825. static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1826. struct snd_ctl_elem_value *ucontrol)
  1827. {
  1828. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1829. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1830. unsigned int val, cval;
  1831. spin_lock_irq(&ice->reg_lock);
  1832. val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1833. cval = inl(ICEMT(ice, ROUTE_CAPTURE));
  1834. spin_unlock_irq(&ice->reg_lock);
  1835. val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
  1836. val &= 3;
  1837. cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
  1838. if (val == 1 && idx < 2)
  1839. ucontrol->value.enumerated.item[0] = 11;
  1840. else if (val == 2)
  1841. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1842. else if (val == 3)
  1843. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1844. else
  1845. ucontrol->value.enumerated.item[0] = 0;
  1846. return 0;
  1847. }
  1848. static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1849. struct snd_ctl_elem_value *ucontrol)
  1850. {
  1851. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1852. int change, shift;
  1853. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1854. unsigned int val, old_val, nval;
  1855. /* update PSDOUT */
  1856. if (ucontrol->value.enumerated.item[0] >= 11)
  1857. nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
  1858. else if (ucontrol->value.enumerated.item[0] >= 9)
  1859. nval = 3; /* spdif in */
  1860. else if (ucontrol->value.enumerated.item[0] >= 1)
  1861. nval = 2; /* analog in */
  1862. else
  1863. nval = 0; /* pcm */
  1864. shift = ((idx % 2) * 8) + ((idx / 2) * 2);
  1865. spin_lock_irq(&ice->reg_lock);
  1866. val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1867. val &= ~(0x03 << shift);
  1868. val |= nval << shift;
  1869. change = val != old_val;
  1870. if (change)
  1871. outw(val, ICEMT(ice, ROUTE_PSDOUT03));
  1872. spin_unlock_irq(&ice->reg_lock);
  1873. if (nval < 2) /* dig mixer of pcm */
  1874. return change;
  1875. /* update CAPTURE */
  1876. spin_lock_irq(&ice->reg_lock);
  1877. val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
  1878. shift = ((idx / 2) * 8) + ((idx % 2) * 4);
  1879. if (nval == 2) { /* analog in */
  1880. nval = ucontrol->value.enumerated.item[0] - 1;
  1881. val &= ~(0x07 << shift);
  1882. val |= nval << shift;
  1883. } else { /* spdif in */
  1884. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1885. val &= ~(0x08 << shift);
  1886. val |= nval << shift;
  1887. }
  1888. if (val != old_val) {
  1889. change = 1;
  1890. outl(val, ICEMT(ice, ROUTE_CAPTURE));
  1891. }
  1892. spin_unlock_irq(&ice->reg_lock);
  1893. return change;
  1894. }
  1895. static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1896. struct snd_ctl_elem_value *ucontrol)
  1897. {
  1898. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1899. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1900. unsigned int val, cval;
  1901. val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1902. cval = (val >> (idx * 4 + 8)) & 0x0f;
  1903. val = (val >> (idx * 2)) & 0x03;
  1904. if (val == 1)
  1905. ucontrol->value.enumerated.item[0] = 11;
  1906. else if (val == 2)
  1907. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1908. else if (val == 3)
  1909. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1910. else
  1911. ucontrol->value.enumerated.item[0] = 0;
  1912. return 0;
  1913. }
  1914. static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1915. struct snd_ctl_elem_value *ucontrol)
  1916. {
  1917. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1918. int change, shift;
  1919. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1920. unsigned int val, old_val, nval;
  1921. /* update SPDOUT */
  1922. spin_lock_irq(&ice->reg_lock);
  1923. val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1924. if (ucontrol->value.enumerated.item[0] >= 11)
  1925. nval = 1;
  1926. else if (ucontrol->value.enumerated.item[0] >= 9)
  1927. nval = 3;
  1928. else if (ucontrol->value.enumerated.item[0] >= 1)
  1929. nval = 2;
  1930. else
  1931. nval = 0;
  1932. shift = idx * 2;
  1933. val &= ~(0x03 << shift);
  1934. val |= nval << shift;
  1935. shift = idx * 4 + 8;
  1936. if (nval == 2) {
  1937. nval = ucontrol->value.enumerated.item[0] - 1;
  1938. val &= ~(0x07 << shift);
  1939. val |= nval << shift;
  1940. } else if (nval == 3) {
  1941. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1942. val &= ~(0x08 << shift);
  1943. val |= nval << shift;
  1944. }
  1945. change = val != old_val;
  1946. if (change)
  1947. outw(val, ICEMT(ice, ROUTE_SPDOUT));
  1948. spin_unlock_irq(&ice->reg_lock);
  1949. return change;
  1950. }
  1951. static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
  1952. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1953. .name = "H/W Playback Route",
  1954. .info = snd_ice1712_pro_route_info,
  1955. .get = snd_ice1712_pro_route_analog_get,
  1956. .put = snd_ice1712_pro_route_analog_put,
  1957. };
  1958. static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
  1959. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1960. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1961. .info = snd_ice1712_pro_route_info,
  1962. .get = snd_ice1712_pro_route_spdif_get,
  1963. .put = snd_ice1712_pro_route_spdif_put,
  1964. .count = 2,
  1965. };
  1966. static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
  1967. struct snd_ctl_elem_info *uinfo)
  1968. {
  1969. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1970. uinfo->count = 1;
  1971. uinfo->value.integer.min = 0;
  1972. uinfo->value.integer.max = 255;
  1973. return 0;
  1974. }
  1975. static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
  1976. struct snd_ctl_elem_value *ucontrol)
  1977. {
  1978. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1979. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
  1980. return 0;
  1981. }
  1982. static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
  1983. struct snd_ctl_elem_value *ucontrol)
  1984. {
  1985. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1986. int change;
  1987. spin_lock_irq(&ice->reg_lock);
  1988. change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
  1989. outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
  1990. spin_unlock_irq(&ice->reg_lock);
  1991. return change;
  1992. }
  1993. static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
  1994. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1995. .name = "Multi Track Volume Rate",
  1996. .info = snd_ice1712_pro_volume_rate_info,
  1997. .get = snd_ice1712_pro_volume_rate_get,
  1998. .put = snd_ice1712_pro_volume_rate_put
  1999. };
  2000. static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
  2001. struct snd_ctl_elem_info *uinfo)
  2002. {
  2003. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  2004. uinfo->count = 22;
  2005. uinfo->value.integer.min = 0;
  2006. uinfo->value.integer.max = 255;
  2007. return 0;
  2008. }
  2009. static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
  2010. struct snd_ctl_elem_value *ucontrol)
  2011. {
  2012. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  2013. int idx;
  2014. spin_lock_irq(&ice->reg_lock);
  2015. for (idx = 0; idx < 22; idx++) {
  2016. outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
  2017. ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
  2018. }
  2019. spin_unlock_irq(&ice->reg_lock);
  2020. return 0;
  2021. }
  2022. static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
  2023. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2024. .name = "Multi Track Peak",
  2025. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  2026. .info = snd_ice1712_pro_peak_info,
  2027. .get = snd_ice1712_pro_peak_get
  2028. };
  2029. /*
  2030. *
  2031. */
  2032. /*
  2033. * list of available boards
  2034. */
  2035. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  2036. snd_ice1712_hoontech_cards,
  2037. snd_ice1712_delta_cards,
  2038. snd_ice1712_ews_cards,
  2039. NULL,
  2040. };
  2041. static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
  2042. unsigned char dev,
  2043. unsigned char addr)
  2044. {
  2045. long t = 0x10000;
  2046. outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
  2047. outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
  2048. while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
  2049. return inb(ICEREG(ice, I2C_DATA));
  2050. }
  2051. static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
  2052. const char *modelname)
  2053. {
  2054. int dev = 0xa0; /* EEPROM device address */
  2055. unsigned int i, size;
  2056. struct snd_ice1712_card_info **tbl, *c;
  2057. if (! modelname || ! *modelname) {
  2058. ice->eeprom.subvendor = 0;
  2059. if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
  2060. ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
  2061. (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
  2062. (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
  2063. (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
  2064. if (ice->eeprom.subvendor == 0 ||
  2065. ice->eeprom.subvendor == (unsigned int)-1) {
  2066. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  2067. u16 vendor, device;
  2068. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  2069. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  2070. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  2071. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  2072. printk(KERN_ERR "ice1712: No valid ID is found\n");
  2073. return -ENXIO;
  2074. }
  2075. }
  2076. }
  2077. for (tbl = card_tables; *tbl; tbl++) {
  2078. for (c = *tbl; c->subvendor; c++) {
  2079. if (modelname && c->model && ! strcmp(modelname, c->model)) {
  2080. printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
  2081. ice->eeprom.subvendor = c->subvendor;
  2082. } else if (c->subvendor != ice->eeprom.subvendor)
  2083. continue;
  2084. if (! c->eeprom_size || ! c->eeprom_data)
  2085. goto found;
  2086. /* if the EEPROM is given by the driver, use it */
  2087. snd_printdd("using the defined eeprom..\n");
  2088. ice->eeprom.version = 1;
  2089. ice->eeprom.size = c->eeprom_size + 6;
  2090. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  2091. goto read_skipped;
  2092. }
  2093. }
  2094. printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
  2095. ice->eeprom.subvendor);
  2096. found:
  2097. ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
  2098. if (ice->eeprom.size < 6)
  2099. ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
  2100. else if (ice->eeprom.size > 32) {
  2101. snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
  2102. return -EIO;
  2103. }
  2104. ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
  2105. if (ice->eeprom.version != 1) {
  2106. snd_printk(KERN_ERR "invalid EEPROM version %i\n",
  2107. ice->eeprom.version);
  2108. /* return -EIO; */
  2109. }
  2110. size = ice->eeprom.size - 6;
  2111. for (i = 0; i < size; i++)
  2112. ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
  2113. read_skipped:
  2114. ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
  2115. ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
  2116. ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
  2117. return 0;
  2118. }
  2119. static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
  2120. {
  2121. outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2122. udelay(200);
  2123. outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2124. udelay(200);
  2125. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && !ice->dxr_enable) {
  2126. /* Limit active ADCs and DACs to 6; */
  2127. /* Note: DXR extension not supported */
  2128. pci_write_config_byte(ice->pci, 0x60, 0x2a);
  2129. } else {
  2130. pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
  2131. }
  2132. pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
  2133. pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
  2134. pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
  2135. if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
  2136. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2137. ice->gpio.direction = ice->eeprom.gpiodir;
  2138. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
  2139. ice->eeprom.gpiomask);
  2140. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
  2141. ice->eeprom.gpiodir);
  2142. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2143. ice->eeprom.gpiostate);
  2144. } else {
  2145. ice->gpio.write_mask = 0xc0;
  2146. ice->gpio.direction = 0xff;
  2147. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
  2148. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
  2149. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2150. ICE1712_STDSP24_CLOCK_BIT);
  2151. }
  2152. snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
  2153. if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
  2154. outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
  2155. udelay(100);
  2156. outb(0, ICEREG(ice, AC97_CMD));
  2157. udelay(200);
  2158. snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
  2159. }
  2160. snd_ice1712_set_pro_rate(ice, 48000, 1);
  2161. return 0;
  2162. }
  2163. int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
  2164. {
  2165. int err;
  2166. struct snd_kcontrol *kctl;
  2167. snd_assert(ice->pcm_pro != NULL, return -EIO);
  2168. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
  2169. if (err < 0)
  2170. return err;
  2171. kctl->id.device = ice->pcm_pro->device;
  2172. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
  2173. if (err < 0)
  2174. return err;
  2175. kctl->id.device = ice->pcm_pro->device;
  2176. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
  2177. if (err < 0)
  2178. return err;
  2179. kctl->id.device = ice->pcm_pro->device;
  2180. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
  2181. if (err < 0)
  2182. return err;
  2183. kctl->id.device = ice->pcm_pro->device;
  2184. ice->spdif.stream_ctl = kctl;
  2185. return 0;
  2186. }
  2187. static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
  2188. {
  2189. int err;
  2190. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
  2191. if (err < 0)
  2192. return err;
  2193. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
  2194. if (err < 0)
  2195. return err;
  2196. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
  2197. if (err < 0)
  2198. return err;
  2199. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
  2200. if (err < 0)
  2201. return err;
  2202. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
  2203. if (err < 0)
  2204. return err;
  2205. if (ice->num_total_dacs > 0) {
  2206. struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
  2207. tmp.count = ice->num_total_dacs;
  2208. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2209. if (err < 0)
  2210. return err;
  2211. }
  2212. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
  2213. if (err < 0)
  2214. return err;
  2215. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
  2216. if (err < 0)
  2217. return err;
  2218. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
  2219. if (err < 0)
  2220. return err;
  2221. return 0;
  2222. }
  2223. static int snd_ice1712_free(struct snd_ice1712 *ice)
  2224. {
  2225. if (! ice->port)
  2226. goto __hw_end;
  2227. /* mask all interrupts */
  2228. outb(0xc0, ICEMT(ice, IRQ));
  2229. outb(0xff, ICEREG(ice, IRQMASK));
  2230. /* --- */
  2231. __hw_end:
  2232. if (ice->irq >= 0) {
  2233. synchronize_irq(ice->irq);
  2234. free_irq(ice->irq, ice);
  2235. }
  2236. if (ice->port)
  2237. pci_release_regions(ice->pci);
  2238. snd_ice1712_akm4xxx_free(ice);
  2239. pci_disable_device(ice->pci);
  2240. kfree(ice);
  2241. return 0;
  2242. }
  2243. static int snd_ice1712_dev_free(struct snd_device *device)
  2244. {
  2245. struct snd_ice1712 *ice = device->device_data;
  2246. return snd_ice1712_free(ice);
  2247. }
  2248. static int __devinit snd_ice1712_create(struct snd_card *card,
  2249. struct pci_dev *pci,
  2250. const char *modelname,
  2251. int omni,
  2252. int cs8427_timeout,
  2253. int dxr_enable,
  2254. struct snd_ice1712 ** r_ice1712)
  2255. {
  2256. struct snd_ice1712 *ice;
  2257. int err;
  2258. static struct snd_device_ops ops = {
  2259. .dev_free = snd_ice1712_dev_free,
  2260. };
  2261. *r_ice1712 = NULL;
  2262. /* enable PCI device */
  2263. if ((err = pci_enable_device(pci)) < 0)
  2264. return err;
  2265. /* check, if we can restrict PCI DMA transfers to 28 bits */
  2266. if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
  2267. pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
  2268. snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
  2269. pci_disable_device(pci);
  2270. return -ENXIO;
  2271. }
  2272. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2273. if (ice == NULL) {
  2274. pci_disable_device(pci);
  2275. return -ENOMEM;
  2276. }
  2277. ice->omni = omni ? 1 : 0;
  2278. if (cs8427_timeout < 1)
  2279. cs8427_timeout = 1;
  2280. else if (cs8427_timeout > 1000)
  2281. cs8427_timeout = 1000;
  2282. ice->cs8427_timeout = cs8427_timeout;
  2283. ice->dxr_enable = dxr_enable;
  2284. spin_lock_init(&ice->reg_lock);
  2285. mutex_init(&ice->gpio_mutex);
  2286. mutex_init(&ice->i2c_mutex);
  2287. mutex_init(&ice->open_mutex);
  2288. ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
  2289. ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
  2290. ice->gpio.set_data = snd_ice1712_set_gpio_data;
  2291. ice->gpio.get_data = snd_ice1712_get_gpio_data;
  2292. ice->spdif.cs8403_bits =
  2293. ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
  2294. 0x10 | /* no emphasis */
  2295. 0x20); /* PCM encoder/decoder */
  2296. ice->card = card;
  2297. ice->pci = pci;
  2298. ice->irq = -1;
  2299. pci_set_master(pci);
  2300. pci_write_config_word(ice->pci, 0x40, 0x807f);
  2301. pci_write_config_word(ice->pci, 0x42, 0x0006);
  2302. snd_ice1712_proc_init(ice);
  2303. synchronize_irq(pci->irq);
  2304. if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
  2305. kfree(ice);
  2306. pci_disable_device(pci);
  2307. return err;
  2308. }
  2309. ice->port = pci_resource_start(pci, 0);
  2310. ice->ddma_port = pci_resource_start(pci, 1);
  2311. ice->dmapath_port = pci_resource_start(pci, 2);
  2312. ice->profi_port = pci_resource_start(pci, 3);
  2313. if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
  2314. "ICE1712", ice)) {
  2315. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2316. snd_ice1712_free(ice);
  2317. return -EIO;
  2318. }
  2319. ice->irq = pci->irq;
  2320. if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
  2321. snd_ice1712_free(ice);
  2322. return -EIO;
  2323. }
  2324. if (snd_ice1712_chip_init(ice) < 0) {
  2325. snd_ice1712_free(ice);
  2326. return -EIO;
  2327. }
  2328. /* unmask used interrupts */
  2329. outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
  2330. ICE1712_IRQ_MPU2 : 0) |
  2331. ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
  2332. ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
  2333. ICEREG(ice, IRQMASK));
  2334. outb(0x00, ICEMT(ice, IRQ));
  2335. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2336. snd_ice1712_free(ice);
  2337. return err;
  2338. }
  2339. snd_card_set_dev(card, &pci->dev);
  2340. *r_ice1712 = ice;
  2341. return 0;
  2342. }
  2343. /*
  2344. *
  2345. * Registration
  2346. *
  2347. */
  2348. static struct snd_ice1712_card_info no_matched __devinitdata;
  2349. static int __devinit snd_ice1712_probe(struct pci_dev *pci,
  2350. const struct pci_device_id *pci_id)
  2351. {
  2352. static int dev;
  2353. struct snd_card *card;
  2354. struct snd_ice1712 *ice;
  2355. int pcm_dev = 0, err;
  2356. struct snd_ice1712_card_info **tbl, *c;
  2357. if (dev >= SNDRV_CARDS)
  2358. return -ENODEV;
  2359. if (!enable[dev]) {
  2360. dev++;
  2361. return -ENOENT;
  2362. }
  2363. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2364. if (card == NULL)
  2365. return -ENOMEM;
  2366. strcpy(card->driver, "ICE1712");
  2367. strcpy(card->shortname, "ICEnsemble ICE1712");
  2368. if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
  2369. cs8427_timeout[dev], dxr_enable[dev],
  2370. &ice)) < 0) {
  2371. snd_card_free(card);
  2372. return err;
  2373. }
  2374. for (tbl = card_tables; *tbl; tbl++) {
  2375. for (c = *tbl; c->subvendor; c++) {
  2376. if (c->subvendor == ice->eeprom.subvendor) {
  2377. strcpy(card->shortname, c->name);
  2378. if (c->driver) /* specific driver? */
  2379. strcpy(card->driver, c->driver);
  2380. if (c->chip_init) {
  2381. if ((err = c->chip_init(ice)) < 0) {
  2382. snd_card_free(card);
  2383. return err;
  2384. }
  2385. }
  2386. goto __found;
  2387. }
  2388. }
  2389. }
  2390. c = &no_matched;
  2391. __found:
  2392. if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
  2393. snd_card_free(card);
  2394. return err;
  2395. }
  2396. if (ice_has_con_ac97(ice))
  2397. if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
  2398. snd_card_free(card);
  2399. return err;
  2400. }
  2401. if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
  2402. snd_card_free(card);
  2403. return err;
  2404. }
  2405. if ((err = snd_ice1712_build_controls(ice)) < 0) {
  2406. snd_card_free(card);
  2407. return err;
  2408. }
  2409. if (c->build_controls) {
  2410. if ((err = c->build_controls(ice)) < 0) {
  2411. snd_card_free(card);
  2412. return err;
  2413. }
  2414. }
  2415. if (ice_has_con_ac97(ice))
  2416. if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
  2417. snd_card_free(card);
  2418. return err;
  2419. }
  2420. if (! c->no_mpu401) {
  2421. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2422. ICEREG(ice, MPU1_CTRL), 1,
  2423. ice->irq, 0,
  2424. &ice->rmidi[0])) < 0) {
  2425. snd_card_free(card);
  2426. return err;
  2427. }
  2428. if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
  2429. if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
  2430. ICEREG(ice, MPU2_CTRL), 1,
  2431. ice->irq, 0,
  2432. &ice->rmidi[1])) < 0) {
  2433. snd_card_free(card);
  2434. return err;
  2435. }
  2436. }
  2437. snd_ice1712_set_input_clock_source(ice, 0);
  2438. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2439. card->shortname, ice->port, ice->irq);
  2440. if ((err = snd_card_register(card)) < 0) {
  2441. snd_card_free(card);
  2442. return err;
  2443. }
  2444. pci_set_drvdata(pci, card);
  2445. dev++;
  2446. return 0;
  2447. }
  2448. static void __devexit snd_ice1712_remove(struct pci_dev *pci)
  2449. {
  2450. snd_card_free(pci_get_drvdata(pci));
  2451. pci_set_drvdata(pci, NULL);
  2452. }
  2453. static struct pci_driver driver = {
  2454. .name = "ICE1712",
  2455. .id_table = snd_ice1712_ids,
  2456. .probe = snd_ice1712_probe,
  2457. .remove = __devexit_p(snd_ice1712_remove),
  2458. };
  2459. static int __init alsa_card_ice1712_init(void)
  2460. {
  2461. return pci_register_driver(&driver);
  2462. }
  2463. static void __exit alsa_card_ice1712_exit(void)
  2464. {
  2465. pci_unregister_driver(&driver);
  2466. }
  2467. module_init(alsa_card_ice1712_init)
  2468. module_exit(alsa_card_ice1712_exit)