aureon.c 58 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. *
  48. */
  49. #include <sound/driver.h>
  50. #include <asm/io.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/init.h>
  54. #include <linux/slab.h>
  55. #include <linux/mutex.h>
  56. #include <sound/core.h>
  57. #include "ice1712.h"
  58. #include "envy24ht.h"
  59. #include "aureon.h"
  60. /* WM8770 registers */
  61. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  62. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  63. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  64. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  65. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  66. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  67. #define WM_MUTE 0x14 /* mute controls */
  68. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  69. #define WM_INT_CTRL 0x16 /* interface control */
  70. #define WM_MASTER 0x17 /* master clock and mode */
  71. #define WM_POWERDOWN 0x18 /* power-down controls */
  72. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  73. #define WM_ADC_MUX 0x1b /* input MUX */
  74. #define WM_OUT_MUX1 0x1c /* output MUX */
  75. #define WM_OUT_MUX2 0x1e /* output MUX */
  76. #define WM_RESET 0x1f /* software reset */
  77. /* CS8415A registers */
  78. #define CS8415_CTRL1 0x01
  79. #define CS8415_CTRL2 0x02
  80. #define CS8415_QSUB 0x14
  81. #define CS8415_RATIO 0x1E
  82. #define CS8415_C_BUFFER 0x20
  83. #define CS8415_ID 0x7F
  84. /* PCA9554 registers */
  85. #define PCA9554_DEV 0x40 /* I2C device address */
  86. #define PCA9554_IN 0x00 /* input port */
  87. #define PCA9554_OUT 0x01 /* output port */
  88. #define PCA9554_INVERT 0x02 /* input invert */
  89. #define PCA9554_DIR 0x03 /* port directions */
  90. /*
  91. * Aureon Universe additional controls using PCA9554
  92. */
  93. /*
  94. * Send data to pca9554
  95. */
  96. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  97. unsigned char data)
  98. {
  99. unsigned int tmp;
  100. int i, j;
  101. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  102. unsigned char val = 0;
  103. tmp = snd_ice1712_gpio_read(ice);
  104. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  105. AUREON_WM_RW|AUREON_WM_CS|
  106. AUREON_CS8415_CS));
  107. tmp |= AUREON_WM_RW;
  108. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  109. tmp &= ~AUREON_SPI_MOSI;
  110. tmp &= ~AUREON_SPI_CLK;
  111. snd_ice1712_gpio_write(ice, tmp);
  112. udelay(50);
  113. /*
  114. * send i2c stop condition and start condition
  115. * to obtain sane state
  116. */
  117. tmp |= AUREON_SPI_CLK;
  118. snd_ice1712_gpio_write(ice, tmp);
  119. udelay(50);
  120. tmp |= AUREON_SPI_MOSI;
  121. snd_ice1712_gpio_write(ice, tmp);
  122. udelay(100);
  123. tmp &= ~AUREON_SPI_MOSI;
  124. snd_ice1712_gpio_write(ice, tmp);
  125. udelay(50);
  126. tmp &= ~AUREON_SPI_CLK;
  127. snd_ice1712_gpio_write(ice, tmp);
  128. udelay(100);
  129. /*
  130. * send device address, command and value,
  131. * skipping ack cycles inbetween
  132. */
  133. for (j = 0; j < 3; j++) {
  134. switch(j) {
  135. case 0: val = dev; break;
  136. case 1: val = reg; break;
  137. case 2: val = data; break;
  138. }
  139. for (i = 7; i >= 0; i--) {
  140. tmp &= ~AUREON_SPI_CLK;
  141. snd_ice1712_gpio_write(ice, tmp);
  142. udelay(40);
  143. if (val & (1 << i))
  144. tmp |= AUREON_SPI_MOSI;
  145. else
  146. tmp &= ~AUREON_SPI_MOSI;
  147. snd_ice1712_gpio_write(ice, tmp);
  148. udelay(40);
  149. tmp |= AUREON_SPI_CLK;
  150. snd_ice1712_gpio_write(ice, tmp);
  151. udelay(40);
  152. }
  153. tmp &= ~AUREON_SPI_CLK;
  154. snd_ice1712_gpio_write(ice, tmp);
  155. udelay(40);
  156. tmp |= AUREON_SPI_CLK;
  157. snd_ice1712_gpio_write(ice, tmp);
  158. udelay(40);
  159. tmp &= ~AUREON_SPI_CLK;
  160. snd_ice1712_gpio_write(ice, tmp);
  161. udelay(40);
  162. }
  163. tmp &= ~AUREON_SPI_CLK;
  164. snd_ice1712_gpio_write(ice, tmp);
  165. udelay(40);
  166. tmp &= ~AUREON_SPI_MOSI;
  167. snd_ice1712_gpio_write(ice, tmp);
  168. udelay(40);
  169. tmp |= AUREON_SPI_CLK;
  170. snd_ice1712_gpio_write(ice, tmp);
  171. udelay(50);
  172. tmp |= AUREON_SPI_MOSI;
  173. snd_ice1712_gpio_write(ice, tmp);
  174. udelay(100);
  175. }
  176. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  177. struct snd_ctl_elem_info *uinfo)
  178. {
  179. char *texts[3] = {"Internal Aux", "Wavetable", "Rear Line-In"};
  180. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  181. uinfo->count = 1;
  182. uinfo->value.enumerated.items = 3;
  183. if(uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  184. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  185. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  186. return 0;
  187. }
  188. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  189. struct snd_ctl_elem_value *ucontrol)
  190. {
  191. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  192. ucontrol->value.integer.value[0] = ice->spec.aureon.pca9554_out;
  193. return 0;
  194. }
  195. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  196. struct snd_ctl_elem_value *ucontrol)
  197. {
  198. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  199. unsigned char oval, nval;
  200. int change;
  201. snd_ice1712_save_gpio_status(ice);
  202. oval = ice->spec.aureon.pca9554_out;
  203. nval = ucontrol->value.integer.value[0];
  204. if ((change = (oval != nval))) {
  205. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  206. ice->spec.aureon.pca9554_out = nval;
  207. }
  208. snd_ice1712_restore_gpio_status(ice);
  209. return change;
  210. }
  211. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  212. unsigned short val)
  213. {
  214. unsigned int tmp;
  215. /* Send address to XILINX chip */
  216. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  217. snd_ice1712_gpio_write(ice, tmp);
  218. udelay(10);
  219. tmp |= AUREON_AC97_ADDR;
  220. snd_ice1712_gpio_write(ice, tmp);
  221. udelay(10);
  222. tmp &= ~AUREON_AC97_ADDR;
  223. snd_ice1712_gpio_write(ice, tmp);
  224. udelay(10);
  225. /* Send low-order byte to XILINX chip */
  226. tmp &= ~AUREON_AC97_DATA_MASK;
  227. tmp |= val & AUREON_AC97_DATA_MASK;
  228. snd_ice1712_gpio_write(ice, tmp);
  229. udelay(10);
  230. tmp |= AUREON_AC97_DATA_LOW;
  231. snd_ice1712_gpio_write(ice, tmp);
  232. udelay(10);
  233. tmp &= ~AUREON_AC97_DATA_LOW;
  234. snd_ice1712_gpio_write(ice, tmp);
  235. udelay(10);
  236. /* Send high-order byte to XILINX chip */
  237. tmp &= ~AUREON_AC97_DATA_MASK;
  238. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  239. snd_ice1712_gpio_write(ice, tmp);
  240. udelay(10);
  241. tmp |= AUREON_AC97_DATA_HIGH;
  242. snd_ice1712_gpio_write(ice, tmp);
  243. udelay(10);
  244. tmp &= ~AUREON_AC97_DATA_HIGH;
  245. snd_ice1712_gpio_write(ice, tmp);
  246. udelay(10);
  247. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  248. tmp |= AUREON_AC97_COMMIT;
  249. snd_ice1712_gpio_write(ice, tmp);
  250. udelay(10);
  251. tmp &= ~AUREON_AC97_COMMIT;
  252. snd_ice1712_gpio_write(ice, tmp);
  253. udelay(10);
  254. /* Store the data in out private buffer */
  255. ice->spec.aureon.stac9744[(reg & 0x7F) >> 1] = val;
  256. }
  257. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  258. {
  259. return ice->spec.aureon.stac9744[(reg & 0x7F) >> 1];
  260. }
  261. /*
  262. * Initialize STAC9744 chip
  263. */
  264. static int aureon_ac97_init (struct snd_ice1712 *ice)
  265. {
  266. int i;
  267. static unsigned short ac97_defaults[] = {
  268. 0x00, 0x9640,
  269. 0x02, 0x8000,
  270. 0x04, 0x8000,
  271. 0x06, 0x8000,
  272. 0x0C, 0x8008,
  273. 0x0E, 0x8008,
  274. 0x10, 0x8808,
  275. 0x12, 0x8808,
  276. 0x14, 0x8808,
  277. 0x16, 0x8808,
  278. 0x18, 0x8808,
  279. 0x1C, 0x8000,
  280. 0x26, 0x000F,
  281. 0x28, 0x0201,
  282. 0x2C, 0xBB80,
  283. 0x32, 0xBB80,
  284. 0x7C, 0x8384,
  285. 0x7E, 0x7644,
  286. (unsigned short)-1
  287. };
  288. unsigned int tmp;
  289. /* Cold reset */
  290. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  291. snd_ice1712_gpio_write(ice, tmp);
  292. udelay(3);
  293. tmp &= ~AUREON_AC97_RESET;
  294. snd_ice1712_gpio_write(ice, tmp);
  295. udelay(3);
  296. tmp |= AUREON_AC97_RESET;
  297. snd_ice1712_gpio_write(ice, tmp);
  298. udelay(3);
  299. memset(&ice->spec.aureon.stac9744, 0, sizeof(ice->spec.aureon.stac9744));
  300. for (i=0; ac97_defaults[i] != (unsigned short)-1; i+=2)
  301. ice->spec.aureon.stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  302. aureon_ac97_write(ice, AC97_MASTER, 0x0000); // Unmute AC'97 master volume permanently - muting is done by WM8770
  303. return 0;
  304. }
  305. #define AUREON_AC97_STEREO 0x80
  306. /*
  307. * AC'97 volume controls
  308. */
  309. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  310. {
  311. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  312. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  313. uinfo->value.integer.min = 0;
  314. uinfo->value.integer.max = 31;
  315. return 0;
  316. }
  317. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  318. {
  319. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  320. unsigned short vol;
  321. mutex_lock(&ice->gpio_mutex);
  322. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  323. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  324. if (kcontrol->private_value & AUREON_AC97_STEREO)
  325. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  326. mutex_unlock(&ice->gpio_mutex);
  327. return 0;
  328. }
  329. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  330. {
  331. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  332. unsigned short ovol, nvol;
  333. int change;
  334. snd_ice1712_save_gpio_status(ice);
  335. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  336. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  337. if (kcontrol->private_value & AUREON_AC97_STEREO)
  338. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  339. nvol |= ovol & ~0x1F1F;
  340. if ((change = (ovol != nvol)))
  341. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  342. snd_ice1712_restore_gpio_status(ice);
  343. return change;
  344. }
  345. /*
  346. * AC'97 mute controls
  347. */
  348. #define aureon_ac97_mute_info aureon_mono_bool_info
  349. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  350. {
  351. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  352. mutex_lock(&ice->gpio_mutex);
  353. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  354. mutex_unlock(&ice->gpio_mutex);
  355. return 0;
  356. }
  357. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  358. {
  359. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  360. unsigned short ovol, nvol;
  361. int change;
  362. snd_ice1712_save_gpio_status(ice);
  363. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  364. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~ 0x8000);
  365. if ((change = (ovol != nvol)))
  366. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  367. snd_ice1712_restore_gpio_status(ice);
  368. return change;
  369. }
  370. /*
  371. * AC'97 mute controls
  372. */
  373. #define aureon_ac97_micboost_info aureon_mono_bool_info
  374. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  375. {
  376. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  377. mutex_lock(&ice->gpio_mutex);
  378. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  379. mutex_unlock(&ice->gpio_mutex);
  380. return 0;
  381. }
  382. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  383. {
  384. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  385. unsigned short ovol, nvol;
  386. int change;
  387. snd_ice1712_save_gpio_status(ice);
  388. ovol = aureon_ac97_read(ice, AC97_MIC);
  389. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  390. if ((change = (ovol != nvol)))
  391. aureon_ac97_write(ice, AC97_MIC, nvol);
  392. snd_ice1712_restore_gpio_status(ice);
  393. return change;
  394. }
  395. /*
  396. * write data in the SPI mode
  397. */
  398. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  399. {
  400. unsigned int tmp;
  401. int i;
  402. unsigned int mosi, clk;
  403. tmp = snd_ice1712_gpio_read(ice);
  404. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT) {
  405. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  406. mosi = PRODIGY_SPI_MOSI;
  407. clk = PRODIGY_SPI_CLK;
  408. }
  409. else {
  410. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  411. AUREON_WM_CS|AUREON_CS8415_CS));
  412. mosi = AUREON_SPI_MOSI;
  413. clk = AUREON_SPI_CLK;
  414. tmp |= AUREON_WM_RW;
  415. }
  416. tmp &= ~cs;
  417. snd_ice1712_gpio_write(ice, tmp);
  418. udelay(1);
  419. for (i = bits - 1; i >= 0; i--) {
  420. tmp &= ~clk;
  421. snd_ice1712_gpio_write(ice, tmp);
  422. udelay(1);
  423. if (data & (1 << i))
  424. tmp |= mosi;
  425. else
  426. tmp &= ~mosi;
  427. snd_ice1712_gpio_write(ice, tmp);
  428. udelay(1);
  429. tmp |= clk;
  430. snd_ice1712_gpio_write(ice, tmp);
  431. udelay(1);
  432. }
  433. tmp &= ~clk;
  434. tmp |= cs;
  435. snd_ice1712_gpio_write(ice, tmp);
  436. udelay(1);
  437. tmp |= clk;
  438. snd_ice1712_gpio_write(ice, tmp);
  439. udelay(1);
  440. }
  441. /*
  442. * Read data in SPI mode
  443. */
  444. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits, unsigned char *buffer, int size) {
  445. int i, j;
  446. unsigned int tmp;
  447. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  448. snd_ice1712_gpio_write(ice, tmp);
  449. tmp &= ~cs;
  450. snd_ice1712_gpio_write(ice, tmp);
  451. udelay(1);
  452. for (i=bits-1; i>=0; i--) {
  453. if (data & (1 << i))
  454. tmp |= AUREON_SPI_MOSI;
  455. else
  456. tmp &= ~AUREON_SPI_MOSI;
  457. snd_ice1712_gpio_write(ice, tmp);
  458. udelay(1);
  459. tmp |= AUREON_SPI_CLK;
  460. snd_ice1712_gpio_write(ice, tmp);
  461. udelay(1);
  462. tmp &= ~AUREON_SPI_CLK;
  463. snd_ice1712_gpio_write(ice, tmp);
  464. udelay(1);
  465. }
  466. for (j=0; j<size; j++) {
  467. unsigned char outdata = 0;
  468. for (i=7; i>=0; i--) {
  469. tmp = snd_ice1712_gpio_read(ice);
  470. outdata <<= 1;
  471. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  472. udelay(1);
  473. tmp |= AUREON_SPI_CLK;
  474. snd_ice1712_gpio_write(ice, tmp);
  475. udelay(1);
  476. tmp &= ~AUREON_SPI_CLK;
  477. snd_ice1712_gpio_write(ice, tmp);
  478. udelay(1);
  479. }
  480. buffer[j] = outdata;
  481. }
  482. tmp |= cs;
  483. snd_ice1712_gpio_write(ice, tmp);
  484. }
  485. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg) {
  486. unsigned char val;
  487. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  488. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  489. return val;
  490. }
  491. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg, unsigned char *buffer, int size) {
  492. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  493. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  494. }
  495. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg, unsigned char val) {
  496. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  497. }
  498. /*
  499. * get the current register value of WM codec
  500. */
  501. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  502. {
  503. reg <<= 1;
  504. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  505. ice->akm[0].images[reg + 1];
  506. }
  507. /*
  508. * set the register value of WM codec
  509. */
  510. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  511. {
  512. aureon_spi_write(ice,
  513. (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ? PRODIGY_WM_CS : AUREON_WM_CS),
  514. (reg << 9) | (val & 0x1ff), 16);
  515. }
  516. /*
  517. * set the register value of WM codec and remember it
  518. */
  519. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  520. {
  521. wm_put_nocache(ice, reg, val);
  522. reg <<= 1;
  523. ice->akm[0].images[reg] = val >> 8;
  524. ice->akm[0].images[reg + 1] = val;
  525. }
  526. /*
  527. */
  528. static int aureon_mono_bool_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  529. {
  530. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  531. uinfo->count = 1;
  532. uinfo->value.integer.min = 0;
  533. uinfo->value.integer.max = 1;
  534. return 0;
  535. }
  536. /*
  537. * AC'97 master playback mute controls (Mute on WM8770 chip)
  538. */
  539. #define aureon_ac97_mmute_info aureon_mono_bool_info
  540. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  541. {
  542. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  543. mutex_lock(&ice->gpio_mutex);
  544. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  545. mutex_unlock(&ice->gpio_mutex);
  546. return 0;
  547. }
  548. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  549. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  550. unsigned short ovol, nvol;
  551. int change;
  552. snd_ice1712_save_gpio_status(ice);
  553. ovol = wm_get(ice, WM_OUT_MUX1);
  554. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  555. if ((change = (ovol != nvol)))
  556. wm_put(ice, WM_OUT_MUX1, nvol);
  557. snd_ice1712_restore_gpio_status(ice);
  558. return change;
  559. }
  560. /*
  561. * Logarithmic volume values for WM8770
  562. * Computed as 20 * Log10(255 / x)
  563. */
  564. static unsigned char wm_vol[256] = {
  565. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  566. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  567. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  568. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  569. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  570. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  571. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  572. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  573. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  574. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  575. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  576. 0, 0
  577. };
  578. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  579. #define WM_VOL_MUTE 0x8000
  580. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  581. {
  582. unsigned char nvol;
  583. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  584. nvol = 0;
  585. else
  586. nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX];
  587. wm_put(ice, index, nvol);
  588. wm_put_nocache(ice, index, 0x180 | nvol);
  589. }
  590. /*
  591. * DAC mute control
  592. */
  593. #define wm_pcm_mute_info aureon_mono_bool_info
  594. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  595. {
  596. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  597. mutex_lock(&ice->gpio_mutex);
  598. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  599. mutex_unlock(&ice->gpio_mutex);
  600. return 0;
  601. }
  602. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  603. {
  604. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  605. unsigned short nval, oval;
  606. int change;
  607. snd_ice1712_save_gpio_status(ice);
  608. oval = wm_get(ice, WM_MUTE);
  609. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  610. if ((change = (nval != oval)))
  611. wm_put(ice, WM_MUTE, nval);
  612. snd_ice1712_restore_gpio_status(ice);
  613. return change;
  614. }
  615. /*
  616. * Master volume attenuation mixer control
  617. */
  618. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  619. {
  620. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  621. uinfo->count = 2;
  622. uinfo->value.integer.min = 0;
  623. uinfo->value.integer.max = WM_VOL_MAX;
  624. return 0;
  625. }
  626. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  627. {
  628. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  629. int i;
  630. for (i=0; i<2; i++)
  631. ucontrol->value.integer.value[i] = ice->spec.aureon.master[i] & ~WM_VOL_MUTE;
  632. return 0;
  633. }
  634. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  635. {
  636. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  637. int ch, change = 0;
  638. snd_ice1712_save_gpio_status(ice);
  639. for (ch = 0; ch < 2; ch++) {
  640. if (ucontrol->value.integer.value[ch] != ice->spec.aureon.master[ch]) {
  641. int dac;
  642. ice->spec.aureon.master[ch] &= WM_VOL_MUTE;
  643. ice->spec.aureon.master[ch] |= ucontrol->value.integer.value[ch];
  644. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  645. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  646. ice->spec.aureon.vol[dac + ch],
  647. ice->spec.aureon.master[ch]);
  648. change = 1;
  649. }
  650. }
  651. snd_ice1712_restore_gpio_status(ice);
  652. return change;
  653. }
  654. /*
  655. * DAC volume attenuation mixer control
  656. */
  657. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  658. {
  659. int voices = kcontrol->private_value >> 8;
  660. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  661. uinfo->count = voices;
  662. uinfo->value.integer.min = 0; /* mute (-101dB) */
  663. uinfo->value.integer.max = 0x7F; /* 0dB */
  664. return 0;
  665. }
  666. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  667. {
  668. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  669. int i, ofs, voices;
  670. voices = kcontrol->private_value >> 8;
  671. ofs = kcontrol->private_value & 0xff;
  672. for (i = 0; i < voices; i++)
  673. ucontrol->value.integer.value[i] = ice->spec.aureon.vol[ofs+i] & ~WM_VOL_MUTE;
  674. return 0;
  675. }
  676. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  677. {
  678. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  679. int i, idx, ofs, voices;
  680. int change = 0;
  681. voices = kcontrol->private_value >> 8;
  682. ofs = kcontrol->private_value & 0xff;
  683. snd_ice1712_save_gpio_status(ice);
  684. for (i = 0; i < voices; i++) {
  685. idx = WM_DAC_ATTEN + ofs + i;
  686. if (ucontrol->value.integer.value[i] != ice->spec.aureon.vol[ofs+i]) {
  687. ice->spec.aureon.vol[ofs+i] &= WM_VOL_MUTE;
  688. ice->spec.aureon.vol[ofs+i] |= ucontrol->value.integer.value[i];
  689. wm_set_vol(ice, idx, ice->spec.aureon.vol[ofs+i],
  690. ice->spec.aureon.master[i]);
  691. change = 1;
  692. }
  693. }
  694. snd_ice1712_restore_gpio_status(ice);
  695. return change;
  696. }
  697. /*
  698. * WM8770 mute control
  699. */
  700. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  701. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  702. uinfo->count = kcontrol->private_value >> 8;
  703. uinfo->value.integer.min = 0;
  704. uinfo->value.integer.max = 1;
  705. return 0;
  706. }
  707. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  708. {
  709. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  710. int voices, ofs, i;
  711. voices = kcontrol->private_value >> 8;
  712. ofs = kcontrol->private_value & 0xFF;
  713. for (i = 0; i < voices; i++)
  714. ucontrol->value.integer.value[i] = (ice->spec.aureon.vol[ofs+i] & WM_VOL_MUTE) ? 0 : 1;
  715. return 0;
  716. }
  717. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  718. {
  719. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  720. int change = 0, voices, ofs, i;
  721. voices = kcontrol->private_value >> 8;
  722. ofs = kcontrol->private_value & 0xFF;
  723. snd_ice1712_save_gpio_status(ice);
  724. for (i = 0; i < voices; i++) {
  725. int val = (ice->spec.aureon.vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  726. if (ucontrol->value.integer.value[i] != val) {
  727. ice->spec.aureon.vol[ofs + i] &= ~WM_VOL_MUTE;
  728. ice->spec.aureon.vol[ofs + i] |=
  729. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  730. wm_set_vol(ice, ofs + i, ice->spec.aureon.vol[ofs + i],
  731. ice->spec.aureon.master[i]);
  732. change = 1;
  733. }
  734. }
  735. snd_ice1712_restore_gpio_status(ice);
  736. return change;
  737. }
  738. /*
  739. * WM8770 master mute control
  740. */
  741. static int wm_master_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  742. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  743. uinfo->count = 2;
  744. uinfo->value.integer.min = 0;
  745. uinfo->value.integer.max = 1;
  746. return 0;
  747. }
  748. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  749. {
  750. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  751. ucontrol->value.integer.value[0] = (ice->spec.aureon.master[0] & WM_VOL_MUTE) ? 0 : 1;
  752. ucontrol->value.integer.value[1] = (ice->spec.aureon.master[1] & WM_VOL_MUTE) ? 0 : 1;
  753. return 0;
  754. }
  755. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  756. {
  757. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  758. int change = 0, i;
  759. snd_ice1712_save_gpio_status(ice);
  760. for (i = 0; i < 2; i++) {
  761. int val = (ice->spec.aureon.master[i] & WM_VOL_MUTE) ? 0 : 1;
  762. if (ucontrol->value.integer.value[i] != val) {
  763. int dac;
  764. ice->spec.aureon.master[i] &= ~WM_VOL_MUTE;
  765. ice->spec.aureon.master[i] |=
  766. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  767. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  768. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  769. ice->spec.aureon.vol[dac + i],
  770. ice->spec.aureon.master[i]);
  771. change = 1;
  772. }
  773. }
  774. snd_ice1712_restore_gpio_status(ice);
  775. return change;
  776. }
  777. /* digital master volume */
  778. #define PCM_0dB 0xff
  779. #define PCM_RES 128 /* -64dB */
  780. #define PCM_MIN (PCM_0dB - PCM_RES)
  781. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  782. {
  783. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  784. uinfo->count = 1;
  785. uinfo->value.integer.min = 0; /* mute (-64dB) */
  786. uinfo->value.integer.max = PCM_RES; /* 0dB */
  787. return 0;
  788. }
  789. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  790. {
  791. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  792. unsigned short val;
  793. mutex_lock(&ice->gpio_mutex);
  794. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  795. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  796. ucontrol->value.integer.value[0] = val;
  797. mutex_unlock(&ice->gpio_mutex);
  798. return 0;
  799. }
  800. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  801. {
  802. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  803. unsigned short ovol, nvol;
  804. int change = 0;
  805. snd_ice1712_save_gpio_status(ice);
  806. nvol = ucontrol->value.integer.value[0];
  807. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  808. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  809. if (ovol != nvol) {
  810. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  811. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  812. change = 1;
  813. }
  814. snd_ice1712_restore_gpio_status(ice);
  815. return change;
  816. }
  817. /*
  818. * ADC mute control
  819. */
  820. static int wm_adc_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  821. {
  822. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  823. uinfo->count = 2;
  824. uinfo->value.integer.min = 0;
  825. uinfo->value.integer.max = 1;
  826. return 0;
  827. }
  828. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  829. {
  830. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  831. unsigned short val;
  832. int i;
  833. mutex_lock(&ice->gpio_mutex);
  834. for (i = 0; i < 2; i++) {
  835. val = wm_get(ice, WM_ADC_GAIN + i);
  836. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  837. }
  838. mutex_unlock(&ice->gpio_mutex);
  839. return 0;
  840. }
  841. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  842. {
  843. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  844. unsigned short new, old;
  845. int i, change = 0;
  846. snd_ice1712_save_gpio_status(ice);
  847. for (i = 0; i < 2; i++) {
  848. old = wm_get(ice, WM_ADC_GAIN + i);
  849. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  850. if (new != old) {
  851. wm_put(ice, WM_ADC_GAIN + i, new);
  852. change = 1;
  853. }
  854. }
  855. snd_ice1712_restore_gpio_status(ice);
  856. return change;
  857. }
  858. /*
  859. * ADC gain mixer control
  860. */
  861. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  862. {
  863. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  864. uinfo->count = 2;
  865. uinfo->value.integer.min = 0; /* -12dB */
  866. uinfo->value.integer.max = 0x1f; /* 19dB */
  867. return 0;
  868. }
  869. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  870. {
  871. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  872. int i, idx;
  873. unsigned short vol;
  874. mutex_lock(&ice->gpio_mutex);
  875. for (i = 0; i < 2; i++) {
  876. idx = WM_ADC_GAIN + i;
  877. vol = wm_get(ice, idx) & 0x1f;
  878. ucontrol->value.integer.value[i] = vol;
  879. }
  880. mutex_unlock(&ice->gpio_mutex);
  881. return 0;
  882. }
  883. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  884. {
  885. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  886. int i, idx;
  887. unsigned short ovol, nvol;
  888. int change = 0;
  889. snd_ice1712_save_gpio_status(ice);
  890. for (i = 0; i < 2; i++) {
  891. idx = WM_ADC_GAIN + i;
  892. nvol = ucontrol->value.integer.value[i];
  893. ovol = wm_get(ice, idx);
  894. if ((ovol & 0x1f) != nvol) {
  895. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  896. change = 1;
  897. }
  898. }
  899. snd_ice1712_restore_gpio_status(ice);
  900. return change;
  901. }
  902. /*
  903. * ADC input mux mixer control
  904. */
  905. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  906. {
  907. static char *texts[] = {
  908. "CD", //AIN1
  909. "Aux", //AIN2
  910. "Line", //AIN3
  911. "Mic", //AIN4
  912. "AC97" //AIN5
  913. };
  914. static char *universe_texts[] = {
  915. "Aux1", //AIN1
  916. "CD", //AIN2
  917. "Phono", //AIN3
  918. "Line", //AIN4
  919. "Aux2", //AIN5
  920. "Mic", //AIN6
  921. "Aux3", //AIN7
  922. "AC97" //AIN8
  923. };
  924. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  925. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  926. uinfo->count = 2;
  927. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  928. uinfo->value.enumerated.items = 8;
  929. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  930. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  931. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  932. }
  933. else {
  934. uinfo->value.enumerated.items = 5;
  935. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  936. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  937. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  938. }
  939. return 0;
  940. }
  941. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  942. {
  943. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  944. unsigned short val;
  945. mutex_lock(&ice->gpio_mutex);
  946. val = wm_get(ice, WM_ADC_MUX);
  947. ucontrol->value.enumerated.item[0] = val & 7;
  948. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  949. mutex_unlock(&ice->gpio_mutex);
  950. return 0;
  951. }
  952. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  953. {
  954. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  955. unsigned short oval, nval;
  956. int change;
  957. snd_ice1712_save_gpio_status(ice);
  958. oval = wm_get(ice, WM_ADC_MUX);
  959. nval = oval & ~0x77;
  960. nval |= ucontrol->value.enumerated.item[0] & 7;
  961. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  962. change = (oval != nval);
  963. if (change)
  964. wm_put(ice, WM_ADC_MUX, nval);
  965. snd_ice1712_restore_gpio_status(ice);
  966. return change;
  967. }
  968. /*
  969. * CS8415 Input mux
  970. */
  971. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  972. {
  973. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  974. static char *aureon_texts[] = {
  975. "CD", //RXP0
  976. "Optical" //RXP1
  977. };
  978. static char *prodigy_texts[] = {
  979. "CD",
  980. "Coax"
  981. };
  982. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  983. uinfo->count = 1;
  984. uinfo->value.enumerated.items = 2;
  985. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  986. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  987. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  988. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  989. else
  990. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  991. return 0;
  992. }
  993. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  994. {
  995. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  996. //snd_ice1712_save_gpio_status(ice);
  997. //val = aureon_cs8415_get(ice, CS8415_CTRL2);
  998. ucontrol->value.enumerated.item[0] = ice->spec.aureon.cs8415_mux;
  999. //snd_ice1712_restore_gpio_status(ice);
  1000. return 0;
  1001. }
  1002. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1003. {
  1004. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1005. unsigned short oval, nval;
  1006. int change;
  1007. snd_ice1712_save_gpio_status(ice);
  1008. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1009. nval = oval & ~0x07;
  1010. nval |= ucontrol->value.enumerated.item[0] & 7;
  1011. change = (oval != nval);
  1012. if (change)
  1013. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1014. snd_ice1712_restore_gpio_status(ice);
  1015. ice->spec.aureon.cs8415_mux = ucontrol->value.enumerated.item[0];
  1016. return change;
  1017. }
  1018. static int aureon_cs8415_rate_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1019. {
  1020. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1021. uinfo->count = 1;
  1022. uinfo->value.integer.min = 0;
  1023. uinfo->value.integer.max = 192000;
  1024. return 0;
  1025. }
  1026. static int aureon_cs8415_rate_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1027. {
  1028. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1029. unsigned char ratio;
  1030. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1031. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1032. return 0;
  1033. }
  1034. /*
  1035. * CS8415A Mute
  1036. */
  1037. static int aureon_cs8415_mute_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1038. {
  1039. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1040. uinfo->count = 1;
  1041. return 0;
  1042. }
  1043. static int aureon_cs8415_mute_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1044. {
  1045. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1046. snd_ice1712_save_gpio_status(ice);
  1047. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1048. snd_ice1712_restore_gpio_status(ice);
  1049. return 0;
  1050. }
  1051. static int aureon_cs8415_mute_put (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1052. {
  1053. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1054. unsigned char oval, nval;
  1055. int change;
  1056. snd_ice1712_save_gpio_status(ice);
  1057. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1058. if (ucontrol->value.integer.value[0])
  1059. nval = oval & ~0x20;
  1060. else
  1061. nval = oval | 0x20;
  1062. if ((change = (oval != nval)))
  1063. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1064. snd_ice1712_restore_gpio_status(ice);
  1065. return change;
  1066. }
  1067. /*
  1068. * CS8415A Q-Sub info
  1069. */
  1070. static int aureon_cs8415_qsub_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1071. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1072. uinfo->count = 10;
  1073. return 0;
  1074. }
  1075. static int aureon_cs8415_qsub_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1076. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1077. snd_ice1712_save_gpio_status(ice);
  1078. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1079. snd_ice1712_restore_gpio_status(ice);
  1080. return 0;
  1081. }
  1082. static int aureon_cs8415_spdif_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1083. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1084. uinfo->count = 1;
  1085. return 0;
  1086. }
  1087. static int aureon_cs8415_mask_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1088. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1089. return 0;
  1090. }
  1091. static int aureon_cs8415_spdif_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1092. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1093. snd_ice1712_save_gpio_status(ice);
  1094. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1095. snd_ice1712_restore_gpio_status(ice);
  1096. return 0;
  1097. }
  1098. /*
  1099. * Headphone Amplifier
  1100. */
  1101. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1102. {
  1103. unsigned int tmp, tmp2;
  1104. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1105. if (enable)
  1106. tmp |= AUREON_HP_SEL;
  1107. else
  1108. tmp &= ~ AUREON_HP_SEL;
  1109. if (tmp != tmp2) {
  1110. snd_ice1712_gpio_write(ice, tmp);
  1111. return 1;
  1112. }
  1113. return 0;
  1114. }
  1115. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1116. {
  1117. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1118. return ( tmp & AUREON_HP_SEL )!= 0;
  1119. }
  1120. #define aureon_hpamp_info aureon_mono_bool_info
  1121. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1122. {
  1123. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1124. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1125. return 0;
  1126. }
  1127. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1128. {
  1129. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1130. return aureon_set_headphone_amp(ice,ucontrol->value.integer.value[0]);
  1131. }
  1132. /*
  1133. * Deemphasis
  1134. */
  1135. #define aureon_deemp_info aureon_mono_bool_info
  1136. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1137. {
  1138. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1139. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1140. return 0;
  1141. }
  1142. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1143. {
  1144. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1145. int temp, temp2;
  1146. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1147. if (ucontrol->value.integer.value[0])
  1148. temp |= 0xf;
  1149. else
  1150. temp &= ~0xf;
  1151. if (temp != temp2) {
  1152. wm_put(ice, WM_DAC_CTRL2, temp);
  1153. return 1;
  1154. }
  1155. return 0;
  1156. }
  1157. /*
  1158. * ADC Oversampling
  1159. */
  1160. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1161. {
  1162. static char *texts[2] = { "128x", "64x" };
  1163. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1164. uinfo->count = 1;
  1165. uinfo->value.enumerated.items = 2;
  1166. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1167. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1168. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1169. return 0;
  1170. }
  1171. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1172. {
  1173. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1174. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1175. return 0;
  1176. }
  1177. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1178. {
  1179. int temp, temp2;
  1180. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1181. temp2 = temp = wm_get(ice, WM_MASTER);
  1182. if (ucontrol->value.enumerated.item[0])
  1183. temp |= 0x8;
  1184. else
  1185. temp &= ~0x8;
  1186. if (temp != temp2) {
  1187. wm_put(ice, WM_MASTER, temp);
  1188. return 1;
  1189. }
  1190. return 0;
  1191. }
  1192. /*
  1193. * mixers
  1194. */
  1195. static struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1196. {
  1197. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1198. .name = "Master Playback Switch",
  1199. .info = wm_master_mute_info,
  1200. .get = wm_master_mute_get,
  1201. .put = wm_master_mute_put
  1202. },
  1203. {
  1204. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1205. .name = "Master Playback Volume",
  1206. .info = wm_master_vol_info,
  1207. .get = wm_master_vol_get,
  1208. .put = wm_master_vol_put
  1209. },
  1210. {
  1211. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1212. .name = "Front Playback Switch",
  1213. .info = wm_mute_info,
  1214. .get = wm_mute_get,
  1215. .put = wm_mute_put,
  1216. .private_value = (2 << 8) | 0
  1217. },
  1218. {
  1219. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1220. .name = "Front Playback Volume",
  1221. .info = wm_vol_info,
  1222. .get = wm_vol_get,
  1223. .put = wm_vol_put,
  1224. .private_value = (2 << 8) | 0
  1225. },
  1226. {
  1227. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1228. .name = "Rear Playback Switch",
  1229. .info = wm_mute_info,
  1230. .get = wm_mute_get,
  1231. .put = wm_mute_put,
  1232. .private_value = (2 << 8) | 2
  1233. },
  1234. {
  1235. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1236. .name = "Rear Playback Volume",
  1237. .info = wm_vol_info,
  1238. .get = wm_vol_get,
  1239. .put = wm_vol_put,
  1240. .private_value = (2 << 8) | 2
  1241. },
  1242. {
  1243. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1244. .name = "Center Playback Switch",
  1245. .info = wm_mute_info,
  1246. .get = wm_mute_get,
  1247. .put = wm_mute_put,
  1248. .private_value = (1 << 8) | 4
  1249. },
  1250. {
  1251. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1252. .name = "Center Playback Volume",
  1253. .info = wm_vol_info,
  1254. .get = wm_vol_get,
  1255. .put = wm_vol_put,
  1256. .private_value = (1 << 8) | 4
  1257. },
  1258. {
  1259. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1260. .name = "LFE Playback Switch",
  1261. .info = wm_mute_info,
  1262. .get = wm_mute_get,
  1263. .put = wm_mute_put,
  1264. .private_value = (1 << 8) | 5
  1265. },
  1266. {
  1267. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1268. .name = "LFE Playback Volume",
  1269. .info = wm_vol_info,
  1270. .get = wm_vol_get,
  1271. .put = wm_vol_put,
  1272. .private_value = (1 << 8) | 5
  1273. },
  1274. {
  1275. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1276. .name = "Side Playback Switch",
  1277. .info = wm_mute_info,
  1278. .get = wm_mute_get,
  1279. .put = wm_mute_put,
  1280. .private_value = (2 << 8) | 6
  1281. },
  1282. {
  1283. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1284. .name = "Side Playback Volume",
  1285. .info = wm_vol_info,
  1286. .get = wm_vol_get,
  1287. .put = wm_vol_put,
  1288. .private_value = (2 << 8) | 6
  1289. }
  1290. };
  1291. static struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1292. {
  1293. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1294. .name = "PCM Playback Switch",
  1295. .info = wm_pcm_mute_info,
  1296. .get = wm_pcm_mute_get,
  1297. .put = wm_pcm_mute_put
  1298. },
  1299. {
  1300. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1301. .name = "PCM Playback Volume",
  1302. .info = wm_pcm_vol_info,
  1303. .get = wm_pcm_vol_get,
  1304. .put = wm_pcm_vol_put
  1305. },
  1306. {
  1307. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1308. .name = "Capture Switch",
  1309. .info = wm_adc_mute_info,
  1310. .get = wm_adc_mute_get,
  1311. .put = wm_adc_mute_put,
  1312. },
  1313. {
  1314. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1315. .name = "Capture Volume",
  1316. .info = wm_adc_vol_info,
  1317. .get = wm_adc_vol_get,
  1318. .put = wm_adc_vol_put
  1319. },
  1320. {
  1321. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1322. .name = "Capture Source",
  1323. .info = wm_adc_mux_info,
  1324. .get = wm_adc_mux_get,
  1325. .put = wm_adc_mux_put,
  1326. .private_value = 5
  1327. },
  1328. {
  1329. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1330. .name = "External Amplifier",
  1331. .info = aureon_hpamp_info,
  1332. .get = aureon_hpamp_get,
  1333. .put = aureon_hpamp_put
  1334. },
  1335. {
  1336. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1337. .name = "DAC Deemphasis Switch",
  1338. .info = aureon_deemp_info,
  1339. .get = aureon_deemp_get,
  1340. .put = aureon_deemp_put
  1341. },
  1342. {
  1343. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1344. .name = "ADC Oversampling",
  1345. .info = aureon_oversampling_info,
  1346. .get = aureon_oversampling_get,
  1347. .put = aureon_oversampling_put
  1348. }
  1349. };
  1350. static struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1351. {
  1352. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1353. .name = "AC97 Playback Switch",
  1354. .info = aureon_ac97_mmute_info,
  1355. .get = aureon_ac97_mmute_get,
  1356. .put = aureon_ac97_mmute_put,
  1357. .private_value = AC97_MASTER
  1358. },
  1359. {
  1360. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1361. .name = "AC97 Playback Volume",
  1362. .info = aureon_ac97_vol_info,
  1363. .get = aureon_ac97_vol_get,
  1364. .put = aureon_ac97_vol_put,
  1365. .private_value = AC97_MASTER|AUREON_AC97_STEREO
  1366. },
  1367. {
  1368. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1369. .name = "CD Playback Switch",
  1370. .info = aureon_ac97_mute_info,
  1371. .get = aureon_ac97_mute_get,
  1372. .put = aureon_ac97_mute_put,
  1373. .private_value = AC97_CD
  1374. },
  1375. {
  1376. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1377. .name = "CD Playback Volume",
  1378. .info = aureon_ac97_vol_info,
  1379. .get = aureon_ac97_vol_get,
  1380. .put = aureon_ac97_vol_put,
  1381. .private_value = AC97_CD|AUREON_AC97_STEREO
  1382. },
  1383. {
  1384. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1385. .name = "Aux Playback Switch",
  1386. .info = aureon_ac97_mute_info,
  1387. .get = aureon_ac97_mute_get,
  1388. .put = aureon_ac97_mute_put,
  1389. .private_value = AC97_AUX,
  1390. },
  1391. {
  1392. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1393. .name = "Aux Playback Volume",
  1394. .info = aureon_ac97_vol_info,
  1395. .get = aureon_ac97_vol_get,
  1396. .put = aureon_ac97_vol_put,
  1397. .private_value = AC97_AUX|AUREON_AC97_STEREO
  1398. },
  1399. {
  1400. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1401. .name = "Line Playback Switch",
  1402. .info = aureon_ac97_mute_info,
  1403. .get = aureon_ac97_mute_get,
  1404. .put = aureon_ac97_mute_put,
  1405. .private_value = AC97_LINE
  1406. },
  1407. {
  1408. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1409. .name = "Line Playback Volume",
  1410. .info = aureon_ac97_vol_info,
  1411. .get = aureon_ac97_vol_get,
  1412. .put = aureon_ac97_vol_put,
  1413. .private_value = AC97_LINE|AUREON_AC97_STEREO
  1414. },
  1415. {
  1416. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1417. .name = "Mic Playback Switch",
  1418. .info = aureon_ac97_mute_info,
  1419. .get = aureon_ac97_mute_get,
  1420. .put = aureon_ac97_mute_put,
  1421. .private_value = AC97_MIC
  1422. },
  1423. {
  1424. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1425. .name = "Mic Playback Volume",
  1426. .info = aureon_ac97_vol_info,
  1427. .get = aureon_ac97_vol_get,
  1428. .put = aureon_ac97_vol_put,
  1429. .private_value = AC97_MIC
  1430. },
  1431. {
  1432. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1433. .name = "Mic Boost (+20dB)",
  1434. .info = aureon_ac97_micboost_info,
  1435. .get = aureon_ac97_micboost_get,
  1436. .put = aureon_ac97_micboost_put
  1437. }
  1438. };
  1439. static struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1440. {
  1441. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1442. .name = "AC97 Playback Switch",
  1443. .info = aureon_ac97_mmute_info,
  1444. .get = aureon_ac97_mmute_get,
  1445. .put = aureon_ac97_mmute_put,
  1446. .private_value = AC97_MASTER
  1447. },
  1448. {
  1449. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1450. .name = "AC97 Playback Volume",
  1451. .info = aureon_ac97_vol_info,
  1452. .get = aureon_ac97_vol_get,
  1453. .put = aureon_ac97_vol_put,
  1454. .private_value = AC97_MASTER|AUREON_AC97_STEREO
  1455. },
  1456. {
  1457. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1458. .name = "CD Playback Switch",
  1459. .info = aureon_ac97_mute_info,
  1460. .get = aureon_ac97_mute_get,
  1461. .put = aureon_ac97_mute_put,
  1462. .private_value = AC97_AUX
  1463. },
  1464. {
  1465. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1466. .name = "CD Playback Volume",
  1467. .info = aureon_ac97_vol_info,
  1468. .get = aureon_ac97_vol_get,
  1469. .put = aureon_ac97_vol_put,
  1470. .private_value = AC97_AUX|AUREON_AC97_STEREO
  1471. },
  1472. {
  1473. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1474. .name = "Phono Playback Switch",
  1475. .info = aureon_ac97_mute_info,
  1476. .get = aureon_ac97_mute_get,
  1477. .put = aureon_ac97_mute_put,
  1478. .private_value = AC97_CD,
  1479. },
  1480. {
  1481. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1482. .name = "Phono Playback Volume",
  1483. .info = aureon_ac97_vol_info,
  1484. .get = aureon_ac97_vol_get,
  1485. .put = aureon_ac97_vol_put,
  1486. .private_value = AC97_CD|AUREON_AC97_STEREO
  1487. },
  1488. {
  1489. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1490. .name = "Line Playback Switch",
  1491. .info = aureon_ac97_mute_info,
  1492. .get = aureon_ac97_mute_get,
  1493. .put = aureon_ac97_mute_put,
  1494. .private_value = AC97_LINE
  1495. },
  1496. {
  1497. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1498. .name = "Line Playback Volume",
  1499. .info = aureon_ac97_vol_info,
  1500. .get = aureon_ac97_vol_get,
  1501. .put = aureon_ac97_vol_put,
  1502. .private_value = AC97_LINE|AUREON_AC97_STEREO
  1503. },
  1504. {
  1505. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1506. .name = "Mic Playback Switch",
  1507. .info = aureon_ac97_mute_info,
  1508. .get = aureon_ac97_mute_get,
  1509. .put = aureon_ac97_mute_put,
  1510. .private_value = AC97_MIC
  1511. },
  1512. {
  1513. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1514. .name = "Mic Playback Volume",
  1515. .info = aureon_ac97_vol_info,
  1516. .get = aureon_ac97_vol_get,
  1517. .put = aureon_ac97_vol_put,
  1518. .private_value = AC97_MIC
  1519. },
  1520. {
  1521. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1522. .name = "Mic Boost (+20dB)",
  1523. .info = aureon_ac97_micboost_info,
  1524. .get = aureon_ac97_micboost_get,
  1525. .put = aureon_ac97_micboost_put
  1526. },
  1527. {
  1528. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1529. .name = "Aux Playback Switch",
  1530. .info = aureon_ac97_mute_info,
  1531. .get = aureon_ac97_mute_get,
  1532. .put = aureon_ac97_mute_put,
  1533. .private_value = AC97_VIDEO,
  1534. },
  1535. {
  1536. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1537. .name = "Aux Playback Volume",
  1538. .info = aureon_ac97_vol_info,
  1539. .get = aureon_ac97_vol_get,
  1540. .put = aureon_ac97_vol_put,
  1541. .private_value = AC97_VIDEO|AUREON_AC97_STEREO
  1542. },
  1543. {
  1544. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1545. .name = "Aux Source",
  1546. .info = aureon_universe_inmux_info,
  1547. .get = aureon_universe_inmux_get,
  1548. .put = aureon_universe_inmux_put
  1549. }
  1550. };
  1551. static struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1552. {
  1553. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1554. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH),
  1555. .info = aureon_cs8415_mute_info,
  1556. .get = aureon_cs8415_mute_get,
  1557. .put = aureon_cs8415_mute_put
  1558. },
  1559. {
  1560. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1561. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Source",
  1562. .info = aureon_cs8415_mux_info,
  1563. .get = aureon_cs8415_mux_get,
  1564. .put = aureon_cs8415_mux_put,
  1565. },
  1566. {
  1567. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1568. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ",CAPTURE,DEFAULT),
  1569. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1570. .info = aureon_cs8415_qsub_info,
  1571. .get = aureon_cs8415_qsub_get,
  1572. },
  1573. {
  1574. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1575. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  1576. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1577. .info = aureon_cs8415_spdif_info,
  1578. .get = aureon_cs8415_mask_get
  1579. },
  1580. {
  1581. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1582. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  1583. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1584. .info = aureon_cs8415_spdif_info,
  1585. .get = aureon_cs8415_spdif_get
  1586. },
  1587. {
  1588. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1589. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Rate",
  1590. .access =SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1591. .info = aureon_cs8415_rate_info,
  1592. .get = aureon_cs8415_rate_get
  1593. }
  1594. };
  1595. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1596. {
  1597. unsigned int i, counts;
  1598. int err;
  1599. counts = ARRAY_SIZE(aureon_dac_controls);
  1600. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1601. counts -= 2; /* no side */
  1602. for (i = 0; i < counts; i++) {
  1603. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1604. if (err < 0)
  1605. return err;
  1606. }
  1607. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1608. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1609. if (err < 0)
  1610. return err;
  1611. }
  1612. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1613. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1614. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1615. if (err < 0)
  1616. return err;
  1617. }
  1618. }
  1619. else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT) {
  1620. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1621. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1622. if (err < 0)
  1623. return err;
  1624. }
  1625. }
  1626. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT) {
  1627. unsigned char id;
  1628. snd_ice1712_save_gpio_status(ice);
  1629. id = aureon_cs8415_get(ice, CS8415_ID);
  1630. if (id != 0x41)
  1631. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1632. else if ((id & 0x0F) != 0x01)
  1633. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1634. else {
  1635. for (i = 0; i< ARRAY_SIZE(cs8415_controls); i++) {
  1636. struct snd_kcontrol *kctl;
  1637. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1638. if (err < 0)
  1639. return err;
  1640. if (i > 1)
  1641. kctl->id.device = ice->pcm->device;
  1642. }
  1643. }
  1644. snd_ice1712_restore_gpio_status(ice);
  1645. }
  1646. return 0;
  1647. }
  1648. /*
  1649. * initialize the chip
  1650. */
  1651. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1652. {
  1653. static unsigned short wm_inits_aureon[] = {
  1654. /* These come first to reduce init pop noise */
  1655. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1656. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1657. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1658. 0x18, 0x000, /* All power-up */
  1659. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1660. 0x17, 0x022, /* 256fs, slave mode */
  1661. 0x00, 0, /* DAC1 analog mute */
  1662. 0x01, 0, /* DAC2 analog mute */
  1663. 0x02, 0, /* DAC3 analog mute */
  1664. 0x03, 0, /* DAC4 analog mute */
  1665. 0x04, 0, /* DAC5 analog mute */
  1666. 0x05, 0, /* DAC6 analog mute */
  1667. 0x06, 0, /* DAC7 analog mute */
  1668. 0x07, 0, /* DAC8 analog mute */
  1669. 0x08, 0x100, /* master analog mute */
  1670. 0x09, 0xff, /* DAC1 digital full */
  1671. 0x0a, 0xff, /* DAC2 digital full */
  1672. 0x0b, 0xff, /* DAC3 digital full */
  1673. 0x0c, 0xff, /* DAC4 digital full */
  1674. 0x0d, 0xff, /* DAC5 digital full */
  1675. 0x0e, 0xff, /* DAC6 digital full */
  1676. 0x0f, 0xff, /* DAC7 digital full */
  1677. 0x10, 0xff, /* DAC8 digital full */
  1678. 0x11, 0x1ff, /* master digital full */
  1679. 0x12, 0x000, /* phase normal */
  1680. 0x13, 0x090, /* unmute DAC L/R */
  1681. 0x14, 0x000, /* all unmute */
  1682. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1683. 0x19, 0x000, /* -12dB ADC/L */
  1684. 0x1a, 0x000, /* -12dB ADC/R */
  1685. (unsigned short)-1
  1686. };
  1687. static unsigned short wm_inits_prodigy[] = {
  1688. /* These come first to reduce init pop noise */
  1689. 0x1b, 0x000, /* ADC Mux */
  1690. 0x1c, 0x009, /* Out Mux1 */
  1691. 0x1d, 0x009, /* Out Mux2 */
  1692. 0x18, 0x000, /* All power-up */
  1693. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1694. 0x17, 0x006, /* 128fs, slave mode */
  1695. 0x00, 0, /* DAC1 analog mute */
  1696. 0x01, 0, /* DAC2 analog mute */
  1697. 0x02, 0, /* DAC3 analog mute */
  1698. 0x03, 0, /* DAC4 analog mute */
  1699. 0x04, 0, /* DAC5 analog mute */
  1700. 0x05, 0, /* DAC6 analog mute */
  1701. 0x06, 0, /* DAC7 analog mute */
  1702. 0x07, 0, /* DAC8 analog mute */
  1703. 0x08, 0x100, /* master analog mute */
  1704. 0x09, 0x7f, /* DAC1 digital full */
  1705. 0x0a, 0x7f, /* DAC2 digital full */
  1706. 0x0b, 0x7f, /* DAC3 digital full */
  1707. 0x0c, 0x7f, /* DAC4 digital full */
  1708. 0x0d, 0x7f, /* DAC5 digital full */
  1709. 0x0e, 0x7f, /* DAC6 digital full */
  1710. 0x0f, 0x7f, /* DAC7 digital full */
  1711. 0x10, 0x7f, /* DAC8 digital full */
  1712. 0x11, 0x1FF, /* master digital full */
  1713. 0x12, 0x000, /* phase normal */
  1714. 0x13, 0x090, /* unmute DAC L/R */
  1715. 0x14, 0x000, /* all unmute */
  1716. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1717. 0x19, 0x000, /* -12dB ADC/L */
  1718. 0x1a, 0x000, /* -12dB ADC/R */
  1719. (unsigned short)-1
  1720. };
  1721. static unsigned short cs_inits[] = {
  1722. 0x0441, /* RUN */
  1723. 0x0180, /* no mute, OMCK output on RMCK pin */
  1724. 0x0201, /* S/PDIF source on RXP1 */
  1725. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1726. (unsigned short)-1
  1727. };
  1728. unsigned int tmp;
  1729. unsigned short *p;
  1730. int err, i;
  1731. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1732. ice->num_total_dacs = 6;
  1733. ice->num_total_adcs = 2;
  1734. } else {
  1735. /* aureon 7.1 and prodigy 7.1 */
  1736. ice->num_total_dacs = 8;
  1737. ice->num_total_adcs = 2;
  1738. }
  1739. /* to remeber the register values of CS8415 */
  1740. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1741. if (! ice->akm)
  1742. return -ENOMEM;
  1743. ice->akm_codecs = 1;
  1744. if ((err = aureon_ac97_init(ice)) != 0)
  1745. return err;
  1746. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1747. /* reset the wm codec as the SPI mode */
  1748. snd_ice1712_save_gpio_status(ice);
  1749. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1750. tmp = snd_ice1712_gpio_read(ice);
  1751. tmp &= ~AUREON_WM_RESET;
  1752. snd_ice1712_gpio_write(ice, tmp);
  1753. udelay(1);
  1754. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1755. snd_ice1712_gpio_write(ice, tmp);
  1756. udelay(1);
  1757. tmp |= AUREON_WM_RESET;
  1758. snd_ice1712_gpio_write(ice, tmp);
  1759. udelay(1);
  1760. /* initialize WM8770 codec */
  1761. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1762. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT)
  1763. p = wm_inits_prodigy;
  1764. else
  1765. p = wm_inits_aureon;
  1766. for (; *p != (unsigned short)-1; p += 2)
  1767. wm_put(ice, p[0], p[1]);
  1768. /* initialize CS8415A codec */
  1769. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT) {
  1770. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1771. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1772. ice->spec.aureon.cs8415_mux = 1;
  1773. aureon_set_headphone_amp(ice, 1);
  1774. }
  1775. snd_ice1712_restore_gpio_status(ice);
  1776. /* initialize PCA9554 pin directions & set default input*/
  1777. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1778. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1779. ice->spec.aureon.master[0] = WM_VOL_MUTE;
  1780. ice->spec.aureon.master[1] = WM_VOL_MUTE;
  1781. for (i = 0; i < ice->num_total_dacs; i++) {
  1782. ice->spec.aureon.vol[i] = WM_VOL_MUTE;
  1783. wm_set_vol(ice, i, ice->spec.aureon.vol[i], ice->spec.aureon.master[i % 2]);
  1784. }
  1785. return 0;
  1786. }
  1787. /*
  1788. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1789. * hence the driver needs to sets up it properly.
  1790. */
  1791. static unsigned char aureon51_eeprom[] __devinitdata = {
  1792. 0x0a, /* SYSCONF: clock 512, spdif-in/ADC, 3DACs */
  1793. 0x80, /* ACLINK: I2S */
  1794. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1795. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1796. 0xff, /* GPIO_DIR */
  1797. 0xff, /* GPIO_DIR1 */
  1798. 0x5f, /* GPIO_DIR2 */
  1799. 0x00, /* GPIO_MASK */
  1800. 0x00, /* GPIO_MASK1 */
  1801. 0x00, /* GPIO_MASK2 */
  1802. 0x00, /* GPIO_STATE */
  1803. 0x00, /* GPIO_STATE1 */
  1804. 0x00, /* GPIO_STATE2 */
  1805. };
  1806. static unsigned char aureon71_eeprom[] __devinitdata = {
  1807. 0x0b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  1808. 0x80, /* ACLINK: I2S */
  1809. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1810. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1811. 0xff, /* GPIO_DIR */
  1812. 0xff, /* GPIO_DIR1 */
  1813. 0x5f, /* GPIO_DIR2 */
  1814. 0x00, /* GPIO_MASK */
  1815. 0x00, /* GPIO_MASK1 */
  1816. 0x00, /* GPIO_MASK2 */
  1817. 0x00, /* GPIO_STATE */
  1818. 0x00, /* GPIO_STATE1 */
  1819. 0x00, /* GPIO_STATE2 */
  1820. };
  1821. static unsigned char prodigy71_eeprom[] __devinitdata = {
  1822. 0x0b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  1823. 0x80, /* ACLINK: I2S */
  1824. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1825. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1826. 0xff, /* GPIO_DIR */
  1827. 0xff, /* GPIO_DIR1 */
  1828. 0x5f, /* GPIO_DIR2 */
  1829. 0x00, /* GPIO_MASK */
  1830. 0x00, /* GPIO_MASK1 */
  1831. 0x00, /* GPIO_MASK2 */
  1832. 0x00, /* GPIO_STATE */
  1833. 0x00, /* GPIO_STATE1 */
  1834. 0x00, /* GPIO_STATE2 */
  1835. };
  1836. static unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1837. 0x0b, /* SYSCINF: clock 512, spdif-in/ADC, 4DACs */
  1838. 0x80, /* ACLINK: I2S */
  1839. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1840. 0xc3, /* SPDUF: out-en, out-int */
  1841. 0x00, /* GPIO_DIR */
  1842. 0x07, /* GPIO_DIR1 */
  1843. 0x00, /* GPIO_DIR2 */
  1844. 0xff, /* GPIO_MASK */
  1845. 0xf8, /* GPIO_MASK1 */
  1846. 0xff, /* GPIO_MASK2 */
  1847. 0x00, /* GPIO_STATE */
  1848. 0x00, /* GPIO_STATE1 */
  1849. 0x00, /* GPIO_STATE2 */
  1850. };
  1851. /* entry point */
  1852. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1853. {
  1854. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1855. .name = "Terratec Aureon 5.1-Sky",
  1856. .model = "aureon51",
  1857. .chip_init = aureon_init,
  1858. .build_controls = aureon_add_controls,
  1859. .eeprom_size = sizeof(aureon51_eeprom),
  1860. .eeprom_data = aureon51_eeprom,
  1861. .driver = "Aureon51",
  1862. },
  1863. {
  1864. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1865. .name = "Terratec Aureon 7.1-Space",
  1866. .model = "aureon71",
  1867. .chip_init = aureon_init,
  1868. .build_controls = aureon_add_controls,
  1869. .eeprom_size = sizeof(aureon71_eeprom),
  1870. .eeprom_data = aureon71_eeprom,
  1871. .driver = "Aureon71",
  1872. },
  1873. {
  1874. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1875. .name = "Terratec Aureon 7.1-Universe",
  1876. .model = "universe",
  1877. .chip_init = aureon_init,
  1878. .build_controls = aureon_add_controls,
  1879. .eeprom_size = sizeof(aureon71_eeprom),
  1880. .eeprom_data = aureon71_eeprom,
  1881. .driver = "Aureon71Universe",
  1882. },
  1883. {
  1884. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  1885. .name = "Audiotrak Prodigy 7.1",
  1886. .model = "prodigy71",
  1887. .chip_init = aureon_init,
  1888. .build_controls = aureon_add_controls,
  1889. .eeprom_size = sizeof(prodigy71_eeprom),
  1890. .eeprom_data = prodigy71_eeprom,
  1891. .driver = "Prodigy71", /* should be identical with Aureon71 */
  1892. },
  1893. {
  1894. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  1895. .name = "Audiotrak Prodigy 7.1 LT",
  1896. .model = "prodigy71lt",
  1897. .chip_init = aureon_init,
  1898. .build_controls = aureon_add_controls,
  1899. .eeprom_size = sizeof(prodigy71lt_eeprom),
  1900. .eeprom_data = prodigy71lt_eeprom,
  1901. .driver = "Prodigy71LT",
  1902. },
  1903. { } /* terminator */
  1904. };