emufx.c 89 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Creative Labs, Inc.
  4. * Routines for effect processor FX8010
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <sound/driver.h>
  28. #include <linux/pci.h>
  29. #include <linux/capability.h>
  30. #include <linux/delay.h>
  31. #include <linux/slab.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/init.h>
  34. #include <linux/mutex.h>
  35. #include <sound/core.h>
  36. #include <sound/emu10k1.h>
  37. #if 0 /* for testing purposes - digital out -> capture */
  38. #define EMU10K1_CAPTURE_DIGITAL_OUT
  39. #endif
  40. #if 0 /* for testing purposes - set S/PDIF to AC3 output */
  41. #define EMU10K1_SET_AC3_IEC958
  42. #endif
  43. #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
  44. #define EMU10K1_CENTER_LFE_FROM_FRONT
  45. #endif
  46. /*
  47. * Tables
  48. */
  49. static char *fxbuses[16] = {
  50. /* 0x00 */ "PCM Left",
  51. /* 0x01 */ "PCM Right",
  52. /* 0x02 */ "PCM Surround Left",
  53. /* 0x03 */ "PCM Surround Right",
  54. /* 0x04 */ "MIDI Left",
  55. /* 0x05 */ "MIDI Right",
  56. /* 0x06 */ "Center",
  57. /* 0x07 */ "LFE",
  58. /* 0x08 */ NULL,
  59. /* 0x09 */ NULL,
  60. /* 0x0a */ NULL,
  61. /* 0x0b */ NULL,
  62. /* 0x0c */ "MIDI Reverb",
  63. /* 0x0d */ "MIDI Chorus",
  64. /* 0x0e */ NULL,
  65. /* 0x0f */ NULL
  66. };
  67. static char *creative_ins[16] = {
  68. /* 0x00 */ "AC97 Left",
  69. /* 0x01 */ "AC97 Right",
  70. /* 0x02 */ "TTL IEC958 Left",
  71. /* 0x03 */ "TTL IEC958 Right",
  72. /* 0x04 */ "Zoom Video Left",
  73. /* 0x05 */ "Zoom Video Right",
  74. /* 0x06 */ "Optical IEC958 Left",
  75. /* 0x07 */ "Optical IEC958 Right",
  76. /* 0x08 */ "Line/Mic 1 Left",
  77. /* 0x09 */ "Line/Mic 1 Right",
  78. /* 0x0a */ "Coaxial IEC958 Left",
  79. /* 0x0b */ "Coaxial IEC958 Right",
  80. /* 0x0c */ "Line/Mic 2 Left",
  81. /* 0x0d */ "Line/Mic 2 Right",
  82. /* 0x0e */ NULL,
  83. /* 0x0f */ NULL
  84. };
  85. static char *audigy_ins[16] = {
  86. /* 0x00 */ "AC97 Left",
  87. /* 0x01 */ "AC97 Right",
  88. /* 0x02 */ "Audigy CD Left",
  89. /* 0x03 */ "Audigy CD Right",
  90. /* 0x04 */ "Optical IEC958 Left",
  91. /* 0x05 */ "Optical IEC958 Right",
  92. /* 0x06 */ NULL,
  93. /* 0x07 */ NULL,
  94. /* 0x08 */ "Line/Mic 2 Left",
  95. /* 0x09 */ "Line/Mic 2 Right",
  96. /* 0x0a */ "SPDIF Left",
  97. /* 0x0b */ "SPDIF Right",
  98. /* 0x0c */ "Aux2 Left",
  99. /* 0x0d */ "Aux2 Right",
  100. /* 0x0e */ NULL,
  101. /* 0x0f */ NULL
  102. };
  103. static char *creative_outs[32] = {
  104. /* 0x00 */ "AC97 Left",
  105. /* 0x01 */ "AC97 Right",
  106. /* 0x02 */ "Optical IEC958 Left",
  107. /* 0x03 */ "Optical IEC958 Right",
  108. /* 0x04 */ "Center",
  109. /* 0x05 */ "LFE",
  110. /* 0x06 */ "Headphone Left",
  111. /* 0x07 */ "Headphone Right",
  112. /* 0x08 */ "Surround Left",
  113. /* 0x09 */ "Surround Right",
  114. /* 0x0a */ "PCM Capture Left",
  115. /* 0x0b */ "PCM Capture Right",
  116. /* 0x0c */ "MIC Capture",
  117. /* 0x0d */ "AC97 Surround Left",
  118. /* 0x0e */ "AC97 Surround Right",
  119. /* 0x0f */ NULL,
  120. /* 0x10 */ NULL,
  121. /* 0x11 */ "Analog Center",
  122. /* 0x12 */ "Analog LFE",
  123. /* 0x13 */ NULL,
  124. /* 0x14 */ NULL,
  125. /* 0x15 */ NULL,
  126. /* 0x16 */ NULL,
  127. /* 0x17 */ NULL,
  128. /* 0x18 */ NULL,
  129. /* 0x19 */ NULL,
  130. /* 0x1a */ NULL,
  131. /* 0x1b */ NULL,
  132. /* 0x1c */ NULL,
  133. /* 0x1d */ NULL,
  134. /* 0x1e */ NULL,
  135. /* 0x1f */ NULL,
  136. };
  137. static char *audigy_outs[32] = {
  138. /* 0x00 */ "Digital Front Left",
  139. /* 0x01 */ "Digital Front Right",
  140. /* 0x02 */ "Digital Center",
  141. /* 0x03 */ "Digital LEF",
  142. /* 0x04 */ "Headphone Left",
  143. /* 0x05 */ "Headphone Right",
  144. /* 0x06 */ "Digital Rear Left",
  145. /* 0x07 */ "Digital Rear Right",
  146. /* 0x08 */ "Front Left",
  147. /* 0x09 */ "Front Right",
  148. /* 0x0a */ "Center",
  149. /* 0x0b */ "LFE",
  150. /* 0x0c */ NULL,
  151. /* 0x0d */ NULL,
  152. /* 0x0e */ "Rear Left",
  153. /* 0x0f */ "Rear Right",
  154. /* 0x10 */ "AC97 Front Left",
  155. /* 0x11 */ "AC97 Front Right",
  156. /* 0x12 */ "ADC Caputre Left",
  157. /* 0x13 */ "ADC Capture Right",
  158. /* 0x14 */ NULL,
  159. /* 0x15 */ NULL,
  160. /* 0x16 */ NULL,
  161. /* 0x17 */ NULL,
  162. /* 0x18 */ NULL,
  163. /* 0x19 */ NULL,
  164. /* 0x1a */ NULL,
  165. /* 0x1b */ NULL,
  166. /* 0x1c */ NULL,
  167. /* 0x1d */ NULL,
  168. /* 0x1e */ NULL,
  169. /* 0x1f */ NULL,
  170. };
  171. static const u32 bass_table[41][5] = {
  172. { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
  173. { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
  174. { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
  175. { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
  176. { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
  177. { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
  178. { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
  179. { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
  180. { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
  181. { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
  182. { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
  183. { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
  184. { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
  185. { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
  186. { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
  187. { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
  188. { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
  189. { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
  190. { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
  191. { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
  192. { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
  193. { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
  194. { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
  195. { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
  196. { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
  197. { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
  198. { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
  199. { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
  200. { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
  201. { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
  202. { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
  203. { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
  204. { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
  205. { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
  206. { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
  207. { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
  208. { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
  209. { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
  210. { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
  211. { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
  212. { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
  213. };
  214. static const u32 treble_table[41][5] = {
  215. { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
  216. { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
  217. { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
  218. { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
  219. { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
  220. { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
  221. { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
  222. { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
  223. { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
  224. { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
  225. { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
  226. { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
  227. { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
  228. { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
  229. { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
  230. { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
  231. { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
  232. { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
  233. { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
  234. { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
  235. { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
  236. { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
  237. { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
  238. { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
  239. { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
  240. { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
  241. { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
  242. { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
  243. { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
  244. { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
  245. { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
  246. { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
  247. { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
  248. { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
  249. { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
  250. { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
  251. { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
  252. { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
  253. { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
  254. { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
  255. { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
  256. };
  257. static const u32 db_table[101] = {
  258. 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
  259. 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
  260. 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
  261. 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
  262. 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
  263. 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
  264. 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
  265. 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
  266. 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
  267. 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
  268. 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
  269. 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
  270. 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
  271. 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
  272. 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
  273. 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
  274. 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
  275. 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
  276. 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
  277. 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
  278. 0x7fffffff,
  279. };
  280. static const u32 onoff_table[2] = {
  281. 0x00000000, 0x00000001
  282. };
  283. /*
  284. */
  285. static inline mm_segment_t snd_enter_user(void)
  286. {
  287. mm_segment_t fs = get_fs();
  288. set_fs(get_ds());
  289. return fs;
  290. }
  291. static inline void snd_leave_user(mm_segment_t fs)
  292. {
  293. set_fs(fs);
  294. }
  295. /*
  296. * controls
  297. */
  298. static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  299. {
  300. struct snd_emu10k1_fx8010_ctl *ctl =
  301. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  302. if (ctl->min == 0 && ctl->max == 1)
  303. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  304. else
  305. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  306. uinfo->count = ctl->vcount;
  307. uinfo->value.integer.min = ctl->min;
  308. uinfo->value.integer.max = ctl->max;
  309. return 0;
  310. }
  311. static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  312. {
  313. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  314. struct snd_emu10k1_fx8010_ctl *ctl =
  315. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  316. unsigned long flags;
  317. unsigned int i;
  318. spin_lock_irqsave(&emu->reg_lock, flags);
  319. for (i = 0; i < ctl->vcount; i++)
  320. ucontrol->value.integer.value[i] = ctl->value[i];
  321. spin_unlock_irqrestore(&emu->reg_lock, flags);
  322. return 0;
  323. }
  324. static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  325. {
  326. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  327. struct snd_emu10k1_fx8010_ctl *ctl =
  328. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  329. unsigned long flags;
  330. unsigned int nval, val;
  331. unsigned int i, j;
  332. int change = 0;
  333. spin_lock_irqsave(&emu->reg_lock, flags);
  334. for (i = 0; i < ctl->vcount; i++) {
  335. nval = ucontrol->value.integer.value[i];
  336. if (nval < ctl->min)
  337. nval = ctl->min;
  338. if (nval > ctl->max)
  339. nval = ctl->max;
  340. if (nval != ctl->value[i])
  341. change = 1;
  342. val = ctl->value[i] = nval;
  343. switch (ctl->translation) {
  344. case EMU10K1_GPR_TRANSLATION_NONE:
  345. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val);
  346. break;
  347. case EMU10K1_GPR_TRANSLATION_TABLE100:
  348. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]);
  349. break;
  350. case EMU10K1_GPR_TRANSLATION_BASS:
  351. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  352. change = -EIO;
  353. goto __error;
  354. }
  355. for (j = 0; j < 5; j++)
  356. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]);
  357. break;
  358. case EMU10K1_GPR_TRANSLATION_TREBLE:
  359. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  360. change = -EIO;
  361. goto __error;
  362. }
  363. for (j = 0; j < 5; j++)
  364. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]);
  365. break;
  366. case EMU10K1_GPR_TRANSLATION_ONOFF:
  367. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]);
  368. break;
  369. }
  370. }
  371. __error:
  372. spin_unlock_irqrestore(&emu->reg_lock, flags);
  373. return change;
  374. }
  375. /*
  376. * Interrupt handler
  377. */
  378. static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu)
  379. {
  380. struct snd_emu10k1_fx8010_irq *irq, *nirq;
  381. irq = emu->fx8010.irq_handlers;
  382. while (irq) {
  383. nirq = irq->next; /* irq ptr can be removed from list */
  384. if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) {
  385. if (irq->handler)
  386. irq->handler(emu, irq->private_data);
  387. snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1);
  388. }
  389. irq = nirq;
  390. }
  391. }
  392. int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
  393. snd_fx8010_irq_handler_t *handler,
  394. unsigned char gpr_running,
  395. void *private_data,
  396. struct snd_emu10k1_fx8010_irq **r_irq)
  397. {
  398. struct snd_emu10k1_fx8010_irq *irq;
  399. unsigned long flags;
  400. irq = kmalloc(sizeof(*irq), GFP_ATOMIC);
  401. if (irq == NULL)
  402. return -ENOMEM;
  403. irq->handler = handler;
  404. irq->gpr_running = gpr_running;
  405. irq->private_data = private_data;
  406. irq->next = NULL;
  407. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  408. if (emu->fx8010.irq_handlers == NULL) {
  409. emu->fx8010.irq_handlers = irq;
  410. emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt;
  411. snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE);
  412. } else {
  413. irq->next = emu->fx8010.irq_handlers;
  414. emu->fx8010.irq_handlers = irq;
  415. }
  416. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  417. if (r_irq)
  418. *r_irq = irq;
  419. return 0;
  420. }
  421. int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
  422. struct snd_emu10k1_fx8010_irq *irq)
  423. {
  424. struct snd_emu10k1_fx8010_irq *tmp;
  425. unsigned long flags;
  426. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  427. if ((tmp = emu->fx8010.irq_handlers) == irq) {
  428. emu->fx8010.irq_handlers = tmp->next;
  429. if (emu->fx8010.irq_handlers == NULL) {
  430. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  431. emu->dsp_interrupt = NULL;
  432. }
  433. } else {
  434. while (tmp && tmp->next != irq)
  435. tmp = tmp->next;
  436. if (tmp)
  437. tmp->next = tmp->next->next;
  438. }
  439. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  440. kfree(irq);
  441. return 0;
  442. }
  443. /*************************************************************************
  444. * EMU10K1 effect manager
  445. *************************************************************************/
  446. static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode,
  447. unsigned int *ptr,
  448. u32 op, u32 r, u32 a, u32 x, u32 y)
  449. {
  450. u_int32_t *code;
  451. snd_assert(*ptr < 512, return);
  452. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  453. set_bit(*ptr, icode->code_valid);
  454. code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff);
  455. code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff);
  456. (*ptr)++;
  457. }
  458. #define OP(icode, ptr, op, r, a, x, y) \
  459. snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
  460. static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode,
  461. unsigned int *ptr,
  462. u32 op, u32 r, u32 a, u32 x, u32 y)
  463. {
  464. u_int32_t *code;
  465. snd_assert(*ptr < 1024, return);
  466. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  467. set_bit(*ptr, icode->code_valid);
  468. code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff);
  469. code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff);
  470. (*ptr)++;
  471. }
  472. #define A_OP(icode, ptr, op, r, a, x, y) \
  473. snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
  474. static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data)
  475. {
  476. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  477. snd_emu10k1_ptr_write(emu, pc, 0, data);
  478. }
  479. unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc)
  480. {
  481. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  482. return snd_emu10k1_ptr_read(emu, pc, 0);
  483. }
  484. static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu,
  485. struct snd_emu10k1_fx8010_code *icode)
  486. {
  487. int gpr;
  488. u32 val;
  489. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  490. if (!test_bit(gpr, icode->gpr_valid))
  491. continue;
  492. if (get_user(val, &icode->gpr_map[gpr]))
  493. return -EFAULT;
  494. snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val);
  495. }
  496. return 0;
  497. }
  498. static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu,
  499. struct snd_emu10k1_fx8010_code *icode)
  500. {
  501. int gpr;
  502. u32 val;
  503. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  504. set_bit(gpr, icode->gpr_valid);
  505. val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0);
  506. if (put_user(val, &icode->gpr_map[gpr]))
  507. return -EFAULT;
  508. }
  509. return 0;
  510. }
  511. static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu,
  512. struct snd_emu10k1_fx8010_code *icode)
  513. {
  514. int tram;
  515. u32 addr, val;
  516. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  517. if (!test_bit(tram, icode->tram_valid))
  518. continue;
  519. if (get_user(val, &icode->tram_data_map[tram]) ||
  520. get_user(addr, &icode->tram_addr_map[tram]))
  521. return -EFAULT;
  522. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val);
  523. if (!emu->audigy) {
  524. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr);
  525. } else {
  526. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12);
  527. snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20);
  528. }
  529. }
  530. return 0;
  531. }
  532. static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu,
  533. struct snd_emu10k1_fx8010_code *icode)
  534. {
  535. int tram;
  536. u32 val, addr;
  537. memset(icode->tram_valid, 0, sizeof(icode->tram_valid));
  538. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  539. set_bit(tram, icode->tram_valid);
  540. val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0);
  541. if (!emu->audigy) {
  542. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0);
  543. } else {
  544. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12;
  545. addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20;
  546. }
  547. if (put_user(val, &icode->tram_data_map[tram]) ||
  548. put_user(addr, &icode->tram_addr_map[tram]))
  549. return -EFAULT;
  550. }
  551. return 0;
  552. }
  553. static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu,
  554. struct snd_emu10k1_fx8010_code *icode)
  555. {
  556. u32 pc, lo, hi;
  557. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  558. if (!test_bit(pc / 2, icode->code_valid))
  559. continue;
  560. if (get_user(lo, &icode->code[pc + 0]) ||
  561. get_user(hi, &icode->code[pc + 1]))
  562. return -EFAULT;
  563. snd_emu10k1_efx_write(emu, pc + 0, lo);
  564. snd_emu10k1_efx_write(emu, pc + 1, hi);
  565. }
  566. return 0;
  567. }
  568. static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu,
  569. struct snd_emu10k1_fx8010_code *icode)
  570. {
  571. u32 pc;
  572. memset(icode->code_valid, 0, sizeof(icode->code_valid));
  573. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  574. set_bit(pc / 2, icode->code_valid);
  575. if (put_user(snd_emu10k1_efx_read(emu, pc + 0), &icode->code[pc + 0]))
  576. return -EFAULT;
  577. if (put_user(snd_emu10k1_efx_read(emu, pc + 1), &icode->code[pc + 1]))
  578. return -EFAULT;
  579. }
  580. return 0;
  581. }
  582. static struct snd_emu10k1_fx8010_ctl *
  583. snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu, struct snd_ctl_elem_id *id)
  584. {
  585. struct snd_emu10k1_fx8010_ctl *ctl;
  586. struct snd_kcontrol *kcontrol;
  587. struct list_head *list;
  588. list_for_each(list, &emu->fx8010.gpr_ctl) {
  589. ctl = emu10k1_gpr_ctl(list);
  590. kcontrol = ctl->kcontrol;
  591. if (kcontrol->id.iface == id->iface &&
  592. !strcmp(kcontrol->id.name, id->name) &&
  593. kcontrol->id.index == id->index)
  594. return ctl;
  595. }
  596. return NULL;
  597. }
  598. static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu,
  599. struct snd_emu10k1_fx8010_code *icode)
  600. {
  601. unsigned int i;
  602. struct snd_ctl_elem_id __user *_id;
  603. struct snd_ctl_elem_id id;
  604. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  605. struct snd_emu10k1_fx8010_control_gpr *gctl;
  606. int err;
  607. for (i = 0, _id = icode->gpr_del_controls;
  608. i < icode->gpr_del_control_count; i++, _id++) {
  609. if (copy_from_user(&id, _id, sizeof(id)))
  610. return -EFAULT;
  611. if (snd_emu10k1_look_for_ctl(emu, &id) == NULL)
  612. return -ENOENT;
  613. }
  614. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  615. if (! gctl)
  616. return -ENOMEM;
  617. err = 0;
  618. for (i = 0, _gctl = icode->gpr_add_controls;
  619. i < icode->gpr_add_control_count; i++, _gctl++) {
  620. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  621. err = -EFAULT;
  622. goto __error;
  623. }
  624. if (snd_emu10k1_look_for_ctl(emu, &gctl->id))
  625. continue;
  626. down_read(&emu->card->controls_rwsem);
  627. if (snd_ctl_find_id(emu->card, &gctl->id) != NULL) {
  628. up_read(&emu->card->controls_rwsem);
  629. err = -EEXIST;
  630. goto __error;
  631. }
  632. up_read(&emu->card->controls_rwsem);
  633. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  634. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  635. err = -EINVAL;
  636. goto __error;
  637. }
  638. }
  639. for (i = 0, _gctl = icode->gpr_list_controls;
  640. i < icode->gpr_list_control_count; i++, _gctl++) {
  641. /* FIXME: we need to check the WRITE access */
  642. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  643. err = -EFAULT;
  644. goto __error;
  645. }
  646. }
  647. __error:
  648. kfree(gctl);
  649. return err;
  650. }
  651. static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl)
  652. {
  653. struct snd_emu10k1_fx8010_ctl *ctl;
  654. ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value;
  655. kctl->private_value = 0;
  656. list_del(&ctl->list);
  657. kfree(ctl);
  658. }
  659. static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu,
  660. struct snd_emu10k1_fx8010_code *icode)
  661. {
  662. unsigned int i, j;
  663. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  664. struct snd_emu10k1_fx8010_control_gpr *gctl;
  665. struct snd_emu10k1_fx8010_ctl *ctl, *nctl;
  666. struct snd_kcontrol_new knew;
  667. struct snd_kcontrol *kctl;
  668. struct snd_ctl_elem_value *val;
  669. int err = 0;
  670. val = kmalloc(sizeof(*val), GFP_KERNEL);
  671. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  672. nctl = kmalloc(sizeof(*nctl), GFP_KERNEL);
  673. if (!val || !gctl || !nctl) {
  674. err = -ENOMEM;
  675. goto __error;
  676. }
  677. for (i = 0, _gctl = icode->gpr_add_controls;
  678. i < icode->gpr_add_control_count; i++, _gctl++) {
  679. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  680. err = -EFAULT;
  681. goto __error;
  682. }
  683. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  684. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  685. err = -EINVAL;
  686. goto __error;
  687. }
  688. if (! gctl->id.name[0]) {
  689. err = -EINVAL;
  690. goto __error;
  691. }
  692. ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id);
  693. memset(&knew, 0, sizeof(knew));
  694. knew.iface = gctl->id.iface;
  695. knew.name = gctl->id.name;
  696. knew.index = gctl->id.index;
  697. knew.device = gctl->id.device;
  698. knew.subdevice = gctl->id.subdevice;
  699. knew.info = snd_emu10k1_gpr_ctl_info;
  700. knew.get = snd_emu10k1_gpr_ctl_get;
  701. knew.put = snd_emu10k1_gpr_ctl_put;
  702. memset(nctl, 0, sizeof(*nctl));
  703. nctl->vcount = gctl->vcount;
  704. nctl->count = gctl->count;
  705. for (j = 0; j < 32; j++) {
  706. nctl->gpr[j] = gctl->gpr[j];
  707. nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
  708. val->value.integer.value[j] = gctl->value[j];
  709. }
  710. nctl->min = gctl->min;
  711. nctl->max = gctl->max;
  712. nctl->translation = gctl->translation;
  713. if (ctl == NULL) {
  714. ctl = kmalloc(sizeof(*ctl), GFP_KERNEL);
  715. if (ctl == NULL) {
  716. err = -ENOMEM;
  717. goto __error;
  718. }
  719. knew.private_value = (unsigned long)ctl;
  720. *ctl = *nctl;
  721. if ((err = snd_ctl_add(emu->card, kctl = snd_ctl_new1(&knew, emu))) < 0) {
  722. kfree(ctl);
  723. goto __error;
  724. }
  725. kctl->private_free = snd_emu10k1_ctl_private_free;
  726. ctl->kcontrol = kctl;
  727. list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl);
  728. } else {
  729. /* overwrite */
  730. nctl->list = ctl->list;
  731. nctl->kcontrol = ctl->kcontrol;
  732. *ctl = *nctl;
  733. snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
  734. SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
  735. }
  736. snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
  737. }
  738. __error:
  739. kfree(nctl);
  740. kfree(gctl);
  741. kfree(val);
  742. return err;
  743. }
  744. static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu,
  745. struct snd_emu10k1_fx8010_code *icode)
  746. {
  747. unsigned int i;
  748. struct snd_ctl_elem_id id;
  749. struct snd_ctl_elem_id __user *_id;
  750. struct snd_emu10k1_fx8010_ctl *ctl;
  751. struct snd_card *card = emu->card;
  752. for (i = 0, _id = icode->gpr_del_controls;
  753. i < icode->gpr_del_control_count; i++, _id++) {
  754. if (copy_from_user(&id, _id, sizeof(id)))
  755. return -EFAULT;
  756. down_write(&card->controls_rwsem);
  757. ctl = snd_emu10k1_look_for_ctl(emu, &id);
  758. if (ctl)
  759. snd_ctl_remove(card, ctl->kcontrol);
  760. up_write(&card->controls_rwsem);
  761. }
  762. return 0;
  763. }
  764. static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu,
  765. struct snd_emu10k1_fx8010_code *icode)
  766. {
  767. unsigned int i = 0, j;
  768. unsigned int total = 0;
  769. struct snd_emu10k1_fx8010_control_gpr *gctl;
  770. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  771. struct snd_emu10k1_fx8010_ctl *ctl;
  772. struct snd_ctl_elem_id *id;
  773. struct list_head *list;
  774. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  775. if (! gctl)
  776. return -ENOMEM;
  777. _gctl = icode->gpr_list_controls;
  778. list_for_each(list, &emu->fx8010.gpr_ctl) {
  779. ctl = emu10k1_gpr_ctl(list);
  780. total++;
  781. if (_gctl && i < icode->gpr_list_control_count) {
  782. memset(gctl, 0, sizeof(*gctl));
  783. id = &ctl->kcontrol->id;
  784. gctl->id.iface = id->iface;
  785. strlcpy(gctl->id.name, id->name, sizeof(gctl->id.name));
  786. gctl->id.index = id->index;
  787. gctl->id.device = id->device;
  788. gctl->id.subdevice = id->subdevice;
  789. gctl->vcount = ctl->vcount;
  790. gctl->count = ctl->count;
  791. for (j = 0; j < 32; j++) {
  792. gctl->gpr[j] = ctl->gpr[j];
  793. gctl->value[j] = ctl->value[j];
  794. }
  795. gctl->min = ctl->min;
  796. gctl->max = ctl->max;
  797. gctl->translation = ctl->translation;
  798. if (copy_to_user(_gctl, gctl, sizeof(*gctl))) {
  799. kfree(gctl);
  800. return -EFAULT;
  801. }
  802. _gctl++;
  803. i++;
  804. }
  805. }
  806. icode->gpr_list_control_total = total;
  807. kfree(gctl);
  808. return 0;
  809. }
  810. static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu,
  811. struct snd_emu10k1_fx8010_code *icode)
  812. {
  813. int err = 0;
  814. mutex_lock(&emu->fx8010.lock);
  815. if ((err = snd_emu10k1_verify_controls(emu, icode)) < 0)
  816. goto __error;
  817. strlcpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name));
  818. /* stop FX processor - this may be dangerous, but it's better to miss
  819. some samples than generate wrong ones - [jk] */
  820. if (emu->audigy)
  821. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  822. else
  823. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  824. /* ok, do the main job */
  825. if ((err = snd_emu10k1_del_controls(emu, icode)) < 0 ||
  826. (err = snd_emu10k1_gpr_poke(emu, icode)) < 0 ||
  827. (err = snd_emu10k1_tram_poke(emu, icode)) < 0 ||
  828. (err = snd_emu10k1_code_poke(emu, icode)) < 0 ||
  829. (err = snd_emu10k1_add_controls(emu, icode)) < 0)
  830. goto __error;
  831. /* start FX processor when the DSP code is updated */
  832. if (emu->audigy)
  833. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  834. else
  835. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  836. __error:
  837. mutex_unlock(&emu->fx8010.lock);
  838. return err;
  839. }
  840. static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu,
  841. struct snd_emu10k1_fx8010_code *icode)
  842. {
  843. int err;
  844. mutex_lock(&emu->fx8010.lock);
  845. strlcpy(icode->name, emu->fx8010.name, sizeof(icode->name));
  846. /* ok, do the main job */
  847. err = snd_emu10k1_gpr_peek(emu, icode);
  848. if (err >= 0)
  849. err = snd_emu10k1_tram_peek(emu, icode);
  850. if (err >= 0)
  851. err = snd_emu10k1_code_peek(emu, icode);
  852. if (err >= 0)
  853. err = snd_emu10k1_list_controls(emu, icode);
  854. mutex_unlock(&emu->fx8010.lock);
  855. return err;
  856. }
  857. static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu,
  858. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  859. {
  860. unsigned int i;
  861. int err = 0;
  862. struct snd_emu10k1_fx8010_pcm *pcm;
  863. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  864. return -EINVAL;
  865. if (ipcm->channels > 32)
  866. return -EINVAL;
  867. pcm = &emu->fx8010.pcm[ipcm->substream];
  868. mutex_lock(&emu->fx8010.lock);
  869. spin_lock_irq(&emu->reg_lock);
  870. if (pcm->opened) {
  871. err = -EBUSY;
  872. goto __error;
  873. }
  874. if (ipcm->channels == 0) { /* remove */
  875. pcm->valid = 0;
  876. } else {
  877. /* FIXME: we need to add universal code to the PCM transfer routine */
  878. if (ipcm->channels != 2) {
  879. err = -EINVAL;
  880. goto __error;
  881. }
  882. pcm->valid = 1;
  883. pcm->opened = 0;
  884. pcm->channels = ipcm->channels;
  885. pcm->tram_start = ipcm->tram_start;
  886. pcm->buffer_size = ipcm->buffer_size;
  887. pcm->gpr_size = ipcm->gpr_size;
  888. pcm->gpr_count = ipcm->gpr_count;
  889. pcm->gpr_tmpcount = ipcm->gpr_tmpcount;
  890. pcm->gpr_ptr = ipcm->gpr_ptr;
  891. pcm->gpr_trigger = ipcm->gpr_trigger;
  892. pcm->gpr_running = ipcm->gpr_running;
  893. for (i = 0; i < pcm->channels; i++)
  894. pcm->etram[i] = ipcm->etram[i];
  895. }
  896. __error:
  897. spin_unlock_irq(&emu->reg_lock);
  898. mutex_unlock(&emu->fx8010.lock);
  899. return err;
  900. }
  901. static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu,
  902. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  903. {
  904. unsigned int i;
  905. int err = 0;
  906. struct snd_emu10k1_fx8010_pcm *pcm;
  907. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  908. return -EINVAL;
  909. pcm = &emu->fx8010.pcm[ipcm->substream];
  910. mutex_lock(&emu->fx8010.lock);
  911. spin_lock_irq(&emu->reg_lock);
  912. ipcm->channels = pcm->channels;
  913. ipcm->tram_start = pcm->tram_start;
  914. ipcm->buffer_size = pcm->buffer_size;
  915. ipcm->gpr_size = pcm->gpr_size;
  916. ipcm->gpr_ptr = pcm->gpr_ptr;
  917. ipcm->gpr_count = pcm->gpr_count;
  918. ipcm->gpr_tmpcount = pcm->gpr_tmpcount;
  919. ipcm->gpr_trigger = pcm->gpr_trigger;
  920. ipcm->gpr_running = pcm->gpr_running;
  921. for (i = 0; i < pcm->channels; i++)
  922. ipcm->etram[i] = pcm->etram[i];
  923. ipcm->res1 = ipcm->res2 = 0;
  924. ipcm->pad = 0;
  925. spin_unlock_irq(&emu->reg_lock);
  926. mutex_unlock(&emu->fx8010.lock);
  927. return err;
  928. }
  929. #define SND_EMU10K1_GPR_CONTROLS 44
  930. #define SND_EMU10K1_INPUTS 12
  931. #define SND_EMU10K1_PLAYBACK_CHANNELS 8
  932. #define SND_EMU10K1_CAPTURE_CHANNELS 4
  933. static void __devinit
  934. snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  935. const char *name, int gpr, int defval)
  936. {
  937. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  938. strcpy(ctl->id.name, name);
  939. ctl->vcount = ctl->count = 1;
  940. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  941. ctl->min = 0;
  942. ctl->max = 100;
  943. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  944. }
  945. static void __devinit
  946. snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  947. const char *name, int gpr, int defval)
  948. {
  949. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  950. strcpy(ctl->id.name, name);
  951. ctl->vcount = ctl->count = 2;
  952. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  953. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  954. ctl->min = 0;
  955. ctl->max = 100;
  956. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  957. }
  958. static void __devinit
  959. snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  960. const char *name, int gpr, int defval)
  961. {
  962. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  963. strcpy(ctl->id.name, name);
  964. ctl->vcount = ctl->count = 1;
  965. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  966. ctl->min = 0;
  967. ctl->max = 1;
  968. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  969. }
  970. static void __devinit
  971. snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  972. const char *name, int gpr, int defval)
  973. {
  974. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  975. strcpy(ctl->id.name, name);
  976. ctl->vcount = ctl->count = 2;
  977. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  978. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  979. ctl->min = 0;
  980. ctl->max = 1;
  981. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  982. }
  983. /*
  984. * initial DSP configuration for Audigy
  985. */
  986. static int __devinit _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
  987. {
  988. int err, i, z, gpr, nctl;
  989. const int playback = 10;
  990. const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
  991. const int stereo_mix = capture + 2;
  992. const int tmp = 0x88;
  993. u32 ptr;
  994. struct snd_emu10k1_fx8010_code *icode = NULL;
  995. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  996. u32 *gpr_map;
  997. mm_segment_t seg;
  998. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL ||
  999. (icode->gpr_map = (u_int32_t __user *)
  1000. kcalloc(512 + 256 + 256 + 2 * 1024, sizeof(u_int32_t),
  1001. GFP_KERNEL)) == NULL ||
  1002. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1003. sizeof(*controls), GFP_KERNEL)) == NULL) {
  1004. err = -ENOMEM;
  1005. goto __err;
  1006. }
  1007. gpr_map = (u32 __force *)icode->gpr_map;
  1008. icode->tram_data_map = icode->gpr_map + 512;
  1009. icode->tram_addr_map = icode->tram_data_map + 256;
  1010. icode->code = icode->tram_addr_map + 256;
  1011. /* clear free GPRs */
  1012. for (i = 0; i < 512; i++)
  1013. set_bit(i, icode->gpr_valid);
  1014. /* clear TRAM data & address lines */
  1015. for (i = 0; i < 256; i++)
  1016. set_bit(i, icode->tram_valid);
  1017. strcpy(icode->name, "Audigy DSP code for ALSA");
  1018. ptr = 0;
  1019. nctl = 0;
  1020. gpr = stereo_mix + 10;
  1021. /* stop FX processor */
  1022. snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
  1023. #if 0
  1024. /* FIX: jcd test */
  1025. for (z = 0; z < 80; z=z+2) {
  1026. A_OP(icode, &ptr, iACC3, A_EXTOUT(z), A_FXBUS(FXBUS_PCM_LEFT_FRONT), A_C_00000000, A_C_00000000); /* left */
  1027. A_OP(icode, &ptr, iACC3, A_EXTOUT(z+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT), A_C_00000000, A_C_00000000); /* right */
  1028. }
  1029. #endif /* jcd test */
  1030. #if 1
  1031. /* PCM front Playback Volume (independent from stereo mix) */
  1032. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
  1033. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
  1034. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
  1035. gpr += 2;
  1036. /* PCM Surround Playback (independent from stereo mix) */
  1037. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR));
  1038. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR));
  1039. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100);
  1040. gpr += 2;
  1041. /* PCM Side Playback (independent from stereo mix) */
  1042. if (emu->card_capabilities->spk71) {
  1043. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE));
  1044. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE));
  1045. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100);
  1046. gpr += 2;
  1047. }
  1048. /* PCM Center Playback (independent from stereo mix) */
  1049. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER));
  1050. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100);
  1051. gpr++;
  1052. /* PCM LFE Playback (independent from stereo mix) */
  1053. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE));
  1054. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100);
  1055. gpr++;
  1056. /*
  1057. * Stereo Mix
  1058. */
  1059. /* Wave (PCM) Playback Volume (will be renamed later) */
  1060. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1061. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1062. snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
  1063. gpr += 2;
  1064. /* Synth Playback */
  1065. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1066. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1067. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100);
  1068. gpr += 2;
  1069. /* Wave (PCM) Capture */
  1070. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1071. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1072. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0);
  1073. gpr += 2;
  1074. /* Synth Capture */
  1075. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1076. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1077. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0);
  1078. gpr += 2;
  1079. /*
  1080. * inputs
  1081. */
  1082. #define A_ADD_VOLUME_IN(var,vol,input) \
  1083. A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
  1084. /* AC'97 Playback Volume - used only for mic (renamed later) */
  1085. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L);
  1086. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R);
  1087. snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0);
  1088. gpr += 2;
  1089. /* AC'97 Capture Volume - used only for mic */
  1090. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L);
  1091. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R);
  1092. snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0);
  1093. gpr += 2;
  1094. /* mic capture buffer */
  1095. A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R));
  1096. /* Audigy CD Playback Volume */
  1097. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
  1098. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1099. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1100. emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume",
  1101. gpr, 0);
  1102. gpr += 2;
  1103. /* Audigy CD Capture Volume */
  1104. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L);
  1105. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1106. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1107. emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume",
  1108. gpr, 0);
  1109. gpr += 2;
  1110. /* Optical SPDIF Playback Volume */
  1111. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L);
  1112. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1113. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0);
  1114. gpr += 2;
  1115. /* Optical SPDIF Capture Volume */
  1116. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L);
  1117. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1118. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0);
  1119. gpr += 2;
  1120. /* Line2 Playback Volume */
  1121. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L);
  1122. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R);
  1123. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1124. emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume",
  1125. gpr, 0);
  1126. gpr += 2;
  1127. /* Line2 Capture Volume */
  1128. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L);
  1129. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R);
  1130. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1131. emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume",
  1132. gpr, 0);
  1133. gpr += 2;
  1134. /* Philips ADC Playback Volume */
  1135. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L);
  1136. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R);
  1137. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0);
  1138. gpr += 2;
  1139. /* Philips ADC Capture Volume */
  1140. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L);
  1141. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R);
  1142. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0);
  1143. gpr += 2;
  1144. /* Aux2 Playback Volume */
  1145. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L);
  1146. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R);
  1147. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1148. emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume",
  1149. gpr, 0);
  1150. gpr += 2;
  1151. /* Aux2 Capture Volume */
  1152. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L);
  1153. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R);
  1154. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1155. emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume",
  1156. gpr, 0);
  1157. gpr += 2;
  1158. /* Stereo Mix Front Playback Volume */
  1159. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix));
  1160. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1161. snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100);
  1162. gpr += 2;
  1163. /* Stereo Mix Surround Playback */
  1164. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix));
  1165. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1166. snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0);
  1167. gpr += 2;
  1168. /* Stereo Mix Center Playback */
  1169. /* Center = sub = Left/2 + Right/2 */
  1170. A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1));
  1171. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
  1172. snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
  1173. gpr++;
  1174. /* Stereo Mix LFE Playback */
  1175. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp));
  1176. snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0);
  1177. gpr++;
  1178. if (emu->card_capabilities->spk71) {
  1179. /* Stereo Mix Side Playback */
  1180. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix));
  1181. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1182. snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0);
  1183. gpr += 2;
  1184. }
  1185. /*
  1186. * outputs
  1187. */
  1188. #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
  1189. #define A_PUT_STEREO_OUTPUT(out1,out2,src) \
  1190. {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
  1191. #define _A_SWITCH(icode, ptr, dst, src, sw) \
  1192. A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
  1193. #define A_SWITCH(icode, ptr, dst, src, sw) \
  1194. _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
  1195. #define _A_SWITCH_NEG(icode, ptr, dst, src) \
  1196. A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
  1197. #define A_SWITCH_NEG(icode, ptr, dst, src) \
  1198. _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
  1199. /*
  1200. * Process tone control
  1201. */
  1202. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), A_GPR(playback + 0), A_C_00000000, A_C_00000000); /* left */
  1203. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), A_GPR(playback + 1), A_C_00000000, A_C_00000000); /* right */
  1204. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), A_GPR(playback + 2), A_C_00000000, A_C_00000000); /* rear left */
  1205. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), A_GPR(playback + 3), A_C_00000000, A_C_00000000); /* rear right */
  1206. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), A_GPR(playback + 4), A_C_00000000, A_C_00000000); /* center */
  1207. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), A_GPR(playback + 5), A_C_00000000, A_C_00000000); /* LFE */
  1208. if (emu->card_capabilities->spk71) {
  1209. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 6), A_GPR(playback + 6), A_C_00000000, A_C_00000000); /* side left */
  1210. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 7), A_GPR(playback + 7), A_C_00000000, A_C_00000000); /* side right */
  1211. }
  1212. ctl = &controls[nctl + 0];
  1213. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1214. strcpy(ctl->id.name, "Tone Control - Bass");
  1215. ctl->vcount = 2;
  1216. ctl->count = 10;
  1217. ctl->min = 0;
  1218. ctl->max = 40;
  1219. ctl->value[0] = ctl->value[1] = 20;
  1220. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1221. ctl = &controls[nctl + 1];
  1222. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1223. strcpy(ctl->id.name, "Tone Control - Treble");
  1224. ctl->vcount = 2;
  1225. ctl->count = 10;
  1226. ctl->min = 0;
  1227. ctl->max = 40;
  1228. ctl->value[0] = ctl->value[1] = 20;
  1229. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1230. #define BASS_GPR 0x8c
  1231. #define TREBLE_GPR 0x96
  1232. for (z = 0; z < 5; z++) {
  1233. int j;
  1234. for (j = 0; j < 2; j++) {
  1235. controls[nctl + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1236. controls[nctl + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1237. }
  1238. }
  1239. for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */
  1240. int j, k, l, d;
  1241. for (j = 0; j < 2; j++) { /* left/right */
  1242. k = 0xb0 + (z * 8) + (j * 4);
  1243. l = 0xe0 + (z * 8) + (j * 4);
  1244. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1245. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(BASS_GPR + 0 + j));
  1246. A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(BASS_GPR + 4 + j));
  1247. A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(BASS_GPR + 2 + j));
  1248. A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(BASS_GPR + 8 + j));
  1249. A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(BASS_GPR + 6 + j));
  1250. A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000);
  1251. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(TREBLE_GPR + 0 + j));
  1252. A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(TREBLE_GPR + 4 + j));
  1253. A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(TREBLE_GPR + 2 + j));
  1254. A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(TREBLE_GPR + 8 + j));
  1255. A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(TREBLE_GPR + 6 + j));
  1256. A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010);
  1257. A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000);
  1258. if (z == 2) /* center */
  1259. break;
  1260. }
  1261. }
  1262. nctl += 2;
  1263. #undef BASS_GPR
  1264. #undef TREBLE_GPR
  1265. for (z = 0; z < 8; z++) {
  1266. A_SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1267. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1268. A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1269. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1270. }
  1271. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
  1272. gpr += 2;
  1273. /* Master volume (will be renamed later) */
  1274. A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
  1275. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
  1276. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS));
  1277. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS));
  1278. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS));
  1279. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS));
  1280. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS));
  1281. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS));
  1282. snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
  1283. gpr += 2;
  1284. /* analog speakers */
  1285. A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1286. A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1287. A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1288. A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1289. if (emu->card_capabilities->spk71)
  1290. A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1291. /* headphone */
  1292. A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1293. /* digital outputs */
  1294. /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
  1295. /* IEC958 Optical Raw Playback Switch */
  1296. gpr_map[gpr++] = 0;
  1297. gpr_map[gpr++] = 0x1008;
  1298. gpr_map[gpr++] = 0xffff0000;
  1299. for (z = 0; z < 2; z++) {
  1300. A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000);
  1301. A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001);
  1302. A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2));
  1303. A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000);
  1304. A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z);
  1305. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1306. A_SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1307. if ((z==1) && (emu->card_capabilities->spdif_bug)) {
  1308. /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
  1309. snd_printk(KERN_INFO "Installing spdif_bug patch: %s\n", emu->card_capabilities->name);
  1310. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000);
  1311. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1312. } else {
  1313. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1314. }
  1315. }
  1316. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1317. gpr += 2;
  1318. A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1319. A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1320. A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1321. /* ADC buffer */
  1322. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1323. A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1324. #else
  1325. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture);
  1326. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1);
  1327. #endif
  1328. /* EFX capture - capture the 16 EXTINs */
  1329. for (z = 0; z < 16; z++) {
  1330. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z));
  1331. }
  1332. #endif /* JCD test */
  1333. /*
  1334. * ok, set up done..
  1335. */
  1336. if (gpr > tmp) {
  1337. snd_BUG();
  1338. err = -EIO;
  1339. goto __err;
  1340. }
  1341. /* clear remaining instruction memory */
  1342. while (ptr < 0x400)
  1343. A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
  1344. seg = snd_enter_user();
  1345. icode->gpr_add_control_count = nctl;
  1346. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1347. err = snd_emu10k1_icode_poke(emu, icode);
  1348. snd_leave_user(seg);
  1349. __err:
  1350. kfree(controls);
  1351. if (icode != NULL) {
  1352. kfree((void __force *)icode->gpr_map);
  1353. kfree(icode);
  1354. }
  1355. return err;
  1356. }
  1357. /*
  1358. * initial DSP configuration for Emu10k1
  1359. */
  1360. /* when volume = max, then copy only to avoid volume modification */
  1361. /* with iMAC0 (negative values) */
  1362. static void __devinit _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1363. {
  1364. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1365. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1366. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001);
  1367. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1368. }
  1369. static void __devinit _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1370. {
  1371. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1372. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1373. OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001);
  1374. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1375. OP(icode, ptr, iMAC0, dst, dst, src, vol);
  1376. }
  1377. static void __devinit _volume_out(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1378. {
  1379. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1380. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1381. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1382. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1383. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1384. }
  1385. #define VOLUME(icode, ptr, dst, src, vol) \
  1386. _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1387. #define VOLUME_IN(icode, ptr, dst, src, vol) \
  1388. _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1389. #define VOLUME_ADD(icode, ptr, dst, src, vol) \
  1390. _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1391. #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
  1392. _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1393. #define VOLUME_OUT(icode, ptr, dst, src, vol) \
  1394. _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
  1395. #define _SWITCH(icode, ptr, dst, src, sw) \
  1396. OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
  1397. #define SWITCH(icode, ptr, dst, src, sw) \
  1398. _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
  1399. #define SWITCH_IN(icode, ptr, dst, src, sw) \
  1400. _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
  1401. #define _SWITCH_NEG(icode, ptr, dst, src) \
  1402. OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
  1403. #define SWITCH_NEG(icode, ptr, dst, src) \
  1404. _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
  1405. static int __devinit _snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1406. {
  1407. int err, i, z, gpr, tmp, playback, capture;
  1408. u32 ptr;
  1409. struct snd_emu10k1_fx8010_code *icode;
  1410. struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL;
  1411. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1412. u32 *gpr_map;
  1413. mm_segment_t seg;
  1414. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL)
  1415. return -ENOMEM;
  1416. if ((icode->gpr_map = (u_int32_t __user *)
  1417. kcalloc(256 + 160 + 160 + 2 * 512, sizeof(u_int32_t),
  1418. GFP_KERNEL)) == NULL ||
  1419. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1420. sizeof(struct snd_emu10k1_fx8010_control_gpr),
  1421. GFP_KERNEL)) == NULL ||
  1422. (ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL)) == NULL) {
  1423. err = -ENOMEM;
  1424. goto __err;
  1425. }
  1426. gpr_map = (u32 __force *)icode->gpr_map;
  1427. icode->tram_data_map = icode->gpr_map + 256;
  1428. icode->tram_addr_map = icode->tram_data_map + 160;
  1429. icode->code = icode->tram_addr_map + 160;
  1430. /* clear free GPRs */
  1431. for (i = 0; i < 256; i++)
  1432. set_bit(i, icode->gpr_valid);
  1433. /* clear TRAM data & address lines */
  1434. for (i = 0; i < 160; i++)
  1435. set_bit(i, icode->tram_valid);
  1436. strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
  1437. ptr = 0; i = 0;
  1438. /* we have 12 inputs */
  1439. playback = SND_EMU10K1_INPUTS;
  1440. /* we have 6 playback channels and tone control doubles */
  1441. capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2);
  1442. gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS;
  1443. tmp = 0x88; /* we need 4 temporary GPR */
  1444. /* from 0x8c to 0xff is the area for tone control */
  1445. /* stop FX processor */
  1446. snd_emu10k1_ptr_write(emu, DBG, 0, (emu->fx8010.dbg = 0) | EMU10K1_DBG_SINGLE_STEP);
  1447. /*
  1448. * Process FX Buses
  1449. */
  1450. OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004);
  1451. OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004);
  1452. OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004);
  1453. OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004);
  1454. OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004);
  1455. OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004);
  1456. OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004);
  1457. OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004);
  1458. OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */
  1459. OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */
  1460. OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004);
  1461. OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004);
  1462. /* Raw S/PDIF PCM */
  1463. ipcm->substream = 0;
  1464. ipcm->channels = 2;
  1465. ipcm->tram_start = 0;
  1466. ipcm->buffer_size = (64 * 1024) / 2;
  1467. ipcm->gpr_size = gpr++;
  1468. ipcm->gpr_ptr = gpr++;
  1469. ipcm->gpr_count = gpr++;
  1470. ipcm->gpr_tmpcount = gpr++;
  1471. ipcm->gpr_trigger = gpr++;
  1472. ipcm->gpr_running = gpr++;
  1473. ipcm->etram[0] = 0;
  1474. ipcm->etram[1] = 1;
  1475. gpr_map[gpr + 0] = 0xfffff000;
  1476. gpr_map[gpr + 1] = 0xffff0000;
  1477. gpr_map[gpr + 2] = 0x70000000;
  1478. gpr_map[gpr + 3] = 0x00000007;
  1479. gpr_map[gpr + 4] = 0x001f << 11;
  1480. gpr_map[gpr + 5] = 0x001c << 11;
  1481. gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
  1482. gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
  1483. gpr_map[gpr + 8] = 0x2000000 + (2<<11);
  1484. gpr_map[gpr + 9] = 0x4000000 + (2<<11);
  1485. gpr_map[gpr + 10] = 1<<11;
  1486. gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
  1487. gpr_map[gpr + 12] = 0;
  1488. /* if the trigger flag is not set, skip */
  1489. /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000);
  1490. /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6));
  1491. /* if the running flag is set, we're running */
  1492. /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000);
  1493. /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004);
  1494. /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
  1495. /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000);
  1496. /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5));
  1497. /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7));
  1498. /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000);
  1499. /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001);
  1500. /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000);
  1501. /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11));
  1502. /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000);
  1503. /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000);
  1504. /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1505. /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1506. /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1507. /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2));
  1508. /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000);
  1509. /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1510. /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1511. /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1512. /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2));
  1513. /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000);
  1514. /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size));
  1515. /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001);
  1516. /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000);
  1517. /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000);
  1518. /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000);
  1519. /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1520. /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000);
  1521. /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000);
  1522. /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000);
  1523. /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001);
  1524. /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002);
  1525. /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff);
  1526. /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff);
  1527. /* 24: */
  1528. gpr += 13;
  1529. /* Wave Playback Volume */
  1530. for (z = 0; z < 2; z++)
  1531. VOLUME(icode, &ptr, playback + z, z, gpr + z);
  1532. snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100);
  1533. gpr += 2;
  1534. /* Wave Surround Playback Volume */
  1535. for (z = 0; z < 2; z++)
  1536. VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z);
  1537. snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0);
  1538. gpr += 2;
  1539. /* Wave Center/LFE Playback Volume */
  1540. OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000);
  1541. OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002);
  1542. VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr);
  1543. snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0);
  1544. VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr);
  1545. snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0);
  1546. /* Wave Capture Volume + Switch */
  1547. for (z = 0; z < 2; z++) {
  1548. SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z);
  1549. VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1550. }
  1551. snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0);
  1552. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0);
  1553. gpr += 4;
  1554. /* Synth Playback Volume */
  1555. for (z = 0; z < 2; z++)
  1556. VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z);
  1557. snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100);
  1558. gpr += 2;
  1559. /* Synth Capture Volume + Switch */
  1560. for (z = 0; z < 2; z++) {
  1561. SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z);
  1562. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1563. }
  1564. snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0);
  1565. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0);
  1566. gpr += 4;
  1567. /* Surround Digital Playback Volume (renamed later without Digital) */
  1568. for (z = 0; z < 2; z++)
  1569. VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z);
  1570. snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100);
  1571. gpr += 2;
  1572. /* Surround Capture Volume + Switch */
  1573. for (z = 0; z < 2; z++) {
  1574. SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z);
  1575. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1576. }
  1577. snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0);
  1578. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0);
  1579. gpr += 4;
  1580. /* Center Playback Volume (renamed later without Digital) */
  1581. VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr);
  1582. snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100);
  1583. /* LFE Playback Volume + Switch (renamed later without Digital) */
  1584. VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr);
  1585. snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100);
  1586. /* Front Playback Volume */
  1587. for (z = 0; z < 2; z++)
  1588. VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z);
  1589. snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100);
  1590. gpr += 2;
  1591. /* Front Capture Volume + Switch */
  1592. for (z = 0; z < 2; z++) {
  1593. SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2);
  1594. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1595. }
  1596. snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0);
  1597. snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0);
  1598. gpr += 3;
  1599. /*
  1600. * Process inputs
  1601. */
  1602. if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) {
  1603. /* AC'97 Playback Volume */
  1604. VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++;
  1605. VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++;
  1606. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0);
  1607. /* AC'97 Capture Volume */
  1608. VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++;
  1609. VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++;
  1610. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100);
  1611. }
  1612. if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) {
  1613. /* IEC958 TTL Playback Volume */
  1614. for (z = 0; z < 2; z++)
  1615. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z);
  1616. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0);
  1617. gpr += 2;
  1618. /* IEC958 TTL Capture Volume + Switch */
  1619. for (z = 0; z < 2; z++) {
  1620. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z);
  1621. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1622. }
  1623. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0);
  1624. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0);
  1625. gpr += 4;
  1626. }
  1627. if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) {
  1628. /* Zoom Video Playback Volume */
  1629. for (z = 0; z < 2; z++)
  1630. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z);
  1631. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0);
  1632. gpr += 2;
  1633. /* Zoom Video Capture Volume + Switch */
  1634. for (z = 0; z < 2; z++) {
  1635. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z);
  1636. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1637. }
  1638. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0);
  1639. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0);
  1640. gpr += 4;
  1641. }
  1642. if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) {
  1643. /* IEC958 Optical Playback Volume */
  1644. for (z = 0; z < 2; z++)
  1645. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z);
  1646. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0);
  1647. gpr += 2;
  1648. /* IEC958 Optical Capture Volume */
  1649. for (z = 0; z < 2; z++) {
  1650. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z);
  1651. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1652. }
  1653. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0);
  1654. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0);
  1655. gpr += 4;
  1656. }
  1657. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) {
  1658. /* Line LiveDrive Playback Volume */
  1659. for (z = 0; z < 2; z++)
  1660. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z);
  1661. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0);
  1662. gpr += 2;
  1663. /* Line LiveDrive Capture Volume + Switch */
  1664. for (z = 0; z < 2; z++) {
  1665. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z);
  1666. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1667. }
  1668. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0);
  1669. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0);
  1670. gpr += 4;
  1671. }
  1672. if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) {
  1673. /* IEC958 Coax Playback Volume */
  1674. for (z = 0; z < 2; z++)
  1675. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z);
  1676. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0);
  1677. gpr += 2;
  1678. /* IEC958 Coax Capture Volume + Switch */
  1679. for (z = 0; z < 2; z++) {
  1680. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z);
  1681. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1682. }
  1683. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0);
  1684. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0);
  1685. gpr += 4;
  1686. }
  1687. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) {
  1688. /* Line LiveDrive Playback Volume */
  1689. for (z = 0; z < 2; z++)
  1690. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z);
  1691. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0);
  1692. controls[i-1].id.index = 1;
  1693. gpr += 2;
  1694. /* Line LiveDrive Capture Volume */
  1695. for (z = 0; z < 2; z++) {
  1696. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z);
  1697. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1698. }
  1699. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0);
  1700. controls[i-1].id.index = 1;
  1701. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0);
  1702. controls[i-1].id.index = 1;
  1703. gpr += 4;
  1704. }
  1705. /*
  1706. * Process tone control
  1707. */
  1708. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */
  1709. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */
  1710. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */
  1711. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */
  1712. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */
  1713. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */
  1714. ctl = &controls[i + 0];
  1715. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1716. strcpy(ctl->id.name, "Tone Control - Bass");
  1717. ctl->vcount = 2;
  1718. ctl->count = 10;
  1719. ctl->min = 0;
  1720. ctl->max = 40;
  1721. ctl->value[0] = ctl->value[1] = 20;
  1722. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1723. ctl = &controls[i + 1];
  1724. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1725. strcpy(ctl->id.name, "Tone Control - Treble");
  1726. ctl->vcount = 2;
  1727. ctl->count = 10;
  1728. ctl->min = 0;
  1729. ctl->max = 40;
  1730. ctl->value[0] = ctl->value[1] = 20;
  1731. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1732. #define BASS_GPR 0x8c
  1733. #define TREBLE_GPR 0x96
  1734. for (z = 0; z < 5; z++) {
  1735. int j;
  1736. for (j = 0; j < 2; j++) {
  1737. controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1738. controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1739. }
  1740. }
  1741. for (z = 0; z < 3; z++) { /* front/rear/center-lfe */
  1742. int j, k, l, d;
  1743. for (j = 0; j < 2; j++) { /* left/right */
  1744. k = 0xa0 + (z * 8) + (j * 4);
  1745. l = 0xd0 + (z * 8) + (j * 4);
  1746. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1747. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j));
  1748. OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j));
  1749. OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j));
  1750. OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j));
  1751. OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j));
  1752. OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000);
  1753. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j));
  1754. OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j));
  1755. OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j));
  1756. OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j));
  1757. OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j));
  1758. OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010);
  1759. OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000);
  1760. if (z == 2) /* center */
  1761. break;
  1762. }
  1763. }
  1764. i += 2;
  1765. #undef BASS_GPR
  1766. #undef TREBLE_GPR
  1767. for (z = 0; z < 6; z++) {
  1768. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1769. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1770. SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1771. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1772. }
  1773. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0);
  1774. gpr += 2;
  1775. /*
  1776. * Process outputs
  1777. */
  1778. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) {
  1779. /* AC'97 Playback Volume */
  1780. for (z = 0; z < 2; z++)
  1781. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000);
  1782. }
  1783. if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) {
  1784. /* IEC958 Optical Raw Playback Switch */
  1785. for (z = 0; z < 2; z++) {
  1786. SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z);
  1787. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1788. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1789. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1790. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1791. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1792. #endif
  1793. }
  1794. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1795. gpr += 2;
  1796. }
  1797. if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) {
  1798. /* Headphone Playback Volume */
  1799. for (z = 0; z < 2; z++) {
  1800. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4 + z, gpr + 2 + z);
  1801. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z);
  1802. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1803. OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1804. VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z);
  1805. }
  1806. snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0);
  1807. controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */
  1808. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0);
  1809. controls[i-1].id.index = 1;
  1810. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0);
  1811. controls[i-1].id.index = 1;
  1812. gpr += 4;
  1813. }
  1814. if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R)))
  1815. for (z = 0; z < 2; z++)
  1816. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1817. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R)))
  1818. for (z = 0; z < 2; z++)
  1819. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1820. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) {
  1821. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1822. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1823. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1824. #else
  1825. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1826. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1827. #endif
  1828. }
  1829. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) {
  1830. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1831. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1832. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1833. #else
  1834. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1835. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1836. #endif
  1837. }
  1838. #ifndef EMU10K1_CAPTURE_DIGITAL_OUT
  1839. for (z = 0; z < 2; z++)
  1840. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000);
  1841. #endif
  1842. if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP))
  1843. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000);
  1844. /* EFX capture - capture the 16 EXTINS */
  1845. if (emu->card_capabilities->sblive51) {
  1846. /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER
  1847. * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
  1848. *
  1849. * Since only 14 of the 16 EXTINs are used, this is not a big problem.
  1850. * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture
  1851. * 0 and 3, then the rest of the EXTINs to the corresponding FX capture
  1852. * channel. Multitrack recorders will still see the center/lfe output signal
  1853. * on the second and third channels.
  1854. */
  1855. OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0));
  1856. OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1));
  1857. OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2));
  1858. OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3));
  1859. for (z = 4; z < 14; z++)
  1860. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1861. } else {
  1862. for (z = 0; z < 16; z++)
  1863. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1864. }
  1865. if (gpr > tmp) {
  1866. snd_BUG();
  1867. err = -EIO;
  1868. goto __err;
  1869. }
  1870. if (i > SND_EMU10K1_GPR_CONTROLS) {
  1871. snd_BUG();
  1872. err = -EIO;
  1873. goto __err;
  1874. }
  1875. /* clear remaining instruction memory */
  1876. while (ptr < 0x200)
  1877. OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000);
  1878. if ((err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size)) < 0)
  1879. goto __err;
  1880. seg = snd_enter_user();
  1881. icode->gpr_add_control_count = i;
  1882. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1883. err = snd_emu10k1_icode_poke(emu, icode);
  1884. snd_leave_user(seg);
  1885. if (err >= 0)
  1886. err = snd_emu10k1_ipcm_poke(emu, ipcm);
  1887. __err:
  1888. kfree(ipcm);
  1889. kfree(controls);
  1890. if (icode != NULL) {
  1891. kfree((void __force *)icode->gpr_map);
  1892. kfree(icode);
  1893. }
  1894. return err;
  1895. }
  1896. int __devinit snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1897. {
  1898. spin_lock_init(&emu->fx8010.irq_lock);
  1899. INIT_LIST_HEAD(&emu->fx8010.gpr_ctl);
  1900. if (emu->audigy)
  1901. return _snd_emu10k1_audigy_init_efx(emu);
  1902. else
  1903. return _snd_emu10k1_init_efx(emu);
  1904. }
  1905. void snd_emu10k1_free_efx(struct snd_emu10k1 *emu)
  1906. {
  1907. /* stop processor */
  1908. if (emu->audigy)
  1909. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP);
  1910. else
  1911. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP);
  1912. }
  1913. #if 0 // FIXME: who use them?
  1914. int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output)
  1915. {
  1916. if (output < 0 || output >= 6)
  1917. return -EINVAL;
  1918. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1);
  1919. return 0;
  1920. }
  1921. int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output)
  1922. {
  1923. if (output < 0 || output >= 6)
  1924. return -EINVAL;
  1925. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0);
  1926. return 0;
  1927. }
  1928. #endif
  1929. int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
  1930. {
  1931. u8 size_reg = 0;
  1932. /* size is in samples */
  1933. if (size != 0) {
  1934. size = (size - 1) >> 13;
  1935. while (size) {
  1936. size >>= 1;
  1937. size_reg++;
  1938. }
  1939. size = 0x2000 << size_reg;
  1940. }
  1941. if ((emu->fx8010.etram_pages.bytes / 2) == size)
  1942. return 0;
  1943. spin_lock_irq(&emu->emu_lock);
  1944. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  1945. spin_unlock_irq(&emu->emu_lock);
  1946. snd_emu10k1_ptr_write(emu, TCB, 0, 0);
  1947. snd_emu10k1_ptr_write(emu, TCBS, 0, 0);
  1948. if (emu->fx8010.etram_pages.area != NULL) {
  1949. snd_dma_free_pages(&emu->fx8010.etram_pages);
  1950. emu->fx8010.etram_pages.area = NULL;
  1951. emu->fx8010.etram_pages.bytes = 0;
  1952. }
  1953. if (size > 0) {
  1954. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci),
  1955. size * 2, &emu->fx8010.etram_pages) < 0)
  1956. return -ENOMEM;
  1957. memset(emu->fx8010.etram_pages.area, 0, size * 2);
  1958. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  1959. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  1960. spin_lock_irq(&emu->emu_lock);
  1961. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  1962. spin_unlock_irq(&emu->emu_lock);
  1963. }
  1964. return 0;
  1965. }
  1966. static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file)
  1967. {
  1968. return 0;
  1969. }
  1970. static void copy_string(char *dst, char *src, char *null, int idx)
  1971. {
  1972. if (src == NULL)
  1973. sprintf(dst, "%s %02X", null, idx);
  1974. else
  1975. strcpy(dst, src);
  1976. }
  1977. static int snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu,
  1978. struct snd_emu10k1_fx8010_info *info)
  1979. {
  1980. char **fxbus, **extin, **extout;
  1981. unsigned short fxbus_mask, extin_mask, extout_mask;
  1982. int res;
  1983. memset(info, 0, sizeof(info));
  1984. info->internal_tram_size = emu->fx8010.itram_size;
  1985. info->external_tram_size = emu->fx8010.etram_pages.bytes / 2;
  1986. fxbus = fxbuses;
  1987. extin = emu->audigy ? audigy_ins : creative_ins;
  1988. extout = emu->audigy ? audigy_outs : creative_outs;
  1989. fxbus_mask = emu->fx8010.fxbus_mask;
  1990. extin_mask = emu->fx8010.extin_mask;
  1991. extout_mask = emu->fx8010.extout_mask;
  1992. for (res = 0; res < 16; res++, fxbus++, extin++, extout++) {
  1993. copy_string(info->fxbus_names[res], fxbus_mask & (1 << res) ? *fxbus : NULL, "FXBUS", res);
  1994. copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res);
  1995. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  1996. }
  1997. for (res = 16; res < 32; res++, extout++)
  1998. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  1999. info->gpr_controls = emu->fx8010.gpr_count;
  2000. return 0;
  2001. }
  2002. static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg)
  2003. {
  2004. struct snd_emu10k1 *emu = hw->private_data;
  2005. struct snd_emu10k1_fx8010_info *info;
  2006. struct snd_emu10k1_fx8010_code *icode;
  2007. struct snd_emu10k1_fx8010_pcm_rec *ipcm;
  2008. unsigned int addr;
  2009. void __user *argp = (void __user *)arg;
  2010. int res;
  2011. switch (cmd) {
  2012. case SNDRV_EMU10K1_IOCTL_INFO:
  2013. info = kmalloc(sizeof(*info), GFP_KERNEL);
  2014. if (!info)
  2015. return -ENOMEM;
  2016. if ((res = snd_emu10k1_fx8010_info(emu, info)) < 0) {
  2017. kfree(info);
  2018. return res;
  2019. }
  2020. if (copy_to_user(argp, info, sizeof(*info))) {
  2021. kfree(info);
  2022. return -EFAULT;
  2023. }
  2024. kfree(info);
  2025. return 0;
  2026. case SNDRV_EMU10K1_IOCTL_CODE_POKE:
  2027. if (!capable(CAP_SYS_ADMIN))
  2028. return -EPERM;
  2029. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2030. if (icode == NULL)
  2031. return -ENOMEM;
  2032. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2033. kfree(icode);
  2034. return -EFAULT;
  2035. }
  2036. res = snd_emu10k1_icode_poke(emu, icode);
  2037. kfree(icode);
  2038. return res;
  2039. case SNDRV_EMU10K1_IOCTL_CODE_PEEK:
  2040. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2041. if (icode == NULL)
  2042. return -ENOMEM;
  2043. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2044. kfree(icode);
  2045. return -EFAULT;
  2046. }
  2047. res = snd_emu10k1_icode_peek(emu, icode);
  2048. if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) {
  2049. kfree(icode);
  2050. return -EFAULT;
  2051. }
  2052. kfree(icode);
  2053. return res;
  2054. case SNDRV_EMU10K1_IOCTL_PCM_POKE:
  2055. ipcm = kmalloc(sizeof(*ipcm), GFP_KERNEL);
  2056. if (ipcm == NULL)
  2057. return -ENOMEM;
  2058. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2059. kfree(ipcm);
  2060. return -EFAULT;
  2061. }
  2062. res = snd_emu10k1_ipcm_poke(emu, ipcm);
  2063. kfree(ipcm);
  2064. return res;
  2065. case SNDRV_EMU10K1_IOCTL_PCM_PEEK:
  2066. ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL);
  2067. if (ipcm == NULL)
  2068. return -ENOMEM;
  2069. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2070. kfree(ipcm);
  2071. return -EFAULT;
  2072. }
  2073. res = snd_emu10k1_ipcm_peek(emu, ipcm);
  2074. if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) {
  2075. kfree(ipcm);
  2076. return -EFAULT;
  2077. }
  2078. kfree(ipcm);
  2079. return res;
  2080. case SNDRV_EMU10K1_IOCTL_TRAM_SETUP:
  2081. if (!capable(CAP_SYS_ADMIN))
  2082. return -EPERM;
  2083. if (get_user(addr, (unsigned int __user *)argp))
  2084. return -EFAULT;
  2085. mutex_lock(&emu->fx8010.lock);
  2086. res = snd_emu10k1_fx8010_tram_setup(emu, addr);
  2087. mutex_unlock(&emu->fx8010.lock);
  2088. return res;
  2089. case SNDRV_EMU10K1_IOCTL_STOP:
  2090. if (!capable(CAP_SYS_ADMIN))
  2091. return -EPERM;
  2092. if (emu->audigy)
  2093. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
  2094. else
  2095. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
  2096. return 0;
  2097. case SNDRV_EMU10K1_IOCTL_CONTINUE:
  2098. if (!capable(CAP_SYS_ADMIN))
  2099. return -EPERM;
  2100. if (emu->audigy)
  2101. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0);
  2102. else
  2103. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0);
  2104. return 0;
  2105. case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER:
  2106. if (!capable(CAP_SYS_ADMIN))
  2107. return -EPERM;
  2108. if (emu->audigy)
  2109. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC);
  2110. else
  2111. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC);
  2112. udelay(10);
  2113. if (emu->audigy)
  2114. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2115. else
  2116. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2117. return 0;
  2118. case SNDRV_EMU10K1_IOCTL_SINGLE_STEP:
  2119. if (!capable(CAP_SYS_ADMIN))
  2120. return -EPERM;
  2121. if (get_user(addr, (unsigned int __user *)argp))
  2122. return -EFAULT;
  2123. if (addr > 0x1ff)
  2124. return -EINVAL;
  2125. if (emu->audigy)
  2126. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | addr);
  2127. else
  2128. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | addr);
  2129. udelay(10);
  2130. if (emu->audigy)
  2131. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | A_DBG_STEP_ADDR | addr);
  2132. else
  2133. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | EMU10K1_DBG_STEP | addr);
  2134. return 0;
  2135. case SNDRV_EMU10K1_IOCTL_DBG_READ:
  2136. if (emu->audigy)
  2137. addr = snd_emu10k1_ptr_read(emu, A_DBG, 0);
  2138. else
  2139. addr = snd_emu10k1_ptr_read(emu, DBG, 0);
  2140. if (put_user(addr, (unsigned int __user *)argp))
  2141. return -EFAULT;
  2142. return 0;
  2143. }
  2144. return -ENOTTY;
  2145. }
  2146. static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file)
  2147. {
  2148. return 0;
  2149. }
  2150. int __devinit snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device, struct snd_hwdep ** rhwdep)
  2151. {
  2152. struct snd_hwdep *hw;
  2153. int err;
  2154. if (rhwdep)
  2155. *rhwdep = NULL;
  2156. if ((err = snd_hwdep_new(emu->card, "FX8010", device, &hw)) < 0)
  2157. return err;
  2158. strcpy(hw->name, "EMU10K1 (FX8010)");
  2159. hw->iface = SNDRV_HWDEP_IFACE_EMU10K1;
  2160. hw->ops.open = snd_emu10k1_fx8010_open;
  2161. hw->ops.ioctl = snd_emu10k1_fx8010_ioctl;
  2162. hw->ops.release = snd_emu10k1_fx8010_release;
  2163. hw->private_data = emu;
  2164. if (rhwdep)
  2165. *rhwdep = hw;
  2166. return 0;
  2167. }
  2168. #ifdef CONFIG_PM
  2169. int __devinit snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu)
  2170. {
  2171. int len;
  2172. len = emu->audigy ? 0x200 : 0x100;
  2173. emu->saved_gpr = kmalloc(len * 4, GFP_KERNEL);
  2174. if (! emu->saved_gpr)
  2175. return -ENOMEM;
  2176. len = emu->audigy ? 0x100 : 0xa0;
  2177. emu->tram_val_saved = kmalloc(len * 4, GFP_KERNEL);
  2178. emu->tram_addr_saved = kmalloc(len * 4, GFP_KERNEL);
  2179. if (! emu->tram_val_saved || ! emu->tram_addr_saved)
  2180. return -ENOMEM;
  2181. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2182. emu->saved_icode = vmalloc(len * 4);
  2183. if (! emu->saved_icode)
  2184. return -ENOMEM;
  2185. return 0;
  2186. }
  2187. void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu)
  2188. {
  2189. kfree(emu->saved_gpr);
  2190. kfree(emu->tram_val_saved);
  2191. kfree(emu->tram_addr_saved);
  2192. vfree(emu->saved_icode);
  2193. }
  2194. /*
  2195. * save/restore GPR, TRAM and codes
  2196. */
  2197. void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu)
  2198. {
  2199. int i, len;
  2200. len = emu->audigy ? 0x200 : 0x100;
  2201. for (i = 0; i < len; i++)
  2202. emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0);
  2203. len = emu->audigy ? 0x100 : 0xa0;
  2204. for (i = 0; i < len; i++) {
  2205. emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0);
  2206. emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0);
  2207. if (emu->audigy) {
  2208. emu->tram_addr_saved[i] >>= 12;
  2209. emu->tram_addr_saved[i] |=
  2210. snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20;
  2211. }
  2212. }
  2213. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2214. for (i = 0; i < len; i++)
  2215. emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i);
  2216. }
  2217. void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu)
  2218. {
  2219. int i, len;
  2220. /* set up TRAM */
  2221. if (emu->fx8010.etram_pages.bytes > 0) {
  2222. unsigned size, size_reg = 0;
  2223. size = emu->fx8010.etram_pages.bytes / 2;
  2224. size = (size - 1) >> 13;
  2225. while (size) {
  2226. size >>= 1;
  2227. size_reg++;
  2228. }
  2229. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2230. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2231. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2232. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2233. }
  2234. if (emu->audigy)
  2235. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  2236. else
  2237. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  2238. len = emu->audigy ? 0x200 : 0x100;
  2239. for (i = 0; i < len; i++)
  2240. snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]);
  2241. len = emu->audigy ? 0x100 : 0xa0;
  2242. for (i = 0; i < len; i++) {
  2243. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0,
  2244. emu->tram_val_saved[i]);
  2245. if (! emu->audigy)
  2246. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2247. emu->tram_addr_saved[i]);
  2248. else {
  2249. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2250. emu->tram_addr_saved[i] << 12);
  2251. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2252. emu->tram_addr_saved[i] >> 20);
  2253. }
  2254. }
  2255. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2256. for (i = 0; i < len; i++)
  2257. snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]);
  2258. /* start FX processor when the DSP code is updated */
  2259. if (emu->audigy)
  2260. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2261. else
  2262. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2263. }
  2264. #endif