emu10k1x.c 48 KB

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  1. /*
  2. * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
  3. * Driver EMU10K1X chips
  4. *
  5. * Parts of this code were adapted from audigyls.c driver which is
  6. * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
  7. *
  8. * BUGS:
  9. * --
  10. *
  11. * TODO:
  12. *
  13. * Chips (SB0200 model):
  14. * - EMU10K1X-DBQ
  15. * - STAC 9708T
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. *
  31. */
  32. #include <sound/driver.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/pci.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/slab.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/dma-mapping.h>
  40. #include <sound/core.h>
  41. #include <sound/initval.h>
  42. #include <sound/pcm.h>
  43. #include <sound/ac97_codec.h>
  44. #include <sound/info.h>
  45. #include <sound/rawmidi.h>
  46. MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
  47. MODULE_DESCRIPTION("EMU10K1X");
  48. MODULE_LICENSE("GPL");
  49. MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
  50. // module parameters (see "Module Parameters")
  51. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  52. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  53. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  54. module_param_array(index, int, NULL, 0444);
  55. MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
  56. module_param_array(id, charp, NULL, 0444);
  57. MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
  58. module_param_array(enable, bool, NULL, 0444);
  59. MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
  60. // some definitions were borrowed from emu10k1 driver as they seem to be the same
  61. /************************************************************************************************/
  62. /* PCI function 0 registers, address = <val> + PCIBASE0 */
  63. /************************************************************************************************/
  64. #define PTR 0x00 /* Indexed register set pointer register */
  65. /* NOTE: The CHANNELNUM and ADDRESS words can */
  66. /* be modified independently of each other. */
  67. #define DATA 0x04 /* Indexed register set data register */
  68. #define IPR 0x08 /* Global interrupt pending register */
  69. /* Clear pending interrupts by writing a 1 to */
  70. /* the relevant bits and zero to the other bits */
  71. #define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
  72. #define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
  73. #define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  74. #define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  75. #define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  76. #define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  77. #define INTE 0x0c /* Interrupt enable register */
  78. #define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
  79. #define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
  80. #define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  81. #define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  82. #define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  83. #define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  84. #define HCFG 0x14 /* Hardware config register */
  85. #define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
  86. /* NOTE: This should generally never be used. */
  87. #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
  88. /* Should be set to 1 when the EMU10K1 is */
  89. /* completely initialized. */
  90. #define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
  91. #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
  92. #define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
  93. /********************************************************************************************************/
  94. /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
  95. /********************************************************************************************************/
  96. #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
  97. /* One list entry: 4 bytes for DMA address,
  98. * 4 bytes for period_size << 16.
  99. * One list entry is 8 bytes long.
  100. * One list entry for each period in the buffer.
  101. */
  102. #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
  103. #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
  104. #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */
  105. #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
  106. #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
  107. #define PLAYBACK_UNKNOWN1 0x07
  108. #define PLAYBACK_UNKNOWN2 0x08
  109. /* Only one capture channel supported */
  110. #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
  111. #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
  112. #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
  113. #define CAPTURE_UNKNOWN 0x13
  114. /* From 0x20 - 0x3f, last samples played on each channel */
  115. #define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
  116. #define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
  117. #define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
  118. #define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
  119. #define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
  120. #define ROUTING 0x41 /* Setup sound routing ? */
  121. #define ROUTING_FRONT_LEFT 0x00000001
  122. #define ROUTING_FRONT_RIGHT 0x00000002
  123. #define ROUTING_REAR_LEFT 0x00000004
  124. #define ROUTING_REAR_RIGHT 0x00000008
  125. #define ROUTING_CENTER_LFE 0x00010000
  126. #define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
  127. #define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
  128. #define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
  129. #define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
  130. #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
  131. #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
  132. #define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
  133. #define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
  134. #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
  135. #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
  136. #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
  137. #define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
  138. #define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
  139. #define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
  140. #define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
  141. #define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
  142. #define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
  143. #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
  144. #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
  145. #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
  146. #define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
  147. #define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
  148. #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
  149. #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
  150. #define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
  151. #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
  152. #define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
  153. /* This is the MPU port on the card */
  154. #define MUDATA 0x47
  155. #define MUCMD 0x48
  156. #define MUSTAT MUCMD
  157. /* From 0x50 - 0x5f, last samples captured */
  158. /**
  159. * The hardware has 3 channels for playback and 1 for capture.
  160. * - channel 0 is the front channel
  161. * - channel 1 is the rear channel
  162. * - channel 2 is the center/lfe chanel
  163. * Volume is controlled by the AC97 for the front and rear channels by
  164. * the PCM Playback Volume, Sigmatel Surround Playback Volume and
  165. * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
  166. * the front/rear channel mixing in the REAR OUT jack. When using the
  167. * 4-Speaker Stereo, both front and rear channels will be mixed in the
  168. * REAR OUT.
  169. * The center/lfe channel has no volume control and cannot be muted during
  170. * playback.
  171. */
  172. struct emu10k1x_voice {
  173. struct emu10k1x *emu;
  174. int number;
  175. int use;
  176. struct emu10k1x_pcm *epcm;
  177. };
  178. struct emu10k1x_pcm {
  179. struct emu10k1x *emu;
  180. struct snd_pcm_substream *substream;
  181. struct emu10k1x_voice *voice;
  182. unsigned short running;
  183. };
  184. struct emu10k1x_midi {
  185. struct emu10k1x *emu;
  186. struct snd_rawmidi *rmidi;
  187. struct snd_rawmidi_substream *substream_input;
  188. struct snd_rawmidi_substream *substream_output;
  189. unsigned int midi_mode;
  190. spinlock_t input_lock;
  191. spinlock_t output_lock;
  192. spinlock_t open_lock;
  193. int tx_enable, rx_enable;
  194. int port;
  195. int ipr_tx, ipr_rx;
  196. void (*interrupt)(struct emu10k1x *emu, unsigned int status);
  197. };
  198. // definition of the chip-specific record
  199. struct emu10k1x {
  200. struct snd_card *card;
  201. struct pci_dev *pci;
  202. unsigned long port;
  203. struct resource *res_port;
  204. int irq;
  205. unsigned int revision; /* chip revision */
  206. unsigned int serial; /* serial number */
  207. unsigned short model; /* subsystem id */
  208. spinlock_t emu_lock;
  209. spinlock_t voice_lock;
  210. struct snd_ac97 *ac97;
  211. struct snd_pcm *pcm;
  212. struct emu10k1x_voice voices[3];
  213. struct emu10k1x_voice capture_voice;
  214. u32 spdif_bits[3]; // SPDIF out setup
  215. struct snd_dma_buffer dma_buffer;
  216. struct emu10k1x_midi midi;
  217. };
  218. /* hardware definition */
  219. static struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
  220. .info = (SNDRV_PCM_INFO_MMAP |
  221. SNDRV_PCM_INFO_INTERLEAVED |
  222. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  223. SNDRV_PCM_INFO_MMAP_VALID),
  224. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  225. .rates = SNDRV_PCM_RATE_48000,
  226. .rate_min = 48000,
  227. .rate_max = 48000,
  228. .channels_min = 2,
  229. .channels_max = 2,
  230. .buffer_bytes_max = (32*1024),
  231. .period_bytes_min = 64,
  232. .period_bytes_max = (16*1024),
  233. .periods_min = 2,
  234. .periods_max = 8,
  235. .fifo_size = 0,
  236. };
  237. static struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
  238. .info = (SNDRV_PCM_INFO_MMAP |
  239. SNDRV_PCM_INFO_INTERLEAVED |
  240. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  241. SNDRV_PCM_INFO_MMAP_VALID),
  242. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  243. .rates = SNDRV_PCM_RATE_48000,
  244. .rate_min = 48000,
  245. .rate_max = 48000,
  246. .channels_min = 2,
  247. .channels_max = 2,
  248. .buffer_bytes_max = (32*1024),
  249. .period_bytes_min = 64,
  250. .period_bytes_max = (16*1024),
  251. .periods_min = 2,
  252. .periods_max = 2,
  253. .fifo_size = 0,
  254. };
  255. static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
  256. unsigned int reg,
  257. unsigned int chn)
  258. {
  259. unsigned long flags;
  260. unsigned int regptr, val;
  261. regptr = (reg << 16) | chn;
  262. spin_lock_irqsave(&emu->emu_lock, flags);
  263. outl(regptr, emu->port + PTR);
  264. val = inl(emu->port + DATA);
  265. spin_unlock_irqrestore(&emu->emu_lock, flags);
  266. return val;
  267. }
  268. static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
  269. unsigned int reg,
  270. unsigned int chn,
  271. unsigned int data)
  272. {
  273. unsigned int regptr;
  274. unsigned long flags;
  275. regptr = (reg << 16) | chn;
  276. spin_lock_irqsave(&emu->emu_lock, flags);
  277. outl(regptr, emu->port + PTR);
  278. outl(data, emu->port + DATA);
  279. spin_unlock_irqrestore(&emu->emu_lock, flags);
  280. }
  281. static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
  282. {
  283. unsigned long flags;
  284. unsigned int enable;
  285. spin_lock_irqsave(&emu->emu_lock, flags);
  286. enable = inl(emu->port + INTE) | intrenb;
  287. outl(enable, emu->port + INTE);
  288. spin_unlock_irqrestore(&emu->emu_lock, flags);
  289. }
  290. static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
  291. {
  292. unsigned long flags;
  293. unsigned int enable;
  294. spin_lock_irqsave(&emu->emu_lock, flags);
  295. enable = inl(emu->port + INTE) & ~intrenb;
  296. outl(enable, emu->port + INTE);
  297. spin_unlock_irqrestore(&emu->emu_lock, flags);
  298. }
  299. static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
  300. {
  301. unsigned long flags;
  302. spin_lock_irqsave(&emu->emu_lock, flags);
  303. outl(value, emu->port + GPIO);
  304. spin_unlock_irqrestore(&emu->emu_lock, flags);
  305. }
  306. static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
  307. {
  308. kfree(runtime->private_data);
  309. }
  310. static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
  311. {
  312. struct emu10k1x_pcm *epcm;
  313. if ((epcm = voice->epcm) == NULL)
  314. return;
  315. if (epcm->substream == NULL)
  316. return;
  317. #if 0
  318. snd_printk(KERN_INFO "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
  319. epcm->substream->ops->pointer(epcm->substream),
  320. snd_pcm_lib_period_bytes(epcm->substream),
  321. snd_pcm_lib_buffer_bytes(epcm->substream));
  322. #endif
  323. snd_pcm_period_elapsed(epcm->substream);
  324. }
  325. /* open callback */
  326. static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
  327. {
  328. struct emu10k1x *chip = snd_pcm_substream_chip(substream);
  329. struct emu10k1x_pcm *epcm;
  330. struct snd_pcm_runtime *runtime = substream->runtime;
  331. int err;
  332. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
  333. return err;
  334. }
  335. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  336. return err;
  337. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  338. if (epcm == NULL)
  339. return -ENOMEM;
  340. epcm->emu = chip;
  341. epcm->substream = substream;
  342. runtime->private_data = epcm;
  343. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  344. runtime->hw = snd_emu10k1x_playback_hw;
  345. return 0;
  346. }
  347. /* close callback */
  348. static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
  349. {
  350. return 0;
  351. }
  352. /* hw_params callback */
  353. static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
  354. struct snd_pcm_hw_params *hw_params)
  355. {
  356. struct snd_pcm_runtime *runtime = substream->runtime;
  357. struct emu10k1x_pcm *epcm = runtime->private_data;
  358. if (! epcm->voice) {
  359. epcm->voice = &epcm->emu->voices[substream->pcm->device];
  360. epcm->voice->use = 1;
  361. epcm->voice->epcm = epcm;
  362. }
  363. return snd_pcm_lib_malloc_pages(substream,
  364. params_buffer_bytes(hw_params));
  365. }
  366. /* hw_free callback */
  367. static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
  368. {
  369. struct snd_pcm_runtime *runtime = substream->runtime;
  370. struct emu10k1x_pcm *epcm;
  371. if (runtime->private_data == NULL)
  372. return 0;
  373. epcm = runtime->private_data;
  374. if (epcm->voice) {
  375. epcm->voice->use = 0;
  376. epcm->voice->epcm = NULL;
  377. epcm->voice = NULL;
  378. }
  379. return snd_pcm_lib_free_pages(substream);
  380. }
  381. /* prepare callback */
  382. static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
  383. {
  384. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  385. struct snd_pcm_runtime *runtime = substream->runtime;
  386. struct emu10k1x_pcm *epcm = runtime->private_data;
  387. int voice = epcm->voice->number;
  388. u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
  389. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  390. int i;
  391. for(i=0; i < runtime->periods; i++) {
  392. *table_base++=runtime->dma_addr+(i*period_size_bytes);
  393. *table_base++=period_size_bytes<<16;
  394. }
  395. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
  396. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
  397. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
  398. snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
  399. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
  400. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
  401. snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
  402. snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
  403. return 0;
  404. }
  405. /* trigger callback */
  406. static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
  407. int cmd)
  408. {
  409. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  410. struct snd_pcm_runtime *runtime = substream->runtime;
  411. struct emu10k1x_pcm *epcm = runtime->private_data;
  412. int channel = epcm->voice->number;
  413. int result = 0;
  414. // snd_printk(KERN_INFO "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", (int)emu, cmd, (int)substream->ops->pointer(substream));
  415. switch (cmd) {
  416. case SNDRV_PCM_TRIGGER_START:
  417. if(runtime->periods == 2)
  418. snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  419. else
  420. snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
  421. epcm->running = 1;
  422. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
  423. break;
  424. case SNDRV_PCM_TRIGGER_STOP:
  425. epcm->running = 0;
  426. snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  427. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
  428. break;
  429. default:
  430. result = -EINVAL;
  431. break;
  432. }
  433. return result;
  434. }
  435. /* pointer callback */
  436. static snd_pcm_uframes_t
  437. snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
  438. {
  439. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  440. struct snd_pcm_runtime *runtime = substream->runtime;
  441. struct emu10k1x_pcm *epcm = runtime->private_data;
  442. int channel = epcm->voice->number;
  443. snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
  444. if (!epcm->running)
  445. return 0;
  446. ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  447. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  448. ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  449. if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
  450. return 0;
  451. if (ptr3 != ptr4)
  452. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  453. ptr2 = bytes_to_frames(runtime, ptr1);
  454. ptr2 += (ptr4 >> 3) * runtime->period_size;
  455. ptr = ptr2;
  456. if (ptr >= runtime->buffer_size)
  457. ptr -= runtime->buffer_size;
  458. return ptr;
  459. }
  460. /* operators */
  461. static struct snd_pcm_ops snd_emu10k1x_playback_ops = {
  462. .open = snd_emu10k1x_playback_open,
  463. .close = snd_emu10k1x_playback_close,
  464. .ioctl = snd_pcm_lib_ioctl,
  465. .hw_params = snd_emu10k1x_pcm_hw_params,
  466. .hw_free = snd_emu10k1x_pcm_hw_free,
  467. .prepare = snd_emu10k1x_pcm_prepare,
  468. .trigger = snd_emu10k1x_pcm_trigger,
  469. .pointer = snd_emu10k1x_pcm_pointer,
  470. };
  471. /* open_capture callback */
  472. static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
  473. {
  474. struct emu10k1x *chip = snd_pcm_substream_chip(substream);
  475. struct emu10k1x_pcm *epcm;
  476. struct snd_pcm_runtime *runtime = substream->runtime;
  477. int err;
  478. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  479. return err;
  480. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  481. return err;
  482. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  483. if (epcm == NULL)
  484. return -ENOMEM;
  485. epcm->emu = chip;
  486. epcm->substream = substream;
  487. runtime->private_data = epcm;
  488. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  489. runtime->hw = snd_emu10k1x_capture_hw;
  490. return 0;
  491. }
  492. /* close callback */
  493. static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
  494. {
  495. return 0;
  496. }
  497. /* hw_params callback */
  498. static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
  499. struct snd_pcm_hw_params *hw_params)
  500. {
  501. struct snd_pcm_runtime *runtime = substream->runtime;
  502. struct emu10k1x_pcm *epcm = runtime->private_data;
  503. if (! epcm->voice) {
  504. if (epcm->emu->capture_voice.use)
  505. return -EBUSY;
  506. epcm->voice = &epcm->emu->capture_voice;
  507. epcm->voice->epcm = epcm;
  508. epcm->voice->use = 1;
  509. }
  510. return snd_pcm_lib_malloc_pages(substream,
  511. params_buffer_bytes(hw_params));
  512. }
  513. /* hw_free callback */
  514. static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
  515. {
  516. struct snd_pcm_runtime *runtime = substream->runtime;
  517. struct emu10k1x_pcm *epcm;
  518. if (runtime->private_data == NULL)
  519. return 0;
  520. epcm = runtime->private_data;
  521. if (epcm->voice) {
  522. epcm->voice->use = 0;
  523. epcm->voice->epcm = NULL;
  524. epcm->voice = NULL;
  525. }
  526. return snd_pcm_lib_free_pages(substream);
  527. }
  528. /* prepare capture callback */
  529. static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
  530. {
  531. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  532. struct snd_pcm_runtime *runtime = substream->runtime;
  533. snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
  534. snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  535. snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
  536. snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
  537. return 0;
  538. }
  539. /* trigger_capture callback */
  540. static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
  541. int cmd)
  542. {
  543. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  544. struct snd_pcm_runtime *runtime = substream->runtime;
  545. struct emu10k1x_pcm *epcm = runtime->private_data;
  546. int result = 0;
  547. switch (cmd) {
  548. case SNDRV_PCM_TRIGGER_START:
  549. snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
  550. INTE_CAP_0_HALF_LOOP);
  551. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
  552. epcm->running = 1;
  553. break;
  554. case SNDRV_PCM_TRIGGER_STOP:
  555. epcm->running = 0;
  556. snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
  557. INTE_CAP_0_HALF_LOOP);
  558. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
  559. break;
  560. default:
  561. result = -EINVAL;
  562. break;
  563. }
  564. return result;
  565. }
  566. /* pointer_capture callback */
  567. static snd_pcm_uframes_t
  568. snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
  569. {
  570. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  571. struct snd_pcm_runtime *runtime = substream->runtime;
  572. struct emu10k1x_pcm *epcm = runtime->private_data;
  573. snd_pcm_uframes_t ptr;
  574. if (!epcm->running)
  575. return 0;
  576. ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
  577. if (ptr >= runtime->buffer_size)
  578. ptr -= runtime->buffer_size;
  579. return ptr;
  580. }
  581. static struct snd_pcm_ops snd_emu10k1x_capture_ops = {
  582. .open = snd_emu10k1x_pcm_open_capture,
  583. .close = snd_emu10k1x_pcm_close_capture,
  584. .ioctl = snd_pcm_lib_ioctl,
  585. .hw_params = snd_emu10k1x_pcm_hw_params_capture,
  586. .hw_free = snd_emu10k1x_pcm_hw_free_capture,
  587. .prepare = snd_emu10k1x_pcm_prepare_capture,
  588. .trigger = snd_emu10k1x_pcm_trigger_capture,
  589. .pointer = snd_emu10k1x_pcm_pointer_capture,
  590. };
  591. static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
  592. unsigned short reg)
  593. {
  594. struct emu10k1x *emu = ac97->private_data;
  595. unsigned long flags;
  596. unsigned short val;
  597. spin_lock_irqsave(&emu->emu_lock, flags);
  598. outb(reg, emu->port + AC97ADDRESS);
  599. val = inw(emu->port + AC97DATA);
  600. spin_unlock_irqrestore(&emu->emu_lock, flags);
  601. return val;
  602. }
  603. static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
  604. unsigned short reg, unsigned short val)
  605. {
  606. struct emu10k1x *emu = ac97->private_data;
  607. unsigned long flags;
  608. spin_lock_irqsave(&emu->emu_lock, flags);
  609. outb(reg, emu->port + AC97ADDRESS);
  610. outw(val, emu->port + AC97DATA);
  611. spin_unlock_irqrestore(&emu->emu_lock, flags);
  612. }
  613. static int snd_emu10k1x_ac97(struct emu10k1x *chip)
  614. {
  615. struct snd_ac97_bus *pbus;
  616. struct snd_ac97_template ac97;
  617. int err;
  618. static struct snd_ac97_bus_ops ops = {
  619. .write = snd_emu10k1x_ac97_write,
  620. .read = snd_emu10k1x_ac97_read,
  621. };
  622. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  623. return err;
  624. pbus->no_vra = 1; /* we don't need VRA */
  625. memset(&ac97, 0, sizeof(ac97));
  626. ac97.private_data = chip;
  627. ac97.scaps = AC97_SCAP_NO_SPDIF;
  628. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  629. }
  630. static int snd_emu10k1x_free(struct emu10k1x *chip)
  631. {
  632. snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
  633. // disable interrupts
  634. outl(0, chip->port + INTE);
  635. // disable audio
  636. outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
  637. // release the i/o port
  638. release_and_free_resource(chip->res_port);
  639. // release the irq
  640. if (chip->irq >= 0)
  641. free_irq(chip->irq, (void *)chip);
  642. // release the DMA
  643. if (chip->dma_buffer.area) {
  644. snd_dma_free_pages(&chip->dma_buffer);
  645. }
  646. pci_disable_device(chip->pci);
  647. // release the data
  648. kfree(chip);
  649. return 0;
  650. }
  651. static int snd_emu10k1x_dev_free(struct snd_device *device)
  652. {
  653. struct emu10k1x *chip = device->device_data;
  654. return snd_emu10k1x_free(chip);
  655. }
  656. static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id,
  657. struct pt_regs *regs)
  658. {
  659. unsigned int status;
  660. struct emu10k1x *chip = dev_id;
  661. struct emu10k1x_voice *pvoice = chip->voices;
  662. int i;
  663. int mask;
  664. status = inl(chip->port + IPR);
  665. if (! status)
  666. return IRQ_NONE;
  667. // capture interrupt
  668. if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
  669. struct emu10k1x_voice *pvoice = &chip->capture_voice;
  670. if (pvoice->use)
  671. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  672. else
  673. snd_emu10k1x_intr_disable(chip,
  674. INTE_CAP_0_LOOP |
  675. INTE_CAP_0_HALF_LOOP);
  676. }
  677. mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
  678. for (i = 0; i < 3; i++) {
  679. if (status & mask) {
  680. if (pvoice->use)
  681. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  682. else
  683. snd_emu10k1x_intr_disable(chip, mask);
  684. }
  685. pvoice++;
  686. mask <<= 1;
  687. }
  688. if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
  689. if (chip->midi.interrupt)
  690. chip->midi.interrupt(chip, status);
  691. else
  692. snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
  693. }
  694. // acknowledge the interrupt if necessary
  695. outl(status, chip->port + IPR);
  696. // snd_printk(KERN_INFO "interrupt %08x\n", status);
  697. return IRQ_HANDLED;
  698. }
  699. static int __devinit snd_emu10k1x_pcm(struct emu10k1x *emu, int device, struct snd_pcm **rpcm)
  700. {
  701. struct snd_pcm *pcm;
  702. int err;
  703. int capture = 0;
  704. if (rpcm)
  705. *rpcm = NULL;
  706. if (device == 0)
  707. capture = 1;
  708. if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
  709. return err;
  710. pcm->private_data = emu;
  711. switch(device) {
  712. case 0:
  713. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  714. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
  715. break;
  716. case 1:
  717. case 2:
  718. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  719. break;
  720. }
  721. pcm->info_flags = 0;
  722. pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
  723. switch(device) {
  724. case 0:
  725. strcpy(pcm->name, "EMU10K1X Front");
  726. break;
  727. case 1:
  728. strcpy(pcm->name, "EMU10K1X Rear");
  729. break;
  730. case 2:
  731. strcpy(pcm->name, "EMU10K1X Center/LFE");
  732. break;
  733. }
  734. emu->pcm = pcm;
  735. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  736. snd_dma_pci_data(emu->pci),
  737. 32*1024, 32*1024);
  738. if (rpcm)
  739. *rpcm = pcm;
  740. return 0;
  741. }
  742. static int __devinit snd_emu10k1x_create(struct snd_card *card,
  743. struct pci_dev *pci,
  744. struct emu10k1x **rchip)
  745. {
  746. struct emu10k1x *chip;
  747. int err;
  748. int ch;
  749. static struct snd_device_ops ops = {
  750. .dev_free = snd_emu10k1x_dev_free,
  751. };
  752. *rchip = NULL;
  753. if ((err = pci_enable_device(pci)) < 0)
  754. return err;
  755. if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
  756. pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
  757. snd_printk(KERN_ERR "error to set 28bit mask DMA\n");
  758. pci_disable_device(pci);
  759. return -ENXIO;
  760. }
  761. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  762. if (chip == NULL) {
  763. pci_disable_device(pci);
  764. return -ENOMEM;
  765. }
  766. chip->card = card;
  767. chip->pci = pci;
  768. chip->irq = -1;
  769. spin_lock_init(&chip->emu_lock);
  770. spin_lock_init(&chip->voice_lock);
  771. chip->port = pci_resource_start(pci, 0);
  772. if ((chip->res_port = request_region(chip->port, 8,
  773. "EMU10K1X")) == NULL) {
  774. snd_printk(KERN_ERR "emu10k1x: cannot allocate the port 0x%lx\n", chip->port);
  775. snd_emu10k1x_free(chip);
  776. return -EBUSY;
  777. }
  778. if (request_irq(pci->irq, snd_emu10k1x_interrupt,
  779. SA_INTERRUPT|SA_SHIRQ, "EMU10K1X",
  780. (void *)chip)) {
  781. snd_printk(KERN_ERR "emu10k1x: cannot grab irq %d\n", pci->irq);
  782. snd_emu10k1x_free(chip);
  783. return -EBUSY;
  784. }
  785. chip->irq = pci->irq;
  786. if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  787. 4 * 1024, &chip->dma_buffer) < 0) {
  788. snd_emu10k1x_free(chip);
  789. return -ENOMEM;
  790. }
  791. pci_set_master(pci);
  792. /* read revision & serial */
  793. pci_read_config_byte(pci, PCI_REVISION_ID, (char *)&chip->revision);
  794. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  795. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  796. snd_printk(KERN_INFO "Model %04x Rev %08x Serial %08x\n", chip->model,
  797. chip->revision, chip->serial);
  798. outl(0, chip->port + INTE);
  799. for(ch = 0; ch < 3; ch++) {
  800. chip->voices[ch].emu = chip;
  801. chip->voices[ch].number = ch;
  802. }
  803. /*
  804. * Init to 0x02109204 :
  805. * Clock accuracy = 0 (1000ppm)
  806. * Sample Rate = 2 (48kHz)
  807. * Audio Channel = 1 (Left of 2)
  808. * Source Number = 0 (Unspecified)
  809. * Generation Status = 1 (Original for Cat Code 12)
  810. * Cat Code = 12 (Digital Signal Mixer)
  811. * Mode = 0 (Mode 0)
  812. * Emphasis = 0 (None)
  813. * CP = 1 (Copyright unasserted)
  814. * AN = 0 (Audio data)
  815. * P = 0 (Consumer)
  816. */
  817. snd_emu10k1x_ptr_write(chip, SPCS0, 0,
  818. chip->spdif_bits[0] =
  819. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  820. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  821. SPCS_GENERATIONSTATUS | 0x00001200 |
  822. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  823. snd_emu10k1x_ptr_write(chip, SPCS1, 0,
  824. chip->spdif_bits[1] =
  825. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  826. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  827. SPCS_GENERATIONSTATUS | 0x00001200 |
  828. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  829. snd_emu10k1x_ptr_write(chip, SPCS2, 0,
  830. chip->spdif_bits[2] =
  831. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  832. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  833. SPCS_GENERATIONSTATUS | 0x00001200 |
  834. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  835. snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
  836. snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
  837. snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
  838. outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
  839. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  840. chip, &ops)) < 0) {
  841. snd_emu10k1x_free(chip);
  842. return err;
  843. }
  844. *rchip = chip;
  845. return 0;
  846. }
  847. static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
  848. struct snd_info_buffer *buffer)
  849. {
  850. struct emu10k1x *emu = entry->private_data;
  851. unsigned long value,value1,value2;
  852. unsigned long flags;
  853. int i;
  854. snd_iprintf(buffer, "Registers:\n\n");
  855. for(i = 0; i < 0x20; i+=4) {
  856. spin_lock_irqsave(&emu->emu_lock, flags);
  857. value = inl(emu->port + i);
  858. spin_unlock_irqrestore(&emu->emu_lock, flags);
  859. snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
  860. }
  861. snd_iprintf(buffer, "\nRegisters\n\n");
  862. for(i = 0; i <= 0x48; i++) {
  863. value = snd_emu10k1x_ptr_read(emu, i, 0);
  864. if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
  865. value1 = snd_emu10k1x_ptr_read(emu, i, 1);
  866. value2 = snd_emu10k1x_ptr_read(emu, i, 2);
  867. snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
  868. } else {
  869. snd_iprintf(buffer, "%02X: %08lX\n", i, value);
  870. }
  871. }
  872. }
  873. static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
  874. struct snd_info_buffer *buffer)
  875. {
  876. struct emu10k1x *emu = entry->private_data;
  877. char line[64];
  878. unsigned int reg, channel_id , val;
  879. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  880. if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
  881. continue;
  882. if ((reg < 0x49) && (reg >=0) && (val <= 0xffffffff)
  883. && (channel_id >=0) && (channel_id <= 2) )
  884. snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
  885. }
  886. }
  887. static int __devinit snd_emu10k1x_proc_init(struct emu10k1x * emu)
  888. {
  889. struct snd_info_entry *entry;
  890. if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
  891. snd_info_set_text_ops(entry, emu, 1024, snd_emu10k1x_proc_reg_read);
  892. entry->c.text.write_size = 64;
  893. entry->c.text.write = snd_emu10k1x_proc_reg_write;
  894. entry->mode |= S_IWUSR;
  895. entry->private_data = emu;
  896. }
  897. return 0;
  898. }
  899. static int snd_emu10k1x_shared_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  900. {
  901. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  902. uinfo->count = 1;
  903. uinfo->value.integer.min = 0;
  904. uinfo->value.integer.max = 1;
  905. return 0;
  906. }
  907. static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
  908. struct snd_ctl_elem_value *ucontrol)
  909. {
  910. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  911. ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
  912. return 0;
  913. }
  914. static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
  915. struct snd_ctl_elem_value *ucontrol)
  916. {
  917. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  918. unsigned int val;
  919. int change = 0;
  920. val = ucontrol->value.integer.value[0] ;
  921. if (val) {
  922. // enable spdif output
  923. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
  924. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
  925. snd_emu10k1x_gpio_write(emu, 0x1000);
  926. } else {
  927. // disable spdif output
  928. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
  929. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
  930. snd_emu10k1x_gpio_write(emu, 0x1080);
  931. }
  932. return change;
  933. }
  934. static struct snd_kcontrol_new snd_emu10k1x_shared_spdif __devinitdata =
  935. {
  936. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  937. .name = "Analog/Digital Output Jack",
  938. .info = snd_emu10k1x_shared_spdif_info,
  939. .get = snd_emu10k1x_shared_spdif_get,
  940. .put = snd_emu10k1x_shared_spdif_put
  941. };
  942. static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  943. {
  944. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  945. uinfo->count = 1;
  946. return 0;
  947. }
  948. static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
  949. struct snd_ctl_elem_value *ucontrol)
  950. {
  951. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  952. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  953. ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
  954. ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
  955. ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
  956. ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
  957. return 0;
  958. }
  959. static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. ucontrol->value.iec958.status[0] = 0xff;
  963. ucontrol->value.iec958.status[1] = 0xff;
  964. ucontrol->value.iec958.status[2] = 0xff;
  965. ucontrol->value.iec958.status[3] = 0xff;
  966. return 0;
  967. }
  968. static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
  969. struct snd_ctl_elem_value *ucontrol)
  970. {
  971. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  972. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  973. int change;
  974. unsigned int val;
  975. val = (ucontrol->value.iec958.status[0] << 0) |
  976. (ucontrol->value.iec958.status[1] << 8) |
  977. (ucontrol->value.iec958.status[2] << 16) |
  978. (ucontrol->value.iec958.status[3] << 24);
  979. change = val != emu->spdif_bits[idx];
  980. if (change) {
  981. snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
  982. emu->spdif_bits[idx] = val;
  983. }
  984. return change;
  985. }
  986. static struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
  987. {
  988. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  989. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  990. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  991. .count = 3,
  992. .info = snd_emu10k1x_spdif_info,
  993. .get = snd_emu10k1x_spdif_get_mask
  994. };
  995. static struct snd_kcontrol_new snd_emu10k1x_spdif_control =
  996. {
  997. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  998. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  999. .count = 3,
  1000. .info = snd_emu10k1x_spdif_info,
  1001. .get = snd_emu10k1x_spdif_get,
  1002. .put = snd_emu10k1x_spdif_put
  1003. };
  1004. static int __devinit snd_emu10k1x_mixer(struct emu10k1x *emu)
  1005. {
  1006. int err;
  1007. struct snd_kcontrol *kctl;
  1008. struct snd_card *card = emu->card;
  1009. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
  1010. return -ENOMEM;
  1011. if ((err = snd_ctl_add(card, kctl)))
  1012. return err;
  1013. if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
  1014. return -ENOMEM;
  1015. if ((err = snd_ctl_add(card, kctl)))
  1016. return err;
  1017. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
  1018. return -ENOMEM;
  1019. if ((err = snd_ctl_add(card, kctl)))
  1020. return err;
  1021. return 0;
  1022. }
  1023. #define EMU10K1X_MIDI_MODE_INPUT (1<<0)
  1024. #define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
  1025. static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
  1026. {
  1027. return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
  1028. }
  1029. static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
  1030. {
  1031. snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
  1032. }
  1033. #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
  1034. #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
  1035. #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
  1036. #define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
  1037. #define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
  1038. #define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
  1039. #define MPU401_RESET 0xff
  1040. #define MPU401_ENTER_UART 0x3f
  1041. #define MPU401_ACK 0xfe
  1042. static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
  1043. {
  1044. int timeout = 100000;
  1045. for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
  1046. mpu401_read_data(emu, mpu);
  1047. #ifdef CONFIG_SND_DEBUG
  1048. if (timeout <= 0)
  1049. snd_printk(KERN_ERR "cmd: clear rx timeout (status = 0x%x)\n", mpu401_read_stat(emu, mpu));
  1050. #endif
  1051. }
  1052. /*
  1053. */
  1054. static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
  1055. struct emu10k1x_midi *midi, unsigned int status)
  1056. {
  1057. unsigned char byte;
  1058. if (midi->rmidi == NULL) {
  1059. snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
  1060. return;
  1061. }
  1062. spin_lock(&midi->input_lock);
  1063. if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
  1064. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1065. mpu401_clear_rx(emu, midi);
  1066. } else {
  1067. byte = mpu401_read_data(emu, midi);
  1068. if (midi->substream_input)
  1069. snd_rawmidi_receive(midi->substream_input, &byte, 1);
  1070. }
  1071. }
  1072. spin_unlock(&midi->input_lock);
  1073. spin_lock(&midi->output_lock);
  1074. if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
  1075. if (midi->substream_output &&
  1076. snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
  1077. mpu401_write_data(emu, midi, byte);
  1078. } else {
  1079. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1080. }
  1081. }
  1082. spin_unlock(&midi->output_lock);
  1083. }
  1084. static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
  1085. {
  1086. do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
  1087. }
  1088. static void snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
  1089. struct emu10k1x_midi *midi, unsigned char cmd, int ack)
  1090. {
  1091. unsigned long flags;
  1092. int timeout, ok;
  1093. spin_lock_irqsave(&midi->input_lock, flags);
  1094. mpu401_write_data(emu, midi, 0x00);
  1095. /* mpu401_clear_rx(emu, midi); */
  1096. mpu401_write_cmd(emu, midi, cmd);
  1097. if (ack) {
  1098. ok = 0;
  1099. timeout = 10000;
  1100. while (!ok && timeout-- > 0) {
  1101. if (mpu401_input_avail(emu, midi)) {
  1102. if (mpu401_read_data(emu, midi) == MPU401_ACK)
  1103. ok = 1;
  1104. }
  1105. }
  1106. if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
  1107. ok = 1;
  1108. } else {
  1109. ok = 1;
  1110. }
  1111. spin_unlock_irqrestore(&midi->input_lock, flags);
  1112. if (!ok)
  1113. snd_printk(KERN_ERR "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
  1114. cmd, emu->port,
  1115. mpu401_read_stat(emu, midi),
  1116. mpu401_read_data(emu, midi));
  1117. }
  1118. static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
  1119. {
  1120. struct emu10k1x *emu;
  1121. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1122. unsigned long flags;
  1123. emu = midi->emu;
  1124. snd_assert(emu, return -ENXIO);
  1125. spin_lock_irqsave(&midi->open_lock, flags);
  1126. midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
  1127. midi->substream_input = substream;
  1128. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1129. spin_unlock_irqrestore(&midi->open_lock, flags);
  1130. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
  1131. snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
  1132. } else {
  1133. spin_unlock_irqrestore(&midi->open_lock, flags);
  1134. }
  1135. return 0;
  1136. }
  1137. static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
  1138. {
  1139. struct emu10k1x *emu;
  1140. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1141. unsigned long flags;
  1142. emu = midi->emu;
  1143. snd_assert(emu, return -ENXIO);
  1144. spin_lock_irqsave(&midi->open_lock, flags);
  1145. midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
  1146. midi->substream_output = substream;
  1147. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1148. spin_unlock_irqrestore(&midi->open_lock, flags);
  1149. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
  1150. snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
  1151. } else {
  1152. spin_unlock_irqrestore(&midi->open_lock, flags);
  1153. }
  1154. return 0;
  1155. }
  1156. static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
  1157. {
  1158. struct emu10k1x *emu;
  1159. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1160. unsigned long flags;
  1161. emu = midi->emu;
  1162. snd_assert(emu, return -ENXIO);
  1163. spin_lock_irqsave(&midi->open_lock, flags);
  1164. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1165. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
  1166. midi->substream_input = NULL;
  1167. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1168. spin_unlock_irqrestore(&midi->open_lock, flags);
  1169. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1170. } else {
  1171. spin_unlock_irqrestore(&midi->open_lock, flags);
  1172. }
  1173. return 0;
  1174. }
  1175. static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
  1176. {
  1177. struct emu10k1x *emu;
  1178. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1179. unsigned long flags;
  1180. emu = midi->emu;
  1181. snd_assert(emu, return -ENXIO);
  1182. spin_lock_irqsave(&midi->open_lock, flags);
  1183. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1184. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
  1185. midi->substream_output = NULL;
  1186. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1187. spin_unlock_irqrestore(&midi->open_lock, flags);
  1188. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1189. } else {
  1190. spin_unlock_irqrestore(&midi->open_lock, flags);
  1191. }
  1192. return 0;
  1193. }
  1194. static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
  1195. {
  1196. struct emu10k1x *emu;
  1197. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1198. emu = midi->emu;
  1199. snd_assert(emu, return);
  1200. if (up)
  1201. snd_emu10k1x_intr_enable(emu, midi->rx_enable);
  1202. else
  1203. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1204. }
  1205. static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
  1206. {
  1207. struct emu10k1x *emu;
  1208. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1209. unsigned long flags;
  1210. emu = midi->emu;
  1211. snd_assert(emu, return);
  1212. if (up) {
  1213. int max = 4;
  1214. unsigned char byte;
  1215. /* try to send some amount of bytes here before interrupts */
  1216. spin_lock_irqsave(&midi->output_lock, flags);
  1217. while (max > 0) {
  1218. if (mpu401_output_ready(emu, midi)) {
  1219. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
  1220. snd_rawmidi_transmit(substream, &byte, 1) != 1) {
  1221. /* no more data */
  1222. spin_unlock_irqrestore(&midi->output_lock, flags);
  1223. return;
  1224. }
  1225. mpu401_write_data(emu, midi, byte);
  1226. max--;
  1227. } else {
  1228. break;
  1229. }
  1230. }
  1231. spin_unlock_irqrestore(&midi->output_lock, flags);
  1232. snd_emu10k1x_intr_enable(emu, midi->tx_enable);
  1233. } else {
  1234. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1235. }
  1236. }
  1237. /*
  1238. */
  1239. static struct snd_rawmidi_ops snd_emu10k1x_midi_output =
  1240. {
  1241. .open = snd_emu10k1x_midi_output_open,
  1242. .close = snd_emu10k1x_midi_output_close,
  1243. .trigger = snd_emu10k1x_midi_output_trigger,
  1244. };
  1245. static struct snd_rawmidi_ops snd_emu10k1x_midi_input =
  1246. {
  1247. .open = snd_emu10k1x_midi_input_open,
  1248. .close = snd_emu10k1x_midi_input_close,
  1249. .trigger = snd_emu10k1x_midi_input_trigger,
  1250. };
  1251. static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
  1252. {
  1253. struct emu10k1x_midi *midi = rmidi->private_data;
  1254. midi->interrupt = NULL;
  1255. midi->rmidi = NULL;
  1256. }
  1257. static int __devinit emu10k1x_midi_init(struct emu10k1x *emu,
  1258. struct emu10k1x_midi *midi, int device, char *name)
  1259. {
  1260. struct snd_rawmidi *rmidi;
  1261. int err;
  1262. if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
  1263. return err;
  1264. midi->emu = emu;
  1265. spin_lock_init(&midi->open_lock);
  1266. spin_lock_init(&midi->input_lock);
  1267. spin_lock_init(&midi->output_lock);
  1268. strcpy(rmidi->name, name);
  1269. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
  1270. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
  1271. rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
  1272. SNDRV_RAWMIDI_INFO_INPUT |
  1273. SNDRV_RAWMIDI_INFO_DUPLEX;
  1274. rmidi->private_data = midi;
  1275. rmidi->private_free = snd_emu10k1x_midi_free;
  1276. midi->rmidi = rmidi;
  1277. return 0;
  1278. }
  1279. static int __devinit snd_emu10k1x_midi(struct emu10k1x *emu)
  1280. {
  1281. struct emu10k1x_midi *midi = &emu->midi;
  1282. int err;
  1283. if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
  1284. return err;
  1285. midi->tx_enable = INTE_MIDITXENABLE;
  1286. midi->rx_enable = INTE_MIDIRXENABLE;
  1287. midi->port = MUDATA;
  1288. midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
  1289. midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
  1290. midi->interrupt = snd_emu10k1x_midi_interrupt;
  1291. return 0;
  1292. }
  1293. static int __devinit snd_emu10k1x_probe(struct pci_dev *pci,
  1294. const struct pci_device_id *pci_id)
  1295. {
  1296. static int dev;
  1297. struct snd_card *card;
  1298. struct emu10k1x *chip;
  1299. int err;
  1300. if (dev >= SNDRV_CARDS)
  1301. return -ENODEV;
  1302. if (!enable[dev]) {
  1303. dev++;
  1304. return -ENOENT;
  1305. }
  1306. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1307. if (card == NULL)
  1308. return -ENOMEM;
  1309. if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
  1310. snd_card_free(card);
  1311. return err;
  1312. }
  1313. if ((err = snd_emu10k1x_pcm(chip, 0, NULL)) < 0) {
  1314. snd_card_free(card);
  1315. return err;
  1316. }
  1317. if ((err = snd_emu10k1x_pcm(chip, 1, NULL)) < 0) {
  1318. snd_card_free(card);
  1319. return err;
  1320. }
  1321. if ((err = snd_emu10k1x_pcm(chip, 2, NULL)) < 0) {
  1322. snd_card_free(card);
  1323. return err;
  1324. }
  1325. if ((err = snd_emu10k1x_ac97(chip)) < 0) {
  1326. snd_card_free(card);
  1327. return err;
  1328. }
  1329. if ((err = snd_emu10k1x_mixer(chip)) < 0) {
  1330. snd_card_free(card);
  1331. return err;
  1332. }
  1333. if ((err = snd_emu10k1x_midi(chip)) < 0) {
  1334. snd_card_free(card);
  1335. return err;
  1336. }
  1337. snd_emu10k1x_proc_init(chip);
  1338. strcpy(card->driver, "EMU10K1X");
  1339. strcpy(card->shortname, "Dell Sound Blaster Live!");
  1340. sprintf(card->longname, "%s at 0x%lx irq %i",
  1341. card->shortname, chip->port, chip->irq);
  1342. if ((err = snd_card_register(card)) < 0) {
  1343. snd_card_free(card);
  1344. return err;
  1345. }
  1346. pci_set_drvdata(pci, card);
  1347. dev++;
  1348. return 0;
  1349. }
  1350. static void __devexit snd_emu10k1x_remove(struct pci_dev *pci)
  1351. {
  1352. snd_card_free(pci_get_drvdata(pci));
  1353. pci_set_drvdata(pci, NULL);
  1354. }
  1355. // PCI IDs
  1356. static struct pci_device_id snd_emu10k1x_ids[] = {
  1357. { 0x1102, 0x0006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Dell OEM version (EMU10K1) */
  1358. { 0, }
  1359. };
  1360. MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
  1361. // pci_driver definition
  1362. static struct pci_driver driver = {
  1363. .name = "EMU10K1X",
  1364. .id_table = snd_emu10k1x_ids,
  1365. .probe = snd_emu10k1x_probe,
  1366. .remove = __devexit_p(snd_emu10k1x_remove),
  1367. };
  1368. // initialization of the module
  1369. static int __init alsa_card_emu10k1x_init(void)
  1370. {
  1371. int err;
  1372. if ((err = pci_register_driver(&driver)) > 0)
  1373. return err;
  1374. return 0;
  1375. }
  1376. // clean up the module
  1377. static void __exit alsa_card_emu10k1x_exit(void)
  1378. {
  1379. pci_unregister_driver(&driver);
  1380. }
  1381. module_init(alsa_card_emu10k1x_init)
  1382. module_exit(alsa_card_emu10k1x_exit)